RZ/G OpenOCD Information

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RZ-G

Introduction

This page provides a guide to use OpenOCD and compatible JTAG debugger devices on RZ/G2 platforms.

Target Devices

Overview

OpenOCD is an opensource software that provides on-chip programming and debugging feature, with support from compatible JTAG hardware debugger devices.

Prerequisites
A compatible JTAG hardware debugger device is required. Different JTAG devices can have slightly different procedure.
As an example, following guidance is for:

Environment

Below illustration shows how user should connect RZ/G2 platform with JTAG debugger and OpenOCD (run on a Linux Host PC). Note that most RZ/G2 development board has 10 pin JTAG header, so a JTAG converter (20pin-10pin) is required, for example the Olimex ARM-JTAG-20-10. The following pictures illustrates how to setup the environment with a Flyswatter2 and a EK874 (RZ/G2E) board. The setup is similar if other JTAG debuggers and/or devices are used.

openocd env1.png

Hardware setup

After connecting the devices as per guide in the previous section, follow below instructions to use OpenOCD and JTAG debugger. You must change the switches setting on development board to enable the JTAG debugging feature. The switches setting may be different for each development board. Please refer to the relevant board manual or user guide for detailed information.

SMARC RZ/G2L board

Change switches as per below.

SMARC JTAG SW1.png

  • SW1: OFF - OFF


EK874 RZ/G2E board

Change switches as per below. Note that board version 3 (Rev C) or later must be used.

rzg2e openocd switch settings.png

  • SW12: change bit 4 and 5 to OFF to enable JTAG
  • SW50: change to (2-3) side
  • SW51: change to (1-2) side


HiHope RZ/G2M-N-H board

Change switches as per below. Note that board rev. 3 or later must be used.

HiHope board.jpg SW1003.jpg SW305-SW2405.jpg

  • SW1003: change bit 4 to OFF to enable JTAG
  • SW305: change to (2-3) side
  • SW2405: change to (1-2) side


OpenOCD setup

To build OpenOCD you can use this script, e.g.:

$ wget https://raw.githubusercontent.com/renesas-rz/rzg_openocd/master/build_openocd
$ chmod +x build_openocd
$ ./build_openocd

Or follow the manual steps below.

Manual Build Instructions  

Make sure you have all the necessary packages installed:

$sudo apt-get install libtool pkg-config texinfo libusb-dev libusb-1.0.0-dev libftdi-dev autoconf
Download OpenOCD
You can get latest OpenOCD software from the repository:
$ git clone https://github.com/ntfreak/openocd
$ cd openocd

Configure, patch(1), build and install OpenOCD
Next, follow these instructions to build openocd.

$ wget https://raw.githubusercontent.com/renesas-rz/rzg_openocd/master/0002-target-aarch64-Write-Memory-function-fix-for-self-mo.patch
$ git am 0002-target-aarch64-Write-Memory-function-fix-for-self-mo.patch

$ ./bootstrap
$ ./configure --prefix ${PWD}/installdir
$ make
$ make install

OpenOCD binaries can be found in the installdir/bin directory.

In configuration, you may need to add option “--enable-ftdi” to ensure ftdi related function (which Flyswatter2 uses) will be built. Same for J-Link, with “--enable-jlink”, however both should be recognized and added automatically during the configuration phase.

Notes

(1) - Patch may not be required in the future and not strictly needed.

Run openocd

OpenOCD provides many setting scripts for many JTAG debugger and development boards under directory share/openocd/scripts/. Normally two suitable scripts has to be chosen, one for Debugger configuration and one for the development board or chip.

To debug with Flyswatter2 the following scripts is available:

interface/ftdi/flyswatter2.cfg

To debug with J-Link, instead:

interface/jlink.cfg

Then for the RZ/G2 family:

target/renesas_rz_g2.cfg

Finally different commands have to be used to select different devices belonging to the RZ/G2 family:

  • SMARC RZ/G2L board: set SOC G2L (default), i.e. -c can be omitted
  • EK874 RZ/G2E board: set SOC G2E
  • HiHope RZ/G2M board: set SOC G2M
  • HiHope RZ/G2N board: set SOC G2N
  • HiHope RZ/G2H board: set SOC G2H

So, for example to run OpenOCD and attach to a RZ/G2L device using a Flyswatter 2 JTAG adapter:

$ cd installdir
$ sudo bin/openocd -f share/openocd/scripts/interface/ftdi/flyswatter2.cfg -c "set SOC G2L" -f share/openocd/scripts/target/renesas_rz_g2.cfg

Please note that there's a way to avoid the usage of sudo by making sure that both the user and the debugger devices used belong to the dialout/plugdev groups.

You can modify the renesas_rz_g2.cfg configure file to tweak the clock speed (default 4MHz), for example to increase it to 15MHz:

adapter speed 15000

If openocd command succeeds, a message like this below appears:

Open On-Chip Debugger 0.11.0+dev-00182-gbd1569d1b-dirty (2021-05-25-10:23)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
G2L
	G2L - 0 CA57(s), 2 CA55(s), 0 CA53(s), 0 CR7(s),  1 CM33(s)
	Boot Core - CA55

r9a07g044l.cpu
SMP targets: r9a07g044l.a55.0 r9a07g044l.a55.1
init_reset
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : J-Link Lite V9 compiled May 17 2019 10:18:57
Info : Hardware version: 9.00
Info : VTarget = 1.833 V
Info : clock speed 4000 kHz
Info : JTAG tap: r9a07g044l.cpu tap/device found: 0x6ba00477 (mfg: 0x23b (ARM Ltd), part: 0xba00, ver: 0x6)
Info : DAP transaction stalled (WAIT) - slowing down
Info : DAP transaction stalled during replay (WAIT) - resending
Info : DAP transaction stalled (WAIT) - slowing down
Info : r9a07g044l.a55.0: hardware has 6 breakpoints, 4 watchpoints
Info : DAP transaction stalled (WAIT) - slowing down
Info : DAP transaction stalled during replay (WAIT) - resending
Info : r9a07g044l.a55.0 cluster 0 core 0 multi core
Info : starting gdb server for r9a07g044l.a55.0 on 3333
Info : Listening on port 3333 for gdb connections
Info : starting gdb server for r9a07g044l.m33 on 3334
Info : Listening on port 3334 for gdb connections
Info : gdb port disabled

Note that the "DAP transaction stalled" messages are normal and do not affect the functionality.

Start debugging

Now that openocd command has succeeded, you can use GDB on your Linux Host PC and attach to GDB Server created by OpenOCD. Note that on the Linux machine there might be several instances of GDB, including the native GDB (x86_64). In order to debug the Cortex-A55 the cross GDB has to be used, normally the one included in the SDK generated by Yocto, target: aarch64-poky-linux. For the Cortex-M33, instead the target has to be arm-none-eabi (to be installed separately).

$ source /opt/poky/3.1.5/environment-setup-aarch64-poky-linux
$ $GDB
GNU gdb (GDB) 9.1
Copyright (C) 2020 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law.
Type "show copying" and "show warranty" for details.
This GDB was configured as "--host=x86_64-pokysdk-linux '''--target=aarch64-poky-linux'''".
Type "show configuration" for configuration details.
For bug reporting instructions, please see:
<http://www.gnu.org/software/gdb/bugs/>.
Find the GDB manual and other documentation resources online at:
    <http://www.gnu.org/software/gdb/documentation/>.
 
For help, type "help".
Type "apropos word" to search for commands related to "word".

Different ports are potentially created for the different cores available in the device. For the example above GDB can connect to the port 3333 for the Cortex-A55 (configured in SMP by default) and port 3334 for the Cortex-M33.

(gdb) target remote localhost:3333
Remote debugging using localhost:3333
warning: No executable has been specified and target does not support
determining executable automatically.  Try using the "file" command.
0x0000000050000000 in ?? ()
(gdb) 

A message similar to the one shown above means that GDB managed to connect to the target and it is ready to accept further commands to debug.