RZ/G and RZ/V BSP Porting
This page is to highlight important things to consider when porting the Renesas BSP to your own custom board.
There is s a RZ/G2 Group Linux BSP Porting Guide document posted on Renesas.com.
This document contains information such as:
- How to add a new build configuration for a new board to a Yocto
- How to add a new build configuration for a new board to a u-boot
- Information about configuring pins and GPIO
- Information about Device Tree files for the kernel
- The code references are for the VLP64 v1.0.x releases *(the older Linux-4.19 BSP)
- The code refences are for the RZ/G2H,M,N,E devices.
One preliminary point to underline is that you may NOT want to use Yocto at the beginning, rather clone the repositories, modify the code and build it using a cross toolchain.
The paragraph order in this page is intentional. They represent the steps you normally do when you want to port the Renesas BSP, i.e. you absolutely want to start from Flash Writer. When you get your first custom board samples the non-volatile memories are virgin and the first goals is to program them with bootloaders. One of the first thing you need to do is to adjust the DDR configuration to your own. Debugging DDR may be tricky but have it working is a major step toward success. You can test the DDR using some hidden Flash Writer commands. After that you may need to change the SPI configuration.
Finally you can use Flash Writer to program the bootloaders: Arm Trusted Firmware (ATF) BL2 (aka IPL, Initial Program Loader), BL31 (Secure Monitor) and u-boot (BL33). BL32 is not strictly needed at the beginning, since it is the Trusted OS (optional). Bootloaders can be programmed into QSPI FLASH or eMMC, then of course the boot mode of the SoC shall be adjusted accordingly. ATF may also need to be configured depending on the non-volatile memory type. You may need to program separately (e.g. different files for each BL) or you can have a BL2 file and a FIP (Firmware Image Package) that includes all BL3x.
You do not normally need to modify many things in ATF and in any case only what is in the "plat/renesas/rz" folder. One of the first things ATF BL2 does is to configure the DDR. You would need to use the same (working) configuration used with Flash Writer, so there should be no surprise here, if the DDR works with Flash Writer then it will work with ATF as well.
Then ATF loads BL31(image id=3), BL32 (again optionally, image id=4) and BL33 (u-boot, image id=5) from either QSPI or eMMC. Assuming everything goes fine u-boot prompt is finally reachable. The table below summarizes where the different actors in the boot process are typically stored and executed from.
|Item||Stored into||Executed out of|
|Boot ROM||Internal SOC ROM||XIP (eXecuted In Place)|
|BL2||QSPI/eMMC boot part0/SD card||Internal SRAM|
|BL31-BL32||QSPI/eMMC boot part/SD card||DDR (secured by TrustZone)|
|BL33 (u-boot)||QSPI/eMMC boot part/SD card||DDR|
|Linux kernel||eMMC/SD card||DDR|
|GNU OS (rootfs)||eMMC/SD card||DDR|
The next step is to port the Linux CIP Kernel, by "porting" we mainly mean that the reference board device tree gets modified to reflect the HW available on the custom board.
Finally you can use Yocto to generate the root file system including all the bits and bobs you need to run your custom application.
Arm Trusted Firmware
- This section explains how DDR Memory is divided and configured.
- These are the repositories where Renesas publishes the RZ code to.
- Information on each branch is located in the wiki section