RZ-G/RZG DeviceTree: Difference between revisions
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! File !! Description | ! File !! Description | ||
|- | |- | ||
| r9a07g054.dtsi || RZ/V2L Device Tree containing all peripherals | | r9a07g054.dtsi || RZ/V2L Device Tree containing all peripherals (use in your board) | ||
|- | |- | ||
| r9a07g054l1.dtsi || | | r9a07g054l1.dtsi || Sets the compatible strings (use in your board) | ||
|- | |- | ||
| | | rzg2l-smarc-som.dtsi || Just for the EVK. Use as example code. | ||
|- | |- | ||
| r9a07g054l2. | | rzg2l-smarc-pinfunction.dtsi || Just for the EVK. Use as example code. | ||
|- | |||
| rz-smarc-common.dtsi || Just for the EVK. Use as example code. | |||
|- | |||
| rzg2l-smarc.dtsi || Just for the EVK. Use as example code. | |||
|- | |||
| r9a07g054l2-smac.dts || This is the main Device Tree for the board that get compiled. All other files are just 'includes' | |||
|} | |} | ||
Revision as of 15:41, 28 February 2023
← RZ-G
- This page contains helpful notes about Device Tree configurations
RZ Specific Files
- Device Tree files for Renesas SoC and evaluation boards are under the directory arch/arm64/boot/dts/renesas
- Below is the list of Device Tree files used for the Renesas Evaluation boards.
RZ/G2H HiHope | |
File | Description |
---|---|
r8a774e1.dtsi | RZ/G2H Device Tree containing all peripherals |
hihope-common.dtsi | |
hihope-rev2.dtsi | |
hihope-rev4.dtsi | |
hihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi | |
hihope-rzg2-ex-aistarvision-mipi-adapter-2.4.dtsi | |
hihope-rzg2-ex.dtsi | |
hihope-rzg2-ex-lvds.dtsi | |
r8a774e1-hihope-rzg2h.dts | |
r8a774e1-hihope-rzg2h-ex.dts | |
r8a774e1-hihope-rzg2h-ex-idk-1110wr.dts | |
rzg2-advantech-idk-1110wr-panel.dtsi | |
r8a774e1-hihope-rzg2h-ex-mipi-2.1.dts | |
r8a774e1-hihope-rzg2h-ex-mipi-2.4.dts |
RZ/G2N HiHope | |
File | Description |
---|---|
r8a774b1.dtsi | RZ/G2N Device Tree containing all peripherals |
r8a774b1-hihope-rzg2n.dts | |
r8a774b1-hihope-rzg2n-ex.dts | |
r8a774b1-hihope-rzg2n-ex-idk-1110wr.dts | |
r8a774b1-hihope-rzg2n-ex-mipi-2.1.dts | |
r8a774b1-hihope-rzg2n-ex-mipi-2.4.dts | |
r8a774b1-hihope-rzg2n-rev2.dts | |
r8a774b1-hihope-rzg2n-rev2-ex.dts | |
r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dts | |
rzg2-advantech-idk-1110wr-panel.dtsi | |
r8a774b1-hihope-rzg2n-rev2-ex-mipi-2.1.dts | |
r8a774b1-hihope-rzg2n-rev2-ex-mipi-2.4.dts |
RZ/G2M HiHope | |
File | Description |
---|---|
r8a774a1.dtsi | RZ/G2M Device Tree containing all peripherals |
r8a774a1-hihope-rzg2m.dts | |
r8a774a1-hihope-rzg2m-ex.dts | |
r8a774a1-hihope-rzg2m-ex-idk-1110wr.dts | |
rzg2-advantech-idk-1110wr-panel.dtsi | |
r8a774a1-hihope-rzg2m-ex-mipi-2.1.dts | |
r8a774a1-hihope-rzg2m-ex-mipi-2.4.dts | |
r8a774a1-hihope-rzg2m-rev2.dts | |
r8a774a1-hihope-rzg2m-rev2-ex.dts | |
r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dts | |
r8a774a1-hihope-rzg2m-rev2-ex-mipi-2.1.dts | |
r8a774a1-hihope-rzg2m-rev2-ex-mipi-2.4.dts | |
r8a774a3.dtsi | |
r8a774a3-hihope-rzg2m.dts | |
r8a774a3-hihope-rzg2m-ex.dts | |
r8a774a3-hihope-rzg2m-ex-idk-1110wr.dts | |
rzg2-advantech-idk-1110wr-panel.dtsi | |
r8a774a3-hihope-rzg2m-ex-mipi-2.1.dts | |
r8a774a3-hihope-rzg2m-ex-mipi-2.4.dts |
RZ/G2E EK874 | |
File | Description |
---|---|
r8a774c0.dtsi | RZ/G2E Device Tree containing all peripherals |
r8a774c0-cat874.dts | |
r8a774c0-cat874-revc.dts | |
r8a774c0-ek874.dts | |
r8a774c0-ek874-idk-2121wr.dts | |
r8a774c0-ek874-mipi-2.1.dts | |
r8a774c0-ek874-mipi-2.4.dts | |
r8a774c0-ek874-revc.dts | |
r8a774c0-ek874-revc-idk-2121wr.dts | |
rzg2-advantech-idk-1110wr-panel.dtsi | |
r8a774c0-ek874-revc-mipi-2.1.dts | |
r8a774c0-ek874-revc-mipi-2.4.dts | |
r8a774c0-es10-cat874.dts | |
r8a774c0-es10.dtsi | |
r8a774c0-es10-ek874.dts | |
r8a774c0-es10-ek874-idk-2121wr.dts | |
r8a774c0-es10-ek874-mipi-2.1.dts | |
r8a774c0-es10-ek874-mipi-2.4.dts | |
cat874-common.dtsi | |
cat875.dtsi |
RZ/G2L SMARC | |
File | Description |
---|---|
r9a07g044.dtsi | RZ/G2L family SoC common parts |
r9a07g044l.dtsi | Specific to RZ/G2L (R9A07G044L) SoC |
r9a07g044l1.dtsi | Specific to RZ/G2L (R9A07G044L single cortex A55) SoC |
r9a07g044l2.dtsi | Specific to RZ/G2L (R9A07G044L dual cortex A55) SoC |
rz-smarc-common.dtsi | |
rzg2l-smarc.dtsi | |
rzg2l-smarc-pinfunction.dtsi | |
rzg2l-smarc-som.dtsi | |
r9a07g044l2-smarc.dts |
RZ/G2LC SMARC | |
File | Description |
---|---|
r9a07g044c1.dtsi | RZ/G2LC Device Tree containing all peripherals |
r9a07g044c2.dtsi | RZ/G2LC Device Tree containing all peripherals |
r9a07g044c2-smarc.dts | |
rzg2lc-smarc.dtsi | |
rzg2lc-smarc-pinfunction.dtsi | |
rzg2lc-smarc-som.dtsi |
RZ/G2UL SMARC | |
File | Description |
---|---|
rzg2ul-smarc.dtsi | |
r9a07g043.dtsi | RZ/G2UL Device Tree containing all peripherals |
r9a07g043u11.dtsi | |
r9a07g043u11-smarc.dts | |
r9a07g043u12.dtsi |
RZ/V2L SMARC | |
File | Description |
---|---|
r9a07g054.dtsi | RZ/V2L Device Tree containing all peripherals (use in your board) |
r9a07g054l1.dtsi | Sets the compatible strings (use in your board) |
rzg2l-smarc-som.dtsi | Just for the EVK. Use as example code. |
rzg2l-smarc-pinfunction.dtsi | Just for the EVK. Use as example code. |
rz-smarc-common.dtsi | Just for the EVK. Use as example code. |
rzg2l-smarc.dtsi | Just for the EVK. Use as example code. |
r9a07g054l2-smac.dts | This is the main Device Tree for the board that get compiled. All other files are just 'includes' |
Internal Renesas boards
- r9a07g044l2-dev.dts
- rzg2l-smarc-dev.dtsi
Device Tree Syntax
Top Level (root node)
Compatible for the SoC
- The .dtsi file for each SoC will have a "compatible" string to specify that SoC it is. If you decide to make your own top level compatible, make sure you include the original SoC string. The reason is that some drivers (the VSP driver for example) look for that SoC string to know what SoC they are running on. If it is missing, it will not load or run correctly.
Here is a correct example of a .dts file for a RZ/G2L board. Notice how "renesas,r9a07g044" is at the end of the line.
/ { model = "My Really Cool RZ/G2L Board"; compatible = "my-rzg2l-board" , "renesas,r9a07g044"; chosen { bootargs = "ignore_loglevel rw root=/dev/mmc0blk1"; stdout-path = "serial0:115200n8"; }; };
Pin Control (pin mux)
Linux Drivers
- RZ/G2H, G2M, G2N, G2E:
- drivers/pinctrl/renesas/*
- CONFIG_xxx=y
- Documentation/devicetree/bindings/pinctrl/renesas,pcf.yaml
- RZ/G2L, G2LC, G2UL, V2L:
- drivers/pinctrl/renesas/pfc-rzg2l.c
- CONFIG_PINCTRL_RZG2L=y
- Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
Notes
Device Tree Examples
- (see device tree for evaluation board)
IRQ0-7
Linux Drivers
- RZ/G2H, G2M, G2N, G2E:
- CONFIG_xxx=y
- RZ/G2L, G2LC, G2UL, V2L:
- drivers/irqchip/irq-renesas-rzg2l.c
- CONFIG_RENESAS_RZG2L_IRQC=y
- Added after 'rz-5.10-cip13'
Notes
Device Tree Examples
Display
Linux Drivers
- Common:
- drivers/gpu/drm/rcar-du/*
- CONFIG_DRM_RCAR_DU=y
- RZ/G2H, G2M, G2N, G2E:
- CONFIG_DRM_RCAR_LVDS=y
- RZ/G2L, G2LC, G2UL, V2L:
- drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.h
- drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c
- drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi_regs.h
Notes
- Ports Node When defining ports { }, you must set #address-cells = <1>; and #size-cells = <0>;. For more information, see the documentation in the kernel source: Documentation/devicetree/bindings/media/video-interfaces.txt
- Resolution and Clock Definitions: An LCD Panel will have it's own separate driver. That driver will define the clock rate and resolution. The Renesas LCD driver will then get that information in order to set up the LCD controller (DU) output.
- MIPI DSI Overview: Here is a good article explaining the MIPI DSI interface, packets and commands. https://circuitcellar.com/resources/quickbits/mipi-display-serial-interface
- MIPI DCS Commands: Many (most) MIPI DSI Panels require setup command (DCS) to be set over MIPI DSI to configure the panel's controller before pixel data can be sent. This is why there is usually a separate driver for each LCD since these commands are specific to each LCD panel.
- Simple-Panel Driver: If you panel requires no special setup (no MIPI DSI DCS commands) or your system is doing it manually over I2C, you can use the kernels "simple-panel" driver. Note that you will be required to edit the driver file (drivers/gpu/drm/panel/panel-simple.c) to add your specific panel resolution and timing that you want. See kernel documentation Documentation/devicetree/bindings/panel/simple-panel.txt.
- Parallel RGB LCD: Since a parallel LCD does not need any special setup, you can use simple-panel driver in the kernel.
- Check Display Settings: You can use the command modetest -M rcar-du -c to check the status of your display driver. It will also show you the supported resolutions of your display (in the case that you are using an HDMI interface where it will read what is supported by the HDMI panel).
- Check VBLANK Timings: You can use the command vbltest -M rcar-du to check the VBLANK timings. If your result is always around 60Hz, your panel is set correctly.
Device Tree Examples:
- RZ/G2L: MIPI-CSI to HDMI Bridge: See device tree for evaluation board.
Example of MIPI DSI Panel on RZ/G2L |
&du { status = "okay"; }; &dsi0 { status = "okay"; #address-cells = <1>; #size-cells = <0>; ports { #address-cells = <1>; #size-cells = <0>; port@1 { dsi0_out: endpoint { remote-endpoint = <&panel_in>; data-lanes = <1 2>; }; }; }; panel@0 { compatible = "ilitek,ili9881c"; reg = <0>; dsi-lanes = <2>; enable-gpios = <&pinctrl RZG2L_GPIO(43, 0) GPIO_ACTIVE_HIGH>; backlight = <&backlight>; status = "okay"; port { panel_in: endpoint { remote-endpoint = <&dsi0_out>; }; }; }; }; |
Example of RGB Panel on RZ/G2L |
rgb-dummy { compatible = "renesas,rgb-dummy"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; rgb_in: endpoint { remote-endpoint = <&du_out_rgb>; }; }; port@1 { reg = <1>; rgb_out: endpoint { remote-endpoint = <&panel_in>; }; }; }; };
panel { /* * Define code for panel here such as compatible, backlight, power,... * Can refer drivers/gpu/drm/panel/panel-simple.c */ port { panel_in: endpoint { remote-endpoint = <&rgb_out>; }; }; };
port@0 { du_out_rgb: endpoint { remote-endpoint = <&rgb_in>; }; }; |
Audio
Linux Drivers
- RZ/G2H, G2M, G2N, G2E: rz_linux-cip/sound/soc/sh/rcar/*.c
- RZ/G2L, G2LC, G2UL, V2L: rz_linux-cip/sound/soc/sh/rz-ssi.c
Device Tree Examples
Example of MAX9867 codec with MAX98390 Amplifier for RZ/G2L |
Here is an example of a MAX9867 on SSI channel 3, using I2C-3. MAX98390 Amplifier on I2C-2. This is for the Linux-5.10 kernel. For the older Linux-4.19 kernel, there are some differences. Pin Setup &pinctrl { /* MAX98390 Amplifier */ i2c2_pins: i2c2 { pinmux = <RZG2L_PORT_PINMUX(42, 3, 1)>, /* SDA */ <RZG2L_PORT_PINMUX(42, 4, 1)>; /* SCL */ }; /* MAX9867 Codec */ i2c3_pins: i2c3 { pinmux = <RZG2L_PORT_PINMUX(18, 0, 3)>, /* SDA */ <RZG2L_PORT_PINMUX(18, 1, 3)>; /* SCL */ }; ssi3_pins: ssi3 { pinmux = <RZG2L_PORT_PINMUX(31, 0, 5)>, /* BCK */ <RZG2L_PORT_PINMUX(31, 1, 5)>, /* RCK */ <RZG2L_PORT_PINMUX(32, 0, 5)>, /* TXD */ <RZG2L_PORT_PINMUX(32, 1, 5)>; /* RXD */ }; }; Enable SSI channel &ssi3 { pinctrl-0 = <&ssi3_pins>; pinctrl-names = "default"; #sound-dai-cells = <1>; status = "okay"; }; Create a node for the MAX9867 my_snd: sound { compatible = "simple-audio-card"; simple-audio-card,widgets = "Speaker", "Ext Spk"; simple-audio-card,routing = "Ext Spk", "BE_OUT"; "Ext Spk", "LOUT", "Ext Spk", "ROUT"; /* MAX98390 Amplifier */ simple-audio-card,dai-link@0{ format = "i2s"; bitclock-master = <&cpu_dai3>; frame-master = <&cpu_dai3>; mclk-fs = <256>; cpu_dai3: cpu { sound-dai = <&ssi3>; }; codec_dai3: codec { sound-dai = <&max98390>; clocks = <&mclk>; }; }; /* MAX9867 Codec */ simple-audio-card,dai-link@1{ format = "i2s"; bitclock-master = <&cpu_dai0>; frame-master = <&cpu_dai0>; mclk-fs = <256>; cpu_dai0: cpu { sound-dai = <&ssi0>; }; codec_dai0: codec { sound-dai = <&max9867>; clocks = <&mclk>; }; }; };
&i2c2 { pinctrl-0 = <&i2c2_pins>; pinctrl-names = "default"; status = "okay"; clock-frequency = <400000>; /* MAX98390 Amplifier */ max98390: codec@3d { status = "okay"; compatible = "maxim,max98390"; #sound-dai-cells = <0>; reg = <0x3d>; }; }; &i2c3 { pinctrl-0 = <&i2c3_pins>; pinctrl-names = "default"; status = "okay"; clock-frequency = <400000>; /* MAX9867 Codec */ max9867: codec@18 { status = "okay"; compatible = "maxim,max9867"; #sound-dai-cells = <0>; reg = <0x18>; }; };
|
Camera
Linux Drivers
- RZ/G2H, G2M, G2N, G2E:
- CONFIG_xxx=y
- RZ/G2L, G2LC, G2UL, V2L:
- CONFIG_xxx=y
Notes
Device Tree Examples
- (see device tree for evaluation board)
Ethernet
Linux Drivers
- RZ/G2H, G2M, G2N, G2E, G2L, G2LC, G2UL, V2L:
- rz_linux-cip/drivers/net/ethernet/renesas/ (ravb_main.c, ravb_ptp.c)
- CONFIG_NET_VENDOR_RENESAS=y
- # CONFIG_SH_ETH is not set
- CONFIG_RAVB=y
Notes
- The Link Status input pin (LINKSTA) is not used. The driver instead relies on the PHY to inform it that the link is up by using in-band status messages on the RGMII lines.
- Do not forget to set the correct voltage levels for the pins (3.3v, 1.5v, etc..) in the device tree in the pinctrl node.
- You use the syntax "power-source = <3300>;" when you declare the pins for Ethernet.
- Refer to the pinctrl documentation in the kernel for more info.
- Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
- Documentation/devicetree/bindings/pinctrl/renesas,pcf.yaml
Device Tree Examples
Example of enabling MII mode for RZ/G2L |
Ethernet node for MII mode ð0 { pinctrl-0 = <ð0_mii_pins>; pinctrl-names = "default"; phy-handle = <&phy0>; phy-mode = "mii"; status = "okay"; phy0: ethernet-phy@7 { compatible = "ethernet-phy-id0022.1640", "ethernet-phy-ieee802.3-c22"; reg = <7>; rxc-skew-psec = <2400>; txc-skew-psec = <2400>; rxdv-skew-psec = <0>; txdv-skew-psec = <0>; rxd0-skew-psec = <0>; rxd1-skew-psec = <0>; rxd2-skew-psec = <0>; rxd3-skew-psec = <0>; txd0-skew-psec = <0>; txd1-skew-psec = <0>; txd2-skew-psec = <0>; txd3-skew-psec = <0>; interrupt-parent = <&pinctrl>; interrupts = <RZG2L_GPIO(1, 0) IRQ_TYPE_LEVEL_LOW>; }; }; ð1 { pinctrl-0 = <ð1_mii_pins>; pinctrl-names = "default"; phy-handle = <&phy1>; phy-mode = "mii"; status = "okay"; phy1: ethernet-phy@7 { compatible = "ethernet-phy-id0022.1640", "ethernet-phy-ieee802.3-c22"; reg = <7>; rxc-skew-psec = <2400>; txc-skew-psec = <2400>; rxdv-skew-psec = <0>; txdv-skew-psec = <0>; rxd0-skew-psec = <0>; rxd1-skew-psec = <0>; rxd2-skew-psec = <0>; rxd3-skew-psec = <0>; txd0-skew-psec = <0>; txd1-skew-psec = <0>; txd2-skew-psec = <0>; txd3-skew-psec = <0>; interrupt-parent = <&pinctrl>; interrupts = <RZG2L_GPIO(1, 1) IRQ_TYPE_LEVEL_LOW>; }; };
&pinctrl { eth0_mii_pins: eth0 { pinmux = <RZG2L_PORT_PINMUX(28, 1, 1)>, /* ET0_LINKSTA */ <RZG2L_PORT_PINMUX(27, 1, 1)>, /* ET0_MDC */ <RZG2L_PORT_PINMUX(28, 0, 1)>, /* ET0_MDIO */ <RZG2L_PORT_PINMUX(20, 0, 1)>, /* ET0_TXC */ <RZG2L_PORT_PINMUX(20, 1, 1)>, /* ET0_TX_CTL */ <RZG2L_PORT_PINMUX(20, 2, 1)>, /* ET0_TXD0 */ <RZG2L_PORT_PINMUX(21, 0, 1)>, /* ET0_TXD1 */ <RZG2L_PORT_PINMUX(21, 1, 1)>, /* ET0_TXD2 */ <RZG2L_PORT_PINMUX(22, 0, 1)>, /* ET0_TXD3 */ <RZG2L_PORT_PINMUX(22, 1, 1)>, /* ETH0_TX_ERR */ <RZG2L_PORT_PINMUX(23, 0, 1)>, /* ETH0_TX_COL */ <RZG2L_PORT_PINMUX(23, 1, 1)>, /* ETH0_TX_CRS */ <RZG2L_PORT_PINMUX(24, 0, 1)>, /* ET0_RXC */ <RZG2L_PORT_PINMUX(24, 1, 1)>, /* ET0_RX_CTL */ <RZG2L_PORT_PINMUX(25, 0, 1)>, /* ET0_RXD0 */ <RZG2L_PORT_PINMUX(25, 1, 1)>, /* ET0_RXD1 */ <RZG2L_PORT_PINMUX(26, 0, 1)>, /* ET0_RXD2 */ <RZG2L_PORT_PINMUX(26, 1, 1)>, /* ET0_RXD3 */ <RZG2L_PORT_PINMUX(27, 0, 1)>; /* ETH0_RX_ERR */ }; eth1_mii_pins: eth1 { pinmux = <RZG2L_PORT_PINMUX(37, 2, 1)>, /* ET1_LINKSTA */ <RZG2L_PORT_PINMUX(37, 0, 1)>, /* ET1_MDC */ <RZG2L_PORT_PINMUX(37, 1, 1)>, /* ET1_MDIO */ <RZG2L_PORT_PINMUX(29, 0, 1)>, /* ET1_TXC */ <RZG2L_PORT_PINMUX(29, 1, 1)>, /* ET1_TX_CTL */ <RZG2L_PORT_PINMUX(30, 0, 1)>, /* ET1_TXD0 */ <RZG2L_PORT_PINMUX(30, 1, 1)>, /* ET1_TXD1 */ <RZG2L_PORT_PINMUX(31, 0, 1)>, /* ET1_TXD2 */ <RZG2L_PORT_PINMUX(31, 1, 1)>, /* ET1_TXD3 */ <RZG2L_PORT_PINMUX(32, 0, 1)>, /* ETH1_TX_ERR */ <RZG2L_PORT_PINMUX(32, 1, 1)>, /* ETH1_TX_COL */ <RZG2L_PORT_PINMUX(33, 0, 1)>, /* ETH1_TX_CRS */ <RZG2L_PORT_PINMUX(33, 1, 1)>, /* ET1_RXC */ <RZG2L_PORT_PINMUX(34, 0, 1)>, /* ET1_RX_CTL */ <RZG2L_PORT_PINMUX(34, 1, 1)>, /* ET1_RXD0 */ <RZG2L_PORT_PINMUX(35, 0, 1)>, /* ET1_RXD1 */ <RZG2L_PORT_PINMUX(35, 1, 1)>, /* ET1_RXD2 */ <RZG2L_PORT_PINMUX(36, 0, 1)>, /* ET1_RXD3 */ <RZG2L_PORT_PINMUX(36, 1, 1)>; /* ETH1_RX_ERR */ }; }; |
USB
Linux Drivers
- RZ/G2H, G2M, G2N, G2E:
- CONFIG_xxx=y
- RZ/G2L, G2LC, G2UL, V2L:
- CONFIG_xxx=y
Notes
Device Tree Examples
- (see device tree for evaluation board)
SD Card
Linux Drivers
- RZ/G2H, G2M, G2N, G2E:
- CONFIG_xxx=y
- RZ/G2L, G2LC, G2UL, V2L:
- CONFIG_xxx=y
Notes
- Same as eMMC: The drivers for SD Card and SDIO are the same as eMMC. Please the section on eMMC.
- 3.3v Only: If you only provide 3.3v (do not support dynamically switching to 1.8v for UHS), then you should add the no-1-8-v; flag to the sdhi node. This flag is used for both kernel and u-boot device trees.
Device Tree Examples
- (see device tree for evaluation board)
eMMC
Linux Drivers
- RZ/G2H, G2M, G2N, G2E:
- RZ/G2L, G2LC, G2UL, V2L:
- driver/mmc/host/renesas_sdhi.h
- driver/mmc/host/renesas_sdhi_core.c
- driver/mmc/host/renesas_sdhi_internal_dmac.c
- driver/mmc/host/tmio_mmc.h
- driver/mmc/host/tmio_mmc_core.c
- CONFIG_MMC_SDHI=y
- CONFIG_MMC_SDHI_INTERNAL_DMAC=y (selected automatically by MMC_SDHI)
- CONFIG_MMC_TMIO_CORE=y (selected automatically by MMC_SDHI)
Notes
- Combo driver for MMC + SDHI HW
- The core of the SDHI code is using the TMIO (Toshiba Mobile IO) driver because it is the same HW block and they have shared the same driver for many years.
- CONFIG_MMC_SDHI_SYS_DMAC=y is selected automatically by MMC_SDHI, but is only for RZ/G1 series devices.
- Note that if you are using more than one mmc/sdhi channel, you might run into the issue that you don't get the same device number (ie, /dev/mmcblk0) each time you boot. To fix this, simply add an 'alias' to the top of your Device Tree to make each channel a fixed number. As an example:
aliases { mmc0 = &sdhi3; // eMMC Flash for rootfs mmc1 = &sdhi0; // SD Card Socket mmc2 = &sdhi2; // SDIO for WiFi };
Device Tree Examples
- (see device tree for evaluation board)
I2C
Linux Drivers
- RZ/G2H, G2M, G2N, G2E:
- CONFIG_xxx=y
- RZ/G2L, G2LC, G2UL, V2L:
- drivers/i2c/busses/ i2c-riic.c
- CONFIG_I2C_RIIC=y
Notes
Device Tree Examples
- (see device tree for evaluation board)
SPI
Linux Drivers
- MSIOF: RZ/G2H, G2M, G2N, G2E:
- CONFIG_xxx=y
- RSPI: RZ/G2L, G2LC, G2UL, V2L:
- drivers/spi/spi-rspi.c
- CONFIG_SPI_RSPI=y
Notes
Device Tree Examples
- (see device tree for evaluation board)
QSPI Flash
Linux Drivers
- RZ/G2H, G2M, G2N, G2E:
- drivers/spi/spi-rpc-if.c
- drivers/memory/renesas-rpc-if.c
- drivers/mtd/hyperbus/rpc-if.c
- CONFIG_SPI_RPCIF=y
- CONFIG_RENESAS_RPCIF=y
- CONFIG_RPCIF_HYPERBUS=y
- RZ/G2L, G2LC, G2UL, V2L:
- CONFIG_xxx=y
Notes
Device Tree Examples
- (see device tree for evaluation board)
UART (SCIF)
Linux Drivers
- RZ/G2H, G2M, G2N, G2E:
- CONFIG_xxx=y
- RZ/G2L, G2LC, G2UL, V2L:
- CONFIG_xxx=y
Notes
Device Tree Examples
- (see device tree for evaluation board)
UART (SCI)
Linux Drivers
- RZ/G2H, G2M, G2N, G2E:
- CONFIG_xxx=y
- RZ/G2L, G2LC, G2UL, V2L:
- CONFIG_xxx=y
Notes
Device Tree Examples
- (see device tree for evaluation board)
CAN
Linux Drivers
- RZ/G2H, G2M, G2N, G2E:
- CONFIG_xxx=y
- RZ/G2L, G2LC, G2UL, V2L:
- CONFIG_xxx=y
Notes
Device Tree Examples
- (see device tree for evaluation board)
ADC
Linux Drivers
- RZ/G2H, G2M, G2N, G2E:
- CONFIG_xxx=y
- RZ/G2L, G2LC, G2UL, V2L:
- CONFIG_xxx=y
Notes
Device Tree Examples
- (see device tree for evaluation board)
Watchdog Timer(WDT)
Linux Drivers
- RZ/G2H, G2M, G2N, G2E:
- rz_linux-cip/drivers/watchdog/renesas_wdt.c
- CONFIG_RENESAS_WDT
- RZ/G2L, G2LC, G2UL, V2L:
- rz_linux-cip/drivers/watchdog/rzg2l_wdt.c
- CONFIG_RENESAS_RZG2LWDT
Notes
- When rebooting the system, the watchdog timer is used. Simply type the command line "reboot" in the console.
- To test a watch dog timeout/reboot, enter this command in the console "cat >> /dev/watchdog", then press ENTER again, then wait 1 minutes, and the board should reboot.
- RZ/G2L: Reset on a WDT Timeout: There is a register in the CPG (WDT Reset Selector Register - CPG_WDTRST_SEL) to control if the WDT will reset the system or not. To generate a system RESET, you need to set it to 0x00010001. You can do this in u-boot, or when the kernel boots (in the CPG driver, not the WDT driver).
# Add this code to u-boot #define CPG_WDTRST_SEL (CPG_BASE + 0xB14) *(volatile u32 *)(CPG_WDTRST_SEL) = 0x00010001; - or - # Add this code to the kernel CPG driver # FILE: drivers/clk/renesas/rzg2l-cpg.c # FUNCTION: rzg2l_cpg_probe() # LINE: Before the 'return 0;' at the end of the funtion writel(0x00010001, (priv->base + 0xB14));
- RZ/G2L: Toggle WDTOVF_PERROUT# Note that by default, the WDTOVF_PERROUT# pin will not toggle on a WDT reboot. You need to set the CPG_WDTRST_SEL register manually in u-boot since Linux never touches that register. For example:
#define CPG_WDTRST_SEL (CPG_BASE + 0xB14) *(volatile u32 *)(CPG_WDTRST_SEL) = 0x00100010;
Device Tree Examples
- (see device tree for evaluation board)
PWM
Linux Drivers
- RZ/G2H, G2M, G2N, G2E:
- CONFIG_xxx=y
- RZ/G2L, G2LC, G2UL, V2L:
- CONFIG_xxx=y
Notes
Device Tree Examples
- (see device tree for evaluation board)
Timer
Linux Drivers
- RZ/G2H, G2M, G2N, G2E:
- CONFIG_xxx=y
- RZ/G2L, G2LC, G2UL, V2L:
- CONFIG_xxx=y
Notes
Device Tree Examples
- (see device tree for evaluation board)
Thermal
Linux Drivers
- RZ/G2H, G2M, G2N, G2E:
- drivers/thermal/rcar_gen3__thermal.c
- CONFIG_RCAR_GEN3_THERMAL=y
- RZ/G2L, G2LC, G2UL, V2L:
- drivers/thermal/rzg2l_thermal.c
- CONFIG_RZG2L_THERMAL=y
Notes
- The Linux driver reads the registers and applies the formula in the hardware manual
- You can read the current value running the command:
- $ cat /sys/class/thermal/thermal_zone0/temp
- The output value is in millicelsius
Device Tree Examples
- (see device tree for evaluation board)
PMIC RAA215300
Linux Drivers
- drivers/mfd/raa215300.c
- CONFIG_PMIC_RAA215300=y
- Documentation/devicetree/bindings/mfd/raa215300.txt
Notes
- Only supports RTC function
- Added in VLP/G v3.0.1 release (branch rz-5.10-cip13)
Device Tree Examples
- (see device tree for evaluation board)