YoloV5 TVM Implementation Guide: Difference between revisions

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'''Output'''
'''Output'''


<pre>
[DRP converter] Success & Finished
[DRP converter] Success & Finished


[Generate address map file] Start
[Generate address map file] Start
  > aimac_desc.bin size :   0x19cb0 (105648 Byte)
  > aimac_desc.bin size :   0x19cb0 (105648 Byte)
  > drp_desc.bin size   :     0xd60 (3424 Byte)
  > drp_desc.bin size   :     0xd60 (3424 Byte)
  > drp_param.bin size  :    0x1000 (4096 Byte)
  > drp_param.bin size  :    0x1000 (4096 Byte)
  [Address & data alignment check] PASS
  [Address & data alignment check] PASS
  [Check address map overlap (memory leak)] PASS
  [Check address map overlap (memory leak)] PASS
  Address map file: ./temp/20221024_171747/tvmgen_default_tvmgen_default_mera_drp_0/drp_compilation_output/out_addrmap_intm.yaml is generated.
  Address map file: ./temp/20221024_171747/tvmgen_default_tvmgen_default_mera_drp_0/drp_compilation_output/out_addrmap_intm.yaml is generated.
[Generate address map file] Finish
[Generate address map file] Finish
[Make Input/Output node information]
[Make Input/Output node information]
  Input node list : ./temp/20221024_171747/tvmgen_default_tvmgen_default_mera_drp_0/drp_compilation_output/out_data_in_list.txt is generated.
  Input node list : ./temp/20221024_171747/tvmgen_default_tvmgen_default_mera_drp_0/drp_compilation_output/out_data_in_list.txt is generated.
  Output node list : ./temp/20221024_171747/tvmgen_default_tvmgen_default_mera_drp_0/drp_compilation_output/out_data_out_list.txt is generated.
  Output node list : ./temp/20221024_171747/tvmgen_default_tvmgen_default_mera_drp_0/drp_compilation_output/out_data_out_list.txt is generated.
<nowiki>---------------------------------------------</nowiki>
<nowiki>---------------------------------------------</nowiki>
</pre>


'''CPU Only'''
'''CPU Only'''
 
<pre>
python3 compile_cpu_only_onnx_model.py \
python3 compile_cpu_only_onnx_model.py \
    ./yolov5s.onnx \
    ./yolov5s.onnx \
    -o yolov5s_onnx \
    -o yolov5s_onnx \
    -s 1,3,640,640 \
    -s 1,3,640,640 \
    -i images
    -i images
 
</pre>
= Application =
= Application =

Latest revision as of 23:18, 25 October 2022

This is a simple example of implementing the Renesas TVM using YoloV5.

YoloV5 Preparation

This sample will download the YoloV5 from this website.

Requirements:

  • pytorch
  • python
  • git

Download YoloV5s ONNX

This script by downloads the YoloV5s pt file and creates the onnx file. The input image size is set to 640x640.

YoloV5 supports various input resolutions. By default the script sets the input image size to 640x640.

python export.py --weights yolov5s.pt --include onnx


To change the size use the --imgsz option

python export.py --weights yolov5s.pt --imgsz [640, 480] --include onnx

Get NN Input Information

The TVM Scripts needs the NN input name and shape. The python library onnx can provide this information or this cloud application Netron

  • NN Input Node Name : images
  • NN Input Node Shape: 1,3,640,640

YoloV5 Translate

This section shows how to translate the aquired onnx file to the TVM inference. The Renesas TVM includes python scripts for converting onnx files for the RZV2MA DRP-AI.  These can be found in the drp-ai_tvm/tutorials directory.

ONNX Compiler

For this example we used the onnx compiler scripts.

DRP-AI + CPU

python3 compile_onnx_model.py \
./yolov5s.onnx \
-o yolov5s_onnx \
-s 1,3,640,640 \
-i images

Output

[DRP converter] Success & Finished

[Generate address map file] Start
  > aimac_desc.bin size :   0x19cb0 (105648 Byte)
  > drp_desc.bin size   :     0xd60 (3424 Byte)
  > drp_param.bin size  :    0x1000 (4096 Byte)
  [Address & data alignment check] PASS
  [Check address map overlap (memory leak)] PASS
  Address map file: ./temp/20221024_171747/tvmgen_default_tvmgen_default_mera_drp_0/drp_compilation_output/out_addrmap_intm.yaml is generated.
[Generate address map file] Finish
[Make Input/Output node information]
  Input node list : ./temp/20221024_171747/tvmgen_default_tvmgen_default_mera_drp_0/drp_compilation_output/out_data_in_list.txt is generated.
  Output node list : ./temp/20221024_171747/tvmgen_default_tvmgen_default_mera_drp_0/drp_compilation_output/out_data_out_list.txt is generated.
---------------------------------------------

CPU Only

python3 compile_cpu_only_onnx_model.py \
    ./yolov5s.onnx \
    -o yolov5s_onnx \
    -s 1,3,640,640 \
    -i images

Application