https://renesas.info/w/api.php?action=feedcontributions&user=Padhikari&feedformat=atomRenesas.info - User contributions [en]2024-03-28T16:44:35ZUser contributionsMediaWiki 1.39.5https://renesas.info/w/index.php?title=RZ-G/RZG_kernel&diff=2025RZ-G/RZG kernel2023-03-07T02:26:53Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G kernel Information}}<br />
← [[RZ-G]]<br />
<br />
= CPU Hotplug =<br />
You can enable and disable CPU cores by writing to a sysfs value.<br />
<br><br />
This is helpful for when you want to experiment with the performance of your application if you were to use a processor with less CPU cores.<br />
<br />
For example, this command will disable the 2nd core.<br />
<br />
<code>$ echo 0 > /sys/devices/system/cpu/cpu1/online</code><br />
<br />
More detailed information can be found here: https://www.cyberciti.biz/faq/debian-rhel-centos-redhat-suse-hotplug-cpu<br />
<br />
<br />
= Power Saving =<br />
* In Linux, this is a mechanism that is generally supported by all kernels.(it may depend on the version) <br />
* The Renesas kernel has support them. <br />
<br />
About power consumption in RZ/G2 series, we have some supported features to save power cost in default environment: <br />
* CPUHotplug: Turn on/off CPU in runtime. <br />
* CPUIdle: Support 2 modes to turn off clock or power domain of CPU when CPU is idle (nothing to do). <br />
** Sleep mode: put in sleep state. <br />
** Core standby mode: put in shutdown state. It is described in devicetree of each SoC => It has deeper state than sleep mode so that save more power. <br />
* CPUFreq: there are 6 governors to support "Dynamic Frequency Scaling": <br />
** '''Performance''': The frequency is always set maximum => It is using as default in our current environment. <br />
** '''Powersave''': The frequency is always set minimum. <br />
** '''Ondemand''': If CPU load is bigger than 95%, the frequency is set max. If CPU load is equal to or less than 95%, the frequency is set based on CPU load. <br />
** Conservative: If CPU load is bigger than 80%, the frequency is set one level higher than current frequency. If CPU load is equal to or less than 20%, the frequency is set one level lower than current frequency. <br />
** '''Userspace''': It sets frequency which is defined by user in runtime. <br />
** '''Schedutil''': Schedutil governor is driven by scheduler. It uses scheduler-provided CPU utilization information as input for making its decisions by formula: freq_next= 1.25 * freq_max* util_of_CPU. <br />
* Power Domain: it is supported as default by Linux Power Management Framework. If a module is not use, system will disable its clock and power domain automatically. <br />
<br />
Therefore, select proper method will be based on user's purpose. Here are my examples: <br />
* Want to use with best performance: disable CPUIdle + use performance frequency governor. <br />
* Want to use less power: enable CPUIdle + use powersave frequency governor. <br />
* Want to balance performance and power: we can use schedutil. <br />
* Want to modify frequency as user's purpose: use userspance frequency governor. <br />
* If user is running realtime environment, I suggest using performance governor to ensure the minimum latency. <br />
Here are some commands to check frequency value and frequency governor in linux: <br />
* Check available CPU frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_frequencies </code><br />
* Check available CPU frequency governor:<br />
: <code>cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_governors </code><br />
* Change to other governor:<br />
: <code>echo performance > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor (performance/userspace/schedutil/...) </code><br />
* Check current frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq</code><br />
* Change the current frequency:<br />
: <code> echo 15000 > /sys/devices/system/cpu/cpu*/cpufreq/scaling_max_freq</code><br />
<br />
= PMIC Access from Linux =<br />
The easiest way to access the PMIC registers from command line would would be to use i2ctools. Add the following line to your local.conf.<br />
: <code>IMAGE_INSTALL_append = " i2c-tools"</code><br />
<br />
However the PMICs are connected to a I2C (IIC for PMIC or I2C_DVFS) that is not enabled in the default kernel device tree.<br />
For the HiHope boards, you can edit the file <code>arch/arm64/boot/dts/renesas/hihope-common.dtsi</code> and add the following lines at the very bottom of the file.<br />
<pre><br />
&i2c_dvfs {<br />
status = "okay";<br />
};<br />
</pre><br />
<br />
Once booted in Linux, the corresponding device should be /dev/i2c-7 <br />
<br />
You can query the connected slaves by giving the following command: <br />
: <code> i2cdetect -y -r 7 </code><br />
that on the RZ/G2E board produces the output: <br />
<pre>0 1 2 3 4 5 6 7 8 9 a b c d e f <br />
00: -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1e 1f <br />
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
70: -- -- -- -- -- -- -- -- </pre><br />
So two slaves, at address 0x1e and 0x1f. <br />
Finally you can read registers by simply using the i2cget command, for example: <br />
<pre><br />
i2cget -y 7 0x1e 0x1 <br />
0x02 <br />
i2cget -y 7 0x1e 0x16 <br />
0x00 <br />
i2cget -y 7 0x1e 0x17 <br />
0xc4 <br />
</pre><br />
<br />
If you don't want (or can't) update the device tree blob, you could use u-boot to do it temporarily.<br />
The procedure below is valid for RZ/G2M but it works also with RZ/G2E-N-H by simply modifying the device tree blob and/or kernel image names. <br />
<br />
1) Interrupt the normal kernel boot<br />
<br />
2) Once in u-boot, enter the follow commands (after each RESET)<br />
<pre>=> fatload mmc 0:1 0x48080000 Image; fatload mmc 0:1 0x48000000 Image-r8a774a1-hihope-rzg2m-ex.dtb; <br />
=> fdt addr 0x48000000 <br />
=> fdt set /soc/i2c@e60b0000 status "okay"</pre><br />
and finally boot the kernel: <br />
<pre>=> booti 0x48080000 - 0x48000000 </pre><br />
<br />
= Create a uImage =<br />
In the kernel, there is no make target to make a uImage for the 64-bit ARM architecture like there is for 32-bit ARM.<br />
However, you can manually make one from the file Image.gz that is created by the kernel build system by using the following command on your host machine.<br />
<pre><br />
$ cd arch/arm64/boot<br />
$ mkimage -A arm64 -O linux -T kernel -C gzip -a 0x48080000 -e 0x48080000 -n "Linux Kernel Image" -d Image.gz uImage<br />
</pre><br />
<br />
Below is an example of booting this image on a RZ/G2 HiHiope board from u-boot.<br />
<pre><br />
=> fatload mmc 0:1 0x88000000 uImage<br />
=> fatload mmc 0:1 0x48000000 Image-r8a774e1-hihope-rzg2h-ex.dtb<br />
=> bootm 0x88000000 - 0x48000000<br />
</pre><br />
<br />
= Building mainline / LTS Linux kernel for RZ/G2E-N-M-H =<br />
The Verified Linux Package (VLP) includes the CIP kernel (v4.19.x) and this is the only official way to build a kernel that has all the features in. However it is possible to build a working kernel directly from mainline. The kernel built in this way does not provide most of the multimedia functionalities (e.g. GPU, codec, etc). <br />
<br />
A recent [https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads Linaro toolchain] is needed to build the kernel. The instructions below are for v5.10.x, newer kernel versions can be built as well in a similar way.<br />
git clone <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/</nowiki><br />
<br />
git checkout tags/v5.10.42<br />
or anyway the latest minor revision including bug fixes.<br />
<br />
Copy Renesas default kernel build into .out/.config:<br />
cp arch/arm64/configs/renesas_defconfig .out/.config<br />
or, if not present, get from the repository:<br />
wget -O .out/.config <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/plain/arch/arm64/configs/renesas_defconfig</nowiki><br />
If you want to be able to build modules:<br />
echo CONFIG_MODULES=y >> .out/.config<br />
<br />
echo CONFIG_MODULE_UNLOAD=y >> .out/.config<br />
Run kernel configuration:<br />
make O=.out menuconfig<br />
Exit and save. Then launch the build:<br />
make O=.out all -j$(nproc)<br />
<br />
= Renesas RZ/G2 PCIe Endpoint Driver =<br />
* [[RZ-G/RZG2_pcie_ep | Click Here]]<br />
<br />
= GPIO Pin Usage =<br />
Since linux-4.8 the GPIO sysfs interface is [https://www.kernel.org/doc/Documentation/gpio/sysfs.txt deprecated]. User space should use the character device instead. The libgpiod library encapsulates the ioctl calls and data structures behind a straightforward API.<br />
<br />
Also, the kernel source code contains a GPIO utility for user space. Please see directory tools/gpio/ in the kernel source code.<br />
<br />
== Character Device (/dev) Interface ==<br />
* Access to GPIO pins can be made using the /dev driver interfaces.<br />
* Official kernel documentation on this interface can be found here: https://docs.kernel.org/driver-api/gpio/using-gpio.html<br />
* The Linux kernel is distributed with three basic user-mode tools written for testing the GPIO interface. The source can be found in linux/tools/gpio/.<br />
* The three tools are:<br />
: 1) lsgpio – example on how to list the GPIO lines on a system<br />
: 2) gpio-event-mon – monitor GPIO line events from userspace<br />
: 3) gpio-hammer - example to shake GPIO lines on a system<br />
* Note: These are useful for debugging GPIO lines, but none of these tools will allow the user to configure, set and clear GPIO lines.<br />
* However, you can use the user API (chip info, line info, line request for values, reading values, setting values, line request for events, polling for events and reading events) from linux/gpio.h to program GPIO.<br />
<br />
'''RZ/G2M/H/N/E Numbering'''<br />
* GPIO pin number for '''RZ/G2M/H/N/E''' is determined by using the command line tool '''lsgpio''':<br />
* The RZ/G2M/H/N/E have multiple gpiochip interfaces.<br />
<pre><br />
GPIO chip: gpiochip6, "e6055400.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
GPIO chip: gpiochip5, "e6055000.gpio", 20 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 19: unnamed unused [output]<br />
GPIO chip: gpiochip4, "e6054000.gpio", 11 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 10: unnamed unused<br />
GPIO chip: gpiochip3, "e6053000.gpio", 16 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 15: unnamed unused<br />
GPIO chip: gpiochip2, "e6052000.gpio", 26 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 25: unnamed "wlan-en-regulator" [kernel output]<br />
GPIO chip: gpiochip1, "e6051000.gpio", 23 GPIO lines<br />
line 0: unnamed "interrupt" [kernel]<br />
....<br />
....<br />
line 22: unnamed unused<br />
GPIO chip: gpiochip0, "e6050000.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
</pre><br />
<br />
* For example, to access LED0, which is defined as GPIO5-19, you will use gpiochip5 chip and line 19.<br />
<br />
'''RZ/G2L Numbering'''<br />
* For RZ/G2L, the port numbering in the hardware manual and schematics are P0_0, P43_0, etc...<br />
* This shows you the port number and the pin number as '''Px_y''' (x: port number, y: pin number)<br />
* The equation to find the corresponding global port number is: '''(8*x + y)'''<br />
* For examples, P0_0 is 0 (8*0+0), P5_1 is 41 (8*5+1).<br />
* The RZ/G2L has only 1 gpiochip interface.<br />
<pre><br />
GPIO chip: gpiochip0, "11030000.pin-controller", 392 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 390: unnamed unused<br />
line 391: unnamed unused<br />
</pre><br />
* Example: To access, P43_1, you need to use, gpiochip0 and line 345 (43*8 + 1)<br><br />
* [[Media:gpio_led_linux.zip| Sample Code]] to blink LED0(GPIO5-19) RZG2E RevC using linux/gpio.h API<br />
* Note: To run, download the source code. You also need to install the yocto SDK for RZG2E Rev C<br><br />
<pre><br />
$ source /opt/poky/2.4.3/environment-setup-aarch64-poky-linux<br />
$ make<br />
</pre><br />
<br />
== libgpiod – C library & tools ==<br />
* libgpiod is a C library and tools for interacting the Linux GPIO character device.<br />
* To use libgpiod with RZ-G, in yocto, add the recipe to image. This can be done in local.conf with <br />
<pre><br />
IMAGE_INSTALL_append = “ libgpiod libgpiod-tools”<br />
</pre><br />
<br />
'''Command Line Tools:'''<br />
<br />
1) '''gpiodetect''': To find out which GPIO banks and how many GPIO lines are available on the hardware<br><br />
*Ex: for RZG2E:<br />
<pre><br />
root@ek874:~# gpiodetect<br />
gpiochip6 [e6055400.gpio] (18 lines)<br />
gpiochip5 [e6055000.gpio] (20 lines)<br />
gpiochip4 [e6054000.gpio] (11 lines)<br />
gpiochip3 [e6053000.gpio] (16 lines)<br />
gpiochip2 [e6052000.gpio] (26 lines)<br />
gpiochip1 [e6051000.gpio] (23 lines)<br />
gpiochip0 [e6050000.gpio] (18 lines)<br />
</pre><br />
* In case of RZG2E, you have 7 char devices, seven GPIO banks<br />
2) '''gpioinfo''': List all lines of specified gpiochips, their names, direction, active state and additional flags<br><br />
<pre><br />
gpiochip1 - 23 lines:<br />
line 0: unnamed "interrupt" input active-high [kernel]<br />
line 1: unnamed "interrupt" input active-high [kernel]<br />
....<br />
.... <br />
line 22: unnamed unused input active-high <br />
gpiochip0 - 18 lines:<br />
line 0: unnamed unused input active-high <br />
line 1: unnamed unused input active-high <br />
....<br />
....<br />
line 17: unnamed unused input active-high<br />
</pre><br />
3) '''gpiofind''': Find the gpiochip name and line offset given the line name. For RZ/G, we do not have pin name export in driver, so we can not use pin name to find the pin line.<br />
<br> <br><br />
4) '''gpioset''': Set the values of specified GPIO lines. gpioset expects the bank, gpiochip, GPIO line and the value to be set, 1 for HIGH and 0 for LOW active-high standard<br><br />
* ⚠ Note: gpioset (and all libgpiod apps) will '''revert the state''' of a GPIO line back to its '''original value when it exits'''. For this reason if you want the state to persist you need to instruct gpioset to wait for a signal and optionally detach and run in the background.<br><br />
Examples:<br />
<pre><br />
gpioset gpiochip5 3=1 ### To set the line 3 of gpiochip5 to 1 (but it will also immediately go back to 0)<br />
gpioset --mode=signal --background gpiochip5 19=1 ### Set the pin to 1, but continue to running in the background so the pin will stay 1<br />
gpioset --mode=time –-sec=1 gpiochip0 328=0 ### toggle the pin for 1 sec<br />
gpioset --mode=wait gpiochip0 328=0 ### toggle the pin and wait the user to press ENTER<br />
</pre><br />
<br />
5) '''gpioget''': Read values of specified GPIO lines<br><br />
*Ex: read line 10 of gpiochip6<br />
<pre>root@ek874:~# gpioget gpiochip6 10</pre><br />
* [[Media:gpio_led_libgpiod_rzg2l.zip| Sample Code]] using PMOD Module(https://store.digilentinc.com/pmod-led-four-high-brightness-leds/) and RZG2L<br />
* Note: To run, download the source code. You also need to install the yocto SDK for RZG2L <br><br />
* [[Media:gpio_led_libgpiod.zip| Sample Code]] to blink LED0(GPIO5-19) RZG2E RevC using libgpiod API<br />
* Note: To run, download the source code. You also need to install the yocto SDK for RZG2E Rev C<br><br />
<pre><br />
$ source /opt/poky/2.4.3/environment-setup-aarch64-poky-linux<br />
$ make<br />
</pre><br />
<br />
== Using sysfs interface ==<br />
* GPIO pins can be configured, monitored and controller on the command line using the system (/sys) interface<br />
<br />
<br><br />
<br />
'''RZ/G2M/H/N/E Numbering for sysfs'''<br />
<br />
* GPIO pin number for RZ/G2M/H/N/E is determined by: '''GPIO_ID = GPIO Bank Address + Pin Number''' <br />
<pre><br />
RZ/G2E RZ/G2M/N/H<br />
GPIO Bank Address GPIO Bank Address<br />
GPIO 0 494 GPIO 0 496 <br />
GPIO 1 471 GPIO 1 467<br />
GPIO 2 445 GPIO 2 452 <br />
GPIO 3 429 GPIO 3 436<br />
GPIO 4 418 GPIO 4 418<br />
GPIO 5 398 GPIO 5 392<br />
GPIO 6 380 GPIO 6 360<br />
GPIO 7 356<br />
</pre><br />
<br />
* For example, on RZ/G2E, GPIO number of GP5_19 is 398 + 19 = 417<br />
* On the RZ/G2E (Rev C) board, to turn on/off LED0 GP5_19 => gpio417<br />
* NOTE: GP5_19 is defined as a GPIO LED0 in Device Tree. So you need to either remove that from the Device Tree and reprogram the board, or you can remove it from device tree in uboot using fdt command. Below is the example using fdt.<br />
<pre><br />
=> setenv gpioLED_1=fatload mmc 0:1 0x48080000 Image-ek874.bin; fatload mmc 0:1 0x48000000 Image-r8a774c0-ek874-revc-mipi-2.1.dtb<br />
=> setenv gpioLED_2=fdt addr 0x48000000 ; fdt rm /leds<br />
=> setenv gpioLED_3=booti 0x48080000 - 0x48000000<br />
=> setenv gpioLED_boot=run gpioLED_1 gpioLED_2 gpioLED_3<br />
=> setenv<br />
** Then run the command to boot<br />
=> run gpioLED_boot<br />
</pre><br />
* Now, lets turn on/off switch using sysfs:<br />
<pre><br />
root@ek874:~# echo 417 > /sys/class/gpio/export # request gpio417<br />
root@ek874:~# echo out > /sys/class/gpio/gpio417/direction # set gpio417 (GP5_19) output<br />
root@ek874:~# echo 1 > /sys/class/gpio/gpio417/value # turn ON LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
1<br />
root@ek874:~# echo 0 > /sys/class/gpio/gpio417/value # turn OFF LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
0<br />
</pre><br />
<br />
'''RZ/G2L Pin Numbering for sysfs'''<br />
<br />
* GPIO pin number is determined by formula: '''GPIO_ID = GPIO_port * 8 + GPIO_pin + 120'''<br />
* Note that there is a 120 value offset when using the sysfs interface that is not there when using the /dev or libgpio interface<br />
* Example: '''P42_4''' has its id '''460''' with above formula ('''42 * 8 + 4 + 120''')<br />
* For example, on the RZ/G2L EVK, using a GPIO as input by using PMOD slide switch https://digilent.com/shop/pmod-swt-4-user-slide-switches/<br />
<pre><br />
root@smarc-rzg2l:~# echo 460 > /sys/class/gpio/export<br />
root@smarc-rzg2l:~# echo in > /sys/class/gpio/gpio460/direction <br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value <br />
1<br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value # after switch off<br />
0<br />
</pre><br />
== GPIO Interrupt in Linux userspace ==<br />
One way to work with GPIO interrupts from user space is by polling the GPIO to detect when its value changes.<br />
Depending on the mechanism you use to work with GPIOS in user space, there may be dedicated wait() or poll() method for that. For example, the libgpiod has a method called gpiod_line_event_wait() to wait for any event change in GPIO line. Another option is using character device interface, using line evets structures and functions.<br />
=== Using libgpiod line events ===<br />
libgpiod line events handling has the structures and functions to poll lines for events<br />
<pre><br />
Data Structures:<br />
struct gpiod_line_event<br />
Structure holding event info<br />
Enumerations<br />
enum { GPIOD_LINE_EVENT_RISING_EDGE = 1, GPIOD_LINE_EVENT_FALLING_EDGE }<br />
Event types<br />
Functions<br />
int gpiod_line_event_wait (struct gpiod_line *line, const struct timespec *timeout)<br />
Wait for an event on a single line. <br />
<br />
int gpiod_line_event_wait_bulk (struct gpiod_line_bulk *bulk, const struct timespec *timeout, struct gpiod_line_bulk *event_bulk)<br />
Wait for events on a set of lines.<br />
<br />
int gpiod_line_event_read (struct gpiod_line *line, struct gpiod_line_event *event)<br />
Read the last event from the GPIO line.<br />
</pre><br />
* Example source code can be found here https://github.com/renesas-rz/rzg2l_smarc_sample_code/tree/master/gpio-examples/libgpiod-examples/libgpiod-event<br />
<br />
== IRQ Interrupt ==<br />
<br />
IRQ interrupt is the interrupt from IRQ0-7 input pins.<br />
Using IRQ pins as interrupt must be mapped GPIO pins onto IRQ pins by GPIO register setting.<br />
There are diffrent options that IRQ pin can be used in Linux:<br />
- Write your own custom kernel driver<br />
- Create an UIO(userspace IO) driver<br />
- Use an existing kernel driver like gpio-keys<br />
Here we are using 3rd method, configuring the IRQ pin as gpio-keys device.<br />
<br />
=== Configure IRQ pin ===<br />
For RZ/G2L board, there is a switch connected to a IRQ pin. You can register that pin in the device tree and wait on it in user space to use in your application<br />
gpio-keys is part of Linux input subsystem that can be used as key driver which can generate gpio interrupt. gpio-keys is much easier to use since it offers<br />
proper interrupt handling and work well with multi-key setups by mapping each key to a Linux code, the entire gpio-keys node will be read as a single device with multiple key codes.<br />
<br />
=== Device Tree bindings ===<br />
<pre><br />
user_key {<br />
compatible = "gpio-keys";<br />
pinctrl-names = "default";<br />
#address-cells = <1>;<br />
#size-cells = <0>;<br />
pinctrl-0 = <&user_key_pin>;<br />
button@1{<br />
interrupt-parent = <&intc_ex>;<br />
interrupts = <7 IRQ_TYPE_EDGE_BOTH>;<br />
linux,code = <KEY_3>;<br />
label = "SW1";<br />
debounce-interval = <50>;<br />
};<br />
};<br />
</pre><br />
Mapping to GPIO pin:<br />
<pre><br />
&pinctrl{<br />
user_key_pin: user_key {<br />
pinmux = <RZG2L_PORT_PINMUX(3, 1, 1)>; /* IRQ7 */<br />
};<br />
}; <br />
</pre><br />
Enable the IRQ in device tree if it is not enabled by default<br />
<pre><br />
&intc_ex {<br />
status = "okay";<br />
};<br />
</pre><br />
=== Testing interrupt in userspace ===<br />
Connect PMOD button module to PMOD1 7-12. The IRQ7 is conncted to Pmod1_pin7. <br />
You can check the interrupt value by pushing the button. Since the interrupt <br />
is configured for edge type both so you should get interrupt for both falling and rising event.<br />
<pre><br />
root@smarc-rzg2l:~# cat /proc/interrupts | grep SW1<br />
226: 0 0 110a0000.intc_ex 7 Edge SW1<br />
root@smarc-rzg2l:~# cat /proc/interrupts | grep SW1 //button pressed 1<br />
226: 2 0 110a0000.intc_ex 7 Edge SW1<br />
root@smarc-rzg2l:~# cat /proc/interrupts | grep SW1 //button presses 2<br />
226: 4 0 110a0000.intc_ex 7 Edge SW1<br />
</pre><br />
You can check the the input device for your user user key and also check which event handler it is binding to.<br />
<pre><br />
root@smarc-rzg2l:~# cat /proc/bus/input/devices<br />
I: Bus=0019 Vendor=0001 Product=0001 Version=0100<br />
N: Name="user_key"<br />
P: Phys=gpio-keys/input0<br />
S: Sysfs=/devices/platform/user_key/input/input0<br />
U: Uniq=<br />
H: Handlers=kbd event0 <br />
B: PROP=0<br />
B: EV=3<br />
B: KEY=10<br />
</pre> <br />
From output, you can see user_key is binding with handler event0.<br />
You can check if the you get the event by pressing the button<br />
<pre><br />
root@smarc-rzg2l:~# cat /dev/input/event0<br />
�d�<br />
�d�<br />
�d��<br />
�d��<br />
�dr<br />
�dr<br />
�d)B<br />
�d)�d��d��d%Z�d%Z�d/0�d/0�d� �d�<br />
</pre><br />
There is also tool called evtest to test the event. To use this tool, you need to add evtest in your yocto build.<br />
<pre><br />
IMAGE_INSTALL_append = " evtest lib32-evtest"<br />
</pre><br />
<pre><br />
root@smarc-rzg2l:~# evtest /dev/input/event0 <br />
Input driver version is 1.0.1<br />
Input device ID: bus 0x19 vendor 0x1 product 0x1 version 0x100<br />
Input device name: "user_key"<br />
Supported events:<br />
Event type 0 (EV_SYN)<br />
Event type 1 (EV_KEY)<br />
Event code 4 (KEY_3)<br />
Properties:<br />
Testing ... (interrupt to exit)<br />
Event: time 1678155326.1678155326, type 1 (EV_KEY), code 4 (KEY_3), value 1<br />
Event: time 1678155326.1678155326, -------------- SYN_REPORT ------------<br />
Event: time 1678155326.1678155326, type 1 (EV_KEY), code 4 (KEY_3), value 0<br />
Event: time 1678155326.1678155326, -------------- SYN_REPORT ------------<br />
<br />
Event: time 1678155326.1678155326, type 1 (EV_KEY), code 4 (KEY_3), value 1<br />
Event: time 1678155326.1678155326, -------------- SYN_REPORT ------------<br />
Event: time 1678155326.1678155326, type 1 (EV_KEY), code 4 (KEY_3), value 0<br />
Event: time 1678155326.1678155326, -------------- SYN_REPORT ------------<br />
</pre><br />
<br />
* Example source code using above irq configured as gpio-keys where the application wait for event and blink the led on/off for both rising and falling edge. The source code can be found here https://github.com/renesas-rz/rzg2l_smarc_sample_code/tree/master/gpio-examples/irq-interrupt</div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_kernel&diff=2024RZ-G/RZG kernel2023-03-07T01:00:02Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G kernel Information}}<br />
← [[RZ-G]]<br />
<br />
= CPU Hotplug =<br />
You can enable and disable CPU cores by writing to a sysfs value.<br />
<br><br />
This is helpful for when you want to experiment with the performance of your application if you were to use a processor with less CPU cores.<br />
<br />
For example, this command will disable the 2nd core.<br />
<br />
<code>$ echo 0 > /sys/devices/system/cpu/cpu1/online</code><br />
<br />
More detailed information can be found here: https://www.cyberciti.biz/faq/debian-rhel-centos-redhat-suse-hotplug-cpu<br />
<br />
<br />
= Power Saving =<br />
* In Linux, this is a mechanism that is generally supported by all kernels.(it may depend on the version) <br />
* The Renesas kernel has support them. <br />
<br />
About power consumption in RZ/G2 series, we have some supported features to save power cost in default environment: <br />
* CPUHotplug: Turn on/off CPU in runtime. <br />
* CPUIdle: Support 2 modes to turn off clock or power domain of CPU when CPU is idle (nothing to do). <br />
** Sleep mode: put in sleep state. <br />
** Core standby mode: put in shutdown state. It is described in devicetree of each SoC => It has deeper state than sleep mode so that save more power. <br />
* CPUFreq: there are 6 governors to support "Dynamic Frequency Scaling": <br />
** '''Performance''': The frequency is always set maximum => It is using as default in our current environment. <br />
** '''Powersave''': The frequency is always set minimum. <br />
** '''Ondemand''': If CPU load is bigger than 95%, the frequency is set max. If CPU load is equal to or less than 95%, the frequency is set based on CPU load. <br />
** Conservative: If CPU load is bigger than 80%, the frequency is set one level higher than current frequency. If CPU load is equal to or less than 20%, the frequency is set one level lower than current frequency. <br />
** '''Userspace''': It sets frequency which is defined by user in runtime. <br />
** '''Schedutil''': Schedutil governor is driven by scheduler. It uses scheduler-provided CPU utilization information as input for making its decisions by formula: freq_next= 1.25 * freq_max* util_of_CPU. <br />
* Power Domain: it is supported as default by Linux Power Management Framework. If a module is not use, system will disable its clock and power domain automatically. <br />
<br />
Therefore, select proper method will be based on user's purpose. Here are my examples: <br />
* Want to use with best performance: disable CPUIdle + use performance frequency governor. <br />
* Want to use less power: enable CPUIdle + use powersave frequency governor. <br />
* Want to balance performance and power: we can use schedutil. <br />
* Want to modify frequency as user's purpose: use userspance frequency governor. <br />
* If user is running realtime environment, I suggest using performance governor to ensure the minimum latency. <br />
Here are some commands to check frequency value and frequency governor in linux: <br />
* Check available CPU frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_frequencies </code><br />
* Check available CPU frequency governor:<br />
: <code>cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_governors </code><br />
* Change to other governor:<br />
: <code>echo performance > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor (performance/userspace/schedutil/...) </code><br />
* Check current frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq</code><br />
* Change the current frequency:<br />
: <code> echo 15000 > /sys/devices/system/cpu/cpu*/cpufreq/scaling_max_freq</code><br />
<br />
= PMIC Access from Linux =<br />
The easiest way to access the PMIC registers from command line would would be to use i2ctools. Add the following line to your local.conf.<br />
: <code>IMAGE_INSTALL_append = " i2c-tools"</code><br />
<br />
However the PMICs are connected to a I2C (IIC for PMIC or I2C_DVFS) that is not enabled in the default kernel device tree.<br />
For the HiHope boards, you can edit the file <code>arch/arm64/boot/dts/renesas/hihope-common.dtsi</code> and add the following lines at the very bottom of the file.<br />
<pre><br />
&i2c_dvfs {<br />
status = "okay";<br />
};<br />
</pre><br />
<br />
Once booted in Linux, the corresponding device should be /dev/i2c-7 <br />
<br />
You can query the connected slaves by giving the following command: <br />
: <code> i2cdetect -y -r 7 </code><br />
that on the RZ/G2E board produces the output: <br />
<pre>0 1 2 3 4 5 6 7 8 9 a b c d e f <br />
00: -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1e 1f <br />
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
70: -- -- -- -- -- -- -- -- </pre><br />
So two slaves, at address 0x1e and 0x1f. <br />
Finally you can read registers by simply using the i2cget command, for example: <br />
<pre><br />
i2cget -y 7 0x1e 0x1 <br />
0x02 <br />
i2cget -y 7 0x1e 0x16 <br />
0x00 <br />
i2cget -y 7 0x1e 0x17 <br />
0xc4 <br />
</pre><br />
<br />
If you don't want (or can't) update the device tree blob, you could use u-boot to do it temporarily.<br />
The procedure below is valid for RZ/G2M but it works also with RZ/G2E-N-H by simply modifying the device tree blob and/or kernel image names. <br />
<br />
1) Interrupt the normal kernel boot<br />
<br />
2) Once in u-boot, enter the follow commands (after each RESET)<br />
<pre>=> fatload mmc 0:1 0x48080000 Image; fatload mmc 0:1 0x48000000 Image-r8a774a1-hihope-rzg2m-ex.dtb; <br />
=> fdt addr 0x48000000 <br />
=> fdt set /soc/i2c@e60b0000 status "okay"</pre><br />
and finally boot the kernel: <br />
<pre>=> booti 0x48080000 - 0x48000000 </pre><br />
<br />
= Create a uImage =<br />
In the kernel, there is no make target to make a uImage for the 64-bit ARM architecture like there is for 32-bit ARM.<br />
However, you can manually make one from the file Image.gz that is created by the kernel build system by using the following command on your host machine.<br />
<pre><br />
$ cd arch/arm64/boot<br />
$ mkimage -A arm64 -O linux -T kernel -C gzip -a 0x48080000 -e 0x48080000 -n "Linux Kernel Image" -d Image.gz uImage<br />
</pre><br />
<br />
Below is an example of booting this image on a RZ/G2 HiHiope board from u-boot.<br />
<pre><br />
=> fatload mmc 0:1 0x88000000 uImage<br />
=> fatload mmc 0:1 0x48000000 Image-r8a774e1-hihope-rzg2h-ex.dtb<br />
=> bootm 0x88000000 - 0x48000000<br />
</pre><br />
<br />
= Building mainline / LTS Linux kernel for RZ/G2E-N-M-H =<br />
The Verified Linux Package (VLP) includes the CIP kernel (v4.19.x) and this is the only official way to build a kernel that has all the features in. However it is possible to build a working kernel directly from mainline. The kernel built in this way does not provide most of the multimedia functionalities (e.g. GPU, codec, etc). <br />
<br />
A recent [https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads Linaro toolchain] is needed to build the kernel. The instructions below are for v5.10.x, newer kernel versions can be built as well in a similar way.<br />
git clone <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/</nowiki><br />
<br />
git checkout tags/v5.10.42<br />
or anyway the latest minor revision including bug fixes.<br />
<br />
Copy Renesas default kernel build into .out/.config:<br />
cp arch/arm64/configs/renesas_defconfig .out/.config<br />
or, if not present, get from the repository:<br />
wget -O .out/.config <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/plain/arch/arm64/configs/renesas_defconfig</nowiki><br />
If you want to be able to build modules:<br />
echo CONFIG_MODULES=y >> .out/.config<br />
<br />
echo CONFIG_MODULE_UNLOAD=y >> .out/.config<br />
Run kernel configuration:<br />
make O=.out menuconfig<br />
Exit and save. Then launch the build:<br />
make O=.out all -j$(nproc)<br />
<br />
= Renesas RZ/G2 PCIe Endpoint Driver =<br />
* [[RZ-G/RZG2_pcie_ep | Click Here]]<br />
<br />
= GPIO Pin Usage =<br />
Since linux-4.8 the GPIO sysfs interface is [https://www.kernel.org/doc/Documentation/gpio/sysfs.txt deprecated]. User space should use the character device instead. The libgpiod library encapsulates the ioctl calls and data structures behind a straightforward API.<br />
<br />
Also, the kernel source code contains a GPIO utility for user space. Please see directory tools/gpio/ in the kernel source code.<br />
<br />
== Character Device (/dev) Interface ==<br />
* Access to GPIO pins can be made using the /dev driver interfaces.<br />
* Official kernel documentation on this interface can be found here: https://docs.kernel.org/driver-api/gpio/using-gpio.html<br />
* The Linux kernel is distributed with three basic user-mode tools written for testing the GPIO interface. The source can be found in linux/tools/gpio/.<br />
* The three tools are:<br />
: 1) lsgpio – example on how to list the GPIO lines on a system<br />
: 2) gpio-event-mon – monitor GPIO line events from userspace<br />
: 3) gpio-hammer - example to shake GPIO lines on a system<br />
* Note: These are useful for debugging GPIO lines, but none of these tools will allow the user to configure, set and clear GPIO lines.<br />
* However, you can use the user API (chip info, line info, line request for values, reading values, setting values, line request for events, polling for events and reading events) from linux/gpio.h to program GPIO.<br />
<br />
'''RZ/G2M/H/N/E Numbering'''<br />
* GPIO pin number for '''RZ/G2M/H/N/E''' is determined by using the command line tool '''lsgpio''':<br />
* The RZ/G2M/H/N/E have multiple gpiochip interfaces.<br />
<pre><br />
GPIO chip: gpiochip6, "e6055400.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
GPIO chip: gpiochip5, "e6055000.gpio", 20 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 19: unnamed unused [output]<br />
GPIO chip: gpiochip4, "e6054000.gpio", 11 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 10: unnamed unused<br />
GPIO chip: gpiochip3, "e6053000.gpio", 16 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 15: unnamed unused<br />
GPIO chip: gpiochip2, "e6052000.gpio", 26 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 25: unnamed "wlan-en-regulator" [kernel output]<br />
GPIO chip: gpiochip1, "e6051000.gpio", 23 GPIO lines<br />
line 0: unnamed "interrupt" [kernel]<br />
....<br />
....<br />
line 22: unnamed unused<br />
GPIO chip: gpiochip0, "e6050000.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
</pre><br />
<br />
* For example, to access LED0, which is defined as GPIO5-19, you will use gpiochip5 chip and line 19.<br />
<br />
'''RZ/G2L Numbering'''<br />
* For RZ/G2L, the port numbering in the hardware manual and schematics are P0_0, P43_0, etc...<br />
* This shows you the port number and the pin number as '''Px_y''' (x: port number, y: pin number)<br />
* The equation to find the corresponding global port number is: '''(8*x + y)'''<br />
* For examples, P0_0 is 0 (8*0+0), P5_1 is 41 (8*5+1).<br />
* The RZ/G2L has only 1 gpiochip interface.<br />
<pre><br />
GPIO chip: gpiochip0, "11030000.pin-controller", 392 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 390: unnamed unused<br />
line 391: unnamed unused<br />
</pre><br />
* Example: To access, P43_1, you need to use, gpiochip0 and line 345 (43*8 + 1)<br><br />
* [[Media:gpio_led_linux.zip| Sample Code]] to blink LED0(GPIO5-19) RZG2E RevC using linux/gpio.h API<br />
* Note: To run, download the source code. You also need to install the yocto SDK for RZG2E Rev C<br><br />
<pre><br />
$ source /opt/poky/2.4.3/environment-setup-aarch64-poky-linux<br />
$ make<br />
</pre><br />
<br />
== libgpiod – C library & tools ==<br />
* libgpiod is a C library and tools for interacting the Linux GPIO character device.<br />
* To use libgpiod with RZ-G, in yocto, add the recipe to image. This can be done in local.conf with <br />
<pre><br />
IMAGE_INSTALL_append = “ libgpiod libgpiod-tools”<br />
</pre><br />
<br />
'''Command Line Tools:'''<br />
<br />
1) '''gpiodetect''': To find out which GPIO banks and how many GPIO lines are available on the hardware<br><br />
*Ex: for RZG2E:<br />
<pre><br />
root@ek874:~# gpiodetect<br />
gpiochip6 [e6055400.gpio] (18 lines)<br />
gpiochip5 [e6055000.gpio] (20 lines)<br />
gpiochip4 [e6054000.gpio] (11 lines)<br />
gpiochip3 [e6053000.gpio] (16 lines)<br />
gpiochip2 [e6052000.gpio] (26 lines)<br />
gpiochip1 [e6051000.gpio] (23 lines)<br />
gpiochip0 [e6050000.gpio] (18 lines)<br />
</pre><br />
* In case of RZG2E, you have 7 char devices, seven GPIO banks<br />
2) '''gpioinfo''': List all lines of specified gpiochips, their names, direction, active state and additional flags<br><br />
<pre><br />
gpiochip1 - 23 lines:<br />
line 0: unnamed "interrupt" input active-high [kernel]<br />
line 1: unnamed "interrupt" input active-high [kernel]<br />
....<br />
.... <br />
line 22: unnamed unused input active-high <br />
gpiochip0 - 18 lines:<br />
line 0: unnamed unused input active-high <br />
line 1: unnamed unused input active-high <br />
....<br />
....<br />
line 17: unnamed unused input active-high<br />
</pre><br />
3) '''gpiofind''': Find the gpiochip name and line offset given the line name. For RZ/G, we do not have pin name export in driver, so we can not use pin name to find the pin line.<br />
<br> <br><br />
4) '''gpioset''': Set the values of specified GPIO lines. gpioset expects the bank, gpiochip, GPIO line and the value to be set, 1 for HIGH and 0 for LOW active-high standard<br><br />
* ⚠ Note: gpioset (and all libgpiod apps) will '''revert the state''' of a GPIO line back to its '''original value when it exits'''. For this reason if you want the state to persist you need to instruct gpioset to wait for a signal and optionally detach and run in the background.<br><br />
Examples:<br />
<pre><br />
gpioset gpiochip5 3=1 ### To set the line 3 of gpiochip5 to 1 (but it will also immediately go back to 0)<br />
gpioset --mode=signal --background gpiochip5 19=1 ### Set the pin to 1, but continue to running in the background so the pin will stay 1<br />
gpioset --mode=time –-sec=1 gpiochip0 328=0 ### toggle the pin for 1 sec<br />
gpioset --mode=wait gpiochip0 328=0 ### toggle the pin and wait the user to press ENTER<br />
</pre><br />
<br />
5) '''gpioget''': Read values of specified GPIO lines<br><br />
*Ex: read line 10 of gpiochip6<br />
<pre>root@ek874:~# gpioget gpiochip6 10</pre><br />
* [[Media:gpio_led_libgpiod_rzg2l.zip| Sample Code]] using PMOD Module(https://store.digilentinc.com/pmod-led-four-high-brightness-leds/) and RZG2L<br />
* Note: To run, download the source code. You also need to install the yocto SDK for RZG2L <br><br />
* [[Media:gpio_led_libgpiod.zip| Sample Code]] to blink LED0(GPIO5-19) RZG2E RevC using libgpiod API<br />
* Note: To run, download the source code. You also need to install the yocto SDK for RZG2E Rev C<br><br />
<pre><br />
$ source /opt/poky/2.4.3/environment-setup-aarch64-poky-linux<br />
$ make<br />
</pre><br />
<br />
== Using sysfs interface ==<br />
* GPIO pins can be configured, monitored and controller on the command line using the system (/sys) interface<br />
<br />
<br><br />
<br />
'''RZ/G2M/H/N/E Numbering for sysfs'''<br />
<br />
* GPIO pin number for RZ/G2M/H/N/E is determined by: '''GPIO_ID = GPIO Bank Address + Pin Number''' <br />
<pre><br />
RZ/G2E RZ/G2M/N/H<br />
GPIO Bank Address GPIO Bank Address<br />
GPIO 0 494 GPIO 0 496 <br />
GPIO 1 471 GPIO 1 467<br />
GPIO 2 445 GPIO 2 452 <br />
GPIO 3 429 GPIO 3 436<br />
GPIO 4 418 GPIO 4 418<br />
GPIO 5 398 GPIO 5 392<br />
GPIO 6 380 GPIO 6 360<br />
GPIO 7 356<br />
</pre><br />
<br />
* For example, on RZ/G2E, GPIO number of GP5_19 is 398 + 19 = 417<br />
* On the RZ/G2E (Rev C) board, to turn on/off LED0 GP5_19 => gpio417<br />
* NOTE: GP5_19 is defined as a GPIO LED0 in Device Tree. So you need to either remove that from the Device Tree and reprogram the board, or you can remove it from device tree in uboot using fdt command. Below is the example using fdt.<br />
<pre><br />
=> setenv gpioLED_1=fatload mmc 0:1 0x48080000 Image-ek874.bin; fatload mmc 0:1 0x48000000 Image-r8a774c0-ek874-revc-mipi-2.1.dtb<br />
=> setenv gpioLED_2=fdt addr 0x48000000 ; fdt rm /leds<br />
=> setenv gpioLED_3=booti 0x48080000 - 0x48000000<br />
=> setenv gpioLED_boot=run gpioLED_1 gpioLED_2 gpioLED_3<br />
=> setenv<br />
** Then run the command to boot<br />
=> run gpioLED_boot<br />
</pre><br />
* Now, lets turn on/off switch using sysfs:<br />
<pre><br />
root@ek874:~# echo 417 > /sys/class/gpio/export # request gpio417<br />
root@ek874:~# echo out > /sys/class/gpio/gpio417/direction # set gpio417 (GP5_19) output<br />
root@ek874:~# echo 1 > /sys/class/gpio/gpio417/value # turn ON LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
1<br />
root@ek874:~# echo 0 > /sys/class/gpio/gpio417/value # turn OFF LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
0<br />
</pre><br />
<br />
'''RZ/G2L Pin Numbering for sysfs'''<br />
<br />
* GPIO pin number is determined by formula: '''GPIO_ID = GPIO_port * 8 + GPIO_pin + 120'''<br />
* Note that there is a 120 value offset when using the sysfs interface that is not there when using the /dev or libgpio interface<br />
* Example: '''P42_4''' has its id '''460''' with above formula ('''42 * 8 + 4 + 120''')<br />
* For example, on the RZ/G2L EVK, using a GPIO as input by using PMOD slide switch https://digilent.com/shop/pmod-swt-4-user-slide-switches/<br />
<pre><br />
root@smarc-rzg2l:~# echo 460 > /sys/class/gpio/export<br />
root@smarc-rzg2l:~# echo in > /sys/class/gpio/gpio460/direction <br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value <br />
1<br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value # after switch off<br />
0<br />
</pre><br />
== GPIO Interrupt in Linux userspace ==<br />
One way to work with GPIO interrupts from user space is by polling the GPIO to detect when its value changes.<br />
Depending on the mechanism you use to work with GPIOS in user space, there may be dedicated wait() or poll() method for that. For example, the libgpiod has a method called gpiod_line_event_wait() to wait for any event change in GPIO line. Another option is using character device interface, using line evets structures and functions.<br />
=== Using libgpiod line events ===<br />
libgpiod line events handling has the structures and functions to poll lines for events<br />
<pre><br />
Data Structures:<br />
struct gpiod_line_event<br />
Structure holding event info<br />
Enumerations<br />
enum { GPIOD_LINE_EVENT_RISING_EDGE = 1, GPIOD_LINE_EVENT_FALLING_EDGE }<br />
Event types<br />
Functions<br />
int gpiod_line_event_wait (struct gpiod_line *line, const struct timespec *timeout)<br />
Wait for an event on a single line. <br />
<br />
int gpiod_line_event_wait_bulk (struct gpiod_line_bulk *bulk, const struct timespec *timeout, struct gpiod_line_bulk *event_bulk)<br />
Wait for events on a set of lines.<br />
<br />
int gpiod_line_event_read (struct gpiod_line *line, struct gpiod_line_event *event)<br />
Read the last event from the GPIO line.<br />
</pre><br />
* Example source code can be found here https://github.com/renesas-rz/rzg2l_smarc_sample_code/tree/master/gpio-examples/libgpiod-examples/libgpiod-event<br />
<br />
== IRQ Interrupt ==<br />
<br />
IRQ interrupt is the interrupt from IRQ0-7 input pins.<br />
Using IRQ pins as interrupt must be mapped GPIO pins onto IRQ pins by GPIO register setting.<br />
There are diffrent options that IRQ pin can be used in Linux:<br />
- Write your own custom kernel driver<br />
- Create an UIO(userspace IO) driver<br />
- Use an existing kernel driver like gpio-keys<br />
Here we are using 3rd method, configuring the IRQ pin as gpio-keys device.<br />
<br />
=== Configure IRQ pin ===<br />
For RZ/G2L board, there is a switch connected to a IRQ pin. You can register that pin in the device tree and wait on it in user space to use in your application<br />
gpio-keys is part of Linux input subsystem that can be used as key driver which can generate gpio interrupt. gpio-keys is much easier to use since it offers<br />
proper interrupt handling and work well with multi-key setups by mapping each key to a Linux code, the entire gpio-keys node will be read as a single device with multiple key codes.<br />
<br />
=== Device Tree bindings ===<br />
<pre><br />
user_key {<br />
compatible = "gpio-keys";<br />
pinctrl-names = "default";<br />
#address-cells = <1>;<br />
#size-cells = <0>;<br />
pinctrl-0 = <&user_key_pin>;<br />
button@1{<br />
interrupt-parent = <&intc_ex>;<br />
interrupts = <7 IRQ_TYPE_EDGE_BOTH>;<br />
linux,code = <KEY_3>;<br />
label = "SW1";<br />
debounce-interval = <50>;<br />
};<br />
};<br />
</pre><br />
Mapping to GPIO pin:<br />
<pre><br />
&pinctrl{<br />
user_key_pin: user_key {<br />
pinmux = <RZG2L_PORT_PINMUX(3, 1, 1)>; /* IRQ7 */<br />
};<br />
}; <br />
</pre><br />
Enable the IRQ in device tree if it is not enabled by default<br />
<pre><br />
&intc_ex {<br />
status = "okay";<br />
};<br />
</pre><br />
=== Testing interrupt in userspace ===<br />
Connect PMOD button module to PMOD1 7-12. The IRQ7 is conncted to Pmod1_pin7. <br />
You can check the interrupt value by pushing the button. Since the interrupt <br />
is configured for edge type both so you should get interrupt for both falling and rising event.<br />
<pre><br />
root@smarc-rzg2l:~# cat /proc/interrupts | grep SW1<br />
226: 0 0 110a0000.intc_ex 7 Edge SW1<br />
root@smarc-rzg2l:~# cat /proc/interrupts | grep SW1 //button pressed 1<br />
226: 2 0 110a0000.intc_ex 7 Edge SW1<br />
root@smarc-rzg2l:~# cat /proc/interrupts | grep SW1 //button presses 2<br />
226: 4 0 110a0000.intc_ex 7 Edge SW1<br />
</pre><br />
You can check the the input device for your user user key and also check which event handler it is binding to.<br />
<pre><br />
root@smarc-rzg2l:~# cat /proc/bus/input/devices<br />
I: Bus=0019 Vendor=0001 Product=0001 Version=0100<br />
N: Name="user_key"<br />
P: Phys=gpio-keys/input0<br />
S: Sysfs=/devices/platform/user_key/input/input0<br />
U: Uniq=<br />
H: Handlers=kbd event0 <br />
B: PROP=0<br />
B: EV=3<br />
B: KEY=10<br />
</pre> <br />
From output, you can see user_key is binding with handler event0.<br />
You can check if the you get the event by pressing the button<br />
<pre><br />
root@smarc-rzg2l:~# cat /dev/input/event0<br />
�d�<br />
�d�<br />
�d��<br />
�d��<br />
�dr<br />
�dr<br />
�d)B<br />
�d)�d��d��d%Z�d%Z�d/0�d/0�d� �d�<br />
</pre><br />
There is also tool called evtest to test the event. To use this tool, you need to add evtest in your yocto build.<br />
<pre><br />
IMAGE_INSTALL_append = " evtest lib32-evtest"<br />
</pre><br />
<pre><br />
root@smarc-rzg2l:~# evtest /dev/input/event0 <br />
Input driver version is 1.0.1<br />
Input device ID: bus 0x19 vendor 0x1 product 0x1 version 0x100<br />
Input device name: "user_key"<br />
Supported events:<br />
Event type 0 (EV_SYN)<br />
Event type 1 (EV_KEY)<br />
Event code 4 (KEY_3)<br />
Properties:<br />
Testing ... (interrupt to exit)<br />
Event: time 1678150117.1678150117, type 1 (EV_KEY), code 4 (KEY_3), value 1<br />
Event: time 1678150117.1678150117, -------------- SYN_REPORT ------------<br />
Event: time 1678150117.1678150117, type 1 (EV_KEY), code 4 (KEY_3), value 0<br />
</pre></div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_weston&diff=1987RZ-G/RZG weston2023-02-23T21:11:13Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:Information for Wayland/Weston}}<br />
← [[RZ-G]]<br />
<br />
<br />
'''Note:''' weston-ini is located /etc/xdg/weston/weston.ini<br><br />
To edit the file weston.ini you can use the 'vi' editor that is in the BSP.<br />
<br />
=Remove toolbar and clock=<br />
In weston-ini,<br />
[shell]<br />
clock-format=none<br />
panel-position=none<br />
<br />
= Change Weston Background =<br />
<br />
'''Single color setting of background'''<br />
<br />
In weston-ini,<br />
[shell]<br />
background-color=0xff000000 <- Black<br />
background-color=0xffff0000 <- Red<br />
background-color=0xff00ff00 <- Green<br />
background-color=0xff0000ff <- Blue<br />
Top 8 bits are an alpha value.<br />
For example, 0x7fxxxxxx is translucent, but 0x00xxxxxx is not transparent and the wallpaper is displayed.<br />
<br />
'''Change the background Image'''<br />
<br />
In weston-ini,<br />
[shell]<br />
background-image=/xxx/xxx/xxxx.png<br />
background-type=tile (scale, scale-crop or tile (default)<br />
<br />
'''More details about weston.ini options'''<br />
<br />
For more options, see the "SHELL SECTION" on this page: https://manpages.ubuntu.com/manpages/bionic/man5/weston.ini.5.html<br />
<br />
=Remove Window Frame=<br />
To remove window frame on a Qt app, follow https://stackoverflow.com/questions/3948441/how-to-remove-the-window-border-containing-minimize-maximize-and-close-buttons<br />
<br />
= Changing the Video Mode for Weston =<br />
<br />
The display configuration is controlled by a file named 'weston.ini' located in the folder /etc/xdg/weston. Currently there is this section in it that sets some specific display timings.<br><br />
In order to make a display work with the RZ/G2 board, the 'mode' settings need to be change to something that the display supports. In order to find those settings, run the 'cvt' command providing it the desired mode as parameters.<br><br />
For example, on the RZ/G2E board, the maximum resolution is 1080p at 30Hz. Therefore you would use the command:<br />
<br />
cvt 1920 1080 30 <br />
<br />
This should give you the proper display timings for running your display at 1080p 30fps and will force that specific mode.<br />
<br />
You can also just specify a resolution (without timing).<br />
[output] <br />
name=HDMI-A-1 <br />
mode=1280x720<br />
<br />
After modifying the configuration and saving the file, restart the Weston desktop using this command:<br />
systemctl restart weston<br />
or<br />
systemctl restart weston@1<br />
Another option is to set mode to "current" which keeps the current video resolution that the system was booted with.<br />
[output] <br />
name=HDMI-A-1 <br />
mode=current <br />
Then then set the resolution on the kernel command line in u-boot by changing the boot args to specify the resolution you want: <br />
=> setenv bootargs 'root=/dev/mmcblk0p2 rootwait video=HDMI-A-1:1280x720-32 <br />
=> saveenv<br />
<br />
== Rotation and flipping ==<br />
The output can be rotated and flipped adding the transform option to the output section:<br />
normal Normal output.<br />
90 90 degrees clockwise.<br />
180 Upside down.<br />
270 90 degrees counter clockwise.<br />
flipped Horizontally flipped<br />
flipped-90 Flipped and 90 degrees clockwise<br />
flipped-180 Flipped and upside down<br />
flipped-270 Flipped and 90 degrees counter clockwise<br />
For example:<br />
[output]<br />
name=HDMI-A-1<br />
mode=720x1280@60<br />
transform=flipped-90<br />
<br />
= Take a Screenshot =<br />
You can take a screenshot on our board by using the utility weston-screenshooter.<br />
<br />
* Modify the file '''/etc/default/weston''' and add the line:<br />
<pre><br />
OPTARGS="--debug" <br />
</pre><br />
* Restart weston by using the command:<br />
<pre><br />
$ systemctl restart weston<br />
</pre><br />
* While your application is running, use the following command:<br />
<pre><br />
$ weston-screenshooter<br />
</pre><br />
* After running weston-screenshooter, a .png file will be created in that directory. For example: "wayland-screenshot-2020-09-20_10-47-10.png"<br />
<br />
<br />
<br />
Actually there is also a Weston keyboard shortcut that can be used: ''Super key + s'', where the Super Key is usually the key close to Ctrl and Alt with Window logo on it.<br />
<br />
= Screen recording =<br />
Similarly, ''Super key + r'' starts / stops recording the screen, the output is a .wcap file. This is a lossless Weston proprietary format, it can be converted by using wcap-decode:<br />
wcap-decode --yuv4mpeg2 capture.wcap > capture.y4m<br />
The .y4m is a raw format can be opened using vlc and potentially encoded using ffmpeg:<br />
ffmpeg -y -i capture.y4m -c:v libx264 -pix_fmt yuv420p capture.mp4<br />
<br />
= Enable /dev/fb0 =<br />
The legacy Frame Buffer device interface (/dev/fb0) exists in the system, but when you write to it, nothing will be changed on the LCD when Weston is running.<br />
Therefore, if you want to use /dev/fb0, please disable weston.<br />
<pre><br />
systemctl stop weston<br />
</pre><br />
When you want to use weston again, please run<br />
<pre><br />
systemctl start weston<br />
</pre><br />
<br />
= Multi-display with Wayland/Weston =<br />
One of the most frequently asked question is how to drive multiple display with RZ/G2 (RZ/G2E-N-M-H, since RZ/G2L cannot really drive more than one display).<br />
<br />
There are some limitations on what Weston, as Wayland compositor, can do. Some limitations are due to Wayland protocol itself.<br />
<br />
The most important thing to bear in mind is that what Weston can do well is extended desktop, for clone mode there are patches but they are not tested, independent driving is not really supported because it would require two DRM/KMS devices. However, also in extended mode there are caveats. By design Wayland does not allow application to set the position, each new window has, instead, a random initial position and then the user can move it or set to full screen. Wayland does allow applications to open in full-screen but it will open in the current active display, that is the one with the mouse pointer or last touch input. (utouch-evemu could be theoretically used to select the current active display).<br />
<br />
Because of this limitation, a workaround using [https://github.com/wayland-project/weston/tree/master/ivi-shell IVI-shell] (In-vehicle infotainment) can be considered: it extends the Wayland core protocol to tie wl_surface and a given ID. With this ID, shell can identify which wl_surface is drawn by which application. <br />
<br />
Another possibility is not to use Weston to control both screen, so one display can be managed by Weston / DRM and therefore have the full HW acceleration, the other is instead handled by LinuxFB/DirectFB purely in SW. This can be often acceptable for relatively simple/static GUIs.<br />
<br />
=== Qt ===<br />
Regarding QT, theoretically there can be a Qt application using EGLFS and another one using OpenGLES through Wayland. However this option cannot work because RZ/G2 does not support EGLFS. More details about Qt for Embedded Linux are available [https://doc.qt.io/qt-5/embedded-linux.html here]. <br />
<br />
=== Android ===<br />
On Android, instead, multi display is much better supported and the limitations above do not apply. There is also a demo showing the dual display support with RZ/G2M (details / link TBD).<br />
<br />
<br />
=Touch Screen Calibration=<br />
Touch calibration and color changing can be done normally in Wayland/Weston.<br />
<br />
Note that touch calibration must be enabled first in weston.ini [https://www.mankier.com/5/weston.ini#Libinput_Section (link)]<br />
<br />
Here is an example of how to enable touch [https://github.com/toradex/debian-docker-images/blob/buster/weston-touch-calibrator/weston.ini (link)]<br />
<br />
=Bring Window to Top=<br />
In Weston, there is not an API to change the z-order of windows in code. Of course, individual application windows will come to the top when pressed by the mouse pointer, but many times you want to control that using application software.<br />
<br />
However, when writing a Qt application, when you want to bring the Qt surface to the top, just set window "visible" setting to FALSE and TRUE again.<br />
<br />
[[File:doorphone_snippet_1.png]]<br />
<br><br />
<br><br />
[[File:doorphone_snippet_2.png]]<br />
<br />
=Prevent Timeout and Screen Lock=<br />
By default, if Weston sits with no user input, it will time out and put up a screen lock screen.<br />
To prevent, you can do one of two methods:<br />
<br />
Method 1:<br><br />
Add --idle-time=0 to the command line of weston-start<br />
<pre><br />
/usr/bin/weston-start --idle-time=0<br />
</pre><br />
<br />
Method 2:<br><br />
Add the follow lines to /etc/xdg/weston/weston.ini<br />
<pre><br />
[core]<br />
idle-time=0 <br />
[shell]<br />
locking=false<br />
</pre><br />
<br />
= Restart Weston =<br />
* If you want to restart weston, you can do this:<br />
<pre><br />
$ systemctl restart weston@root.service<br />
</pre><br />
* For Yocto, the location of the .service files in the rotofs are '''/lib/systemd/system/''' which is where the file '''weston@.service''' is located.<br />
<br />
= Launching Firefox from command line =<br />
<pre><br />
# WAYLAND_DISPLAY=wayland-0 GDK_BACKEND=wayland MOZ_OMX_RZG2L=1 firefox --width 1024 --height 600 --kiosk https://renesas.info<br />
</pre></div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_kernel&diff=1925RZ-G/RZG kernel2023-01-27T01:39:31Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G kernel Information}}<br />
← [[RZ-G]]<br />
<br />
= CPU Hotplug =<br />
You can enable and disable CPU cores by writing to a sysfs value.<br />
<br><br />
This is helpful for when you want to experiment with the performance of your application if you were to use a processor with less CPU cores.<br />
<br />
For example, this command will disable the 2nd core.<br />
<br />
<code>$ echo 0 > /sys/devices/system/cpu/cpu1/online</code><br />
<br />
More detailed information can be found here: https://www.cyberciti.biz/faq/debian-rhel-centos-redhat-suse-hotplug-cpu<br />
<br />
<br />
= Power Saving =<br />
* In Linux, this is a mechanism that is generally supported by all kernels.(it may depend on the version) <br />
* The Renesas kernel has support them. <br />
<br />
About power consumption in RZ/G2 series, we have some supported features to save power cost in default environment: <br />
* CPUHotplug: Turn on/off CPU in runtime. <br />
* CPUIdle: Support 2 modes to turn off clock or power domain of CPU when CPU is idle (nothing to do). <br />
** Sleep mode: put in sleep state. <br />
** Core standby mode: put in shutdown state. It is described in devicetree of each SoC => It has deeper state than sleep mode so that save more power. <br />
* CPUFreq: there are 6 governors to support "Dynamic Frequency Scaling": <br />
** '''Performance''': The frequency is always set maximum => It is using as default in our current environment. <br />
** '''Powersave''': The frequency is always set minimum. <br />
** '''Ondemand''': If CPU load is bigger than 95%, the frequency is set max. If CPU load is equal to or less than 95%, the frequency is set based on CPU load. <br />
** Conservative: If CPU load is bigger than 80%, the frequency is set one level higher than current frequency. If CPU load is equal to or less than 20%, the frequency is set one level lower than current frequency. <br />
** '''Userspace''': It sets frequency which is defined by user in runtime. <br />
** '''Schedutil''': Schedutil governor is driven by scheduler. It uses scheduler-provided CPU utilization information as input for making its decisions by formula: freq_next= 1.25 * freq_max* util_of_CPU. <br />
* Power Domain: it is supported as default by Linux Power Management Framework. If a module is not use, system will disable its clock and power domain automatically. <br />
<br />
Therefore, select proper method will be based on user's purpose. Here are my examples: <br />
* Want to use with best performance: disable CPUIdle + use performance frequency governor. <br />
* Want to use less power: enable CPUIdle + use powersave frequency governor. <br />
* Want to balance performance and power: we can use schedutil. <br />
* Want to modify frequency as user's purpose: use userspance frequency governor. <br />
* If user is running realtime environment, I suggest using performance governor to ensure the minimum latency. <br />
Here are some commands to check frequency value and frequency governor in linux: <br />
* Check available CPU frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_frequencies </code><br />
* Check available CPU frequency governor:<br />
: <code>cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_governors </code><br />
* Change to other governor:<br />
: <code>echo performance > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor (performance/userspace/schedutil/...) </code><br />
* Check current frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq</code><br />
* Change the current frequency:<br />
: <code> echo 15000 > /sys/devices/system/cpu/cpu*/cpufreq/scaling_max_freq</code><br />
<br />
= PMIC Access from Linux =<br />
The easiest way to access the PMIC registers from command line would would be to use i2ctools. Add the following line to your local.conf.<br />
: <code>IMAGE_INSTALL_append = " i2c-tools"</code><br />
<br />
However the PMICs are connected to a I2C (IIC for PMIC or I2C_DVFS) that is not enabled in the default kernel device tree.<br />
For the HiHope boards, you can edit the file <code>arch/arm64/boot/dts/renesas/hihope-common.dtsi</code> and add the following lines at the very bottom of the file.<br />
<pre><br />
&i2c_dvfs {<br />
status = "okay";<br />
};<br />
</pre><br />
<br />
Once booted in Linux, the corresponding device should be /dev/i2c-7 <br />
<br />
You can query the connected slaves by giving the following command: <br />
: <code> i2cdetect -y -r 7 </code><br />
that on the RZ/G2E board produces the output: <br />
<pre>0 1 2 3 4 5 6 7 8 9 a b c d e f <br />
00: -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1e 1f <br />
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
70: -- -- -- -- -- -- -- -- </pre><br />
So two slaves, at address 0x1e and 0x1f. <br />
Finally you can read registers by simply using the i2cget command, for example: <br />
<pre><br />
i2cget -y 7 0x1e 0x1 <br />
0x02 <br />
i2cget -y 7 0x1e 0x16 <br />
0x00 <br />
i2cget -y 7 0x1e 0x17 <br />
0xc4 <br />
</pre><br />
<br />
If you don't want (or can't) update the device tree blob, you could use u-boot to do it temporarily.<br />
The procedure below is valid for RZ/G2M but it works also with RZ/G2E-N-H by simply modifying the device tree blob and/or kernel image names. <br />
<br />
1) Interrupt the normal kernel boot<br />
<br />
2) Once in u-boot, enter the follow commands (after each RESET)<br />
<pre>=> fatload mmc 0:1 0x48080000 Image; fatload mmc 0:1 0x48000000 Image-r8a774a1-hihope-rzg2m-ex.dtb; <br />
=> fdt addr 0x48000000 <br />
=> fdt set /soc/i2c@e60b0000 status "okay"</pre><br />
and finally boot the kernel: <br />
<pre>=> booti 0x48080000 - 0x48000000 </pre><br />
<br />
= Create a uImage =<br />
In the kernel, there is no make target to make a uImage for the 64-bit ARM architecture like there is for 32-bit ARM.<br />
However, you can manually make one from the file Image.gz that is created by the kernel build system by using the following command on your host machine.<br />
<pre><br />
$ cd arch/arm64/boot<br />
$ mkimage -A arm64 -O linux -T kernel -C gzip -a 0x48080000 -e 0x48080000 -n "Linux Kernel Image" -d Image.gz uImage<br />
</pre><br />
<br />
Below is an example of booting this image on a RZ/G2 HiHiope board from u-boot.<br />
<pre><br />
=> fatload mmc 0:1 0x88000000 uImage<br />
=> fatload mmc 0:1 0x48000000 Image-r8a774e1-hihope-rzg2h-ex.dtb<br />
=> bootm 0x88000000 - 0x48000000<br />
</pre><br />
<br />
= Building mainline / LTS Linux kernel for RZ/G2E-N-M-H =<br />
The Verified Linux Package (VLP) includes the CIP kernel (v4.19.x) and this is the only official way to build a kernel that has all the features in. However it is possible to build a working kernel directly from mainline. The kernel built in this way does not provide most of the multimedia functionalities (e.g. GPU, codec, etc). <br />
<br />
A recent [https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads Linaro toolchain] is needed to build the kernel. The instructions below are for v5.10.x, newer kernel versions can be built as well in a similar way.<br />
git clone <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/</nowiki><br />
<br />
git checkout tags/v5.10.42<br />
or anyway the latest minor revision including bug fixes.<br />
<br />
Copy Renesas default kernel build into .out/.config:<br />
cp arch/arm64/configs/renesas_defconfig .out/.config<br />
or, if not present, get from the repository:<br />
wget -O .out/.config <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/plain/arch/arm64/configs/renesas_defconfig</nowiki><br />
If you want to be able to build modules:<br />
echo CONFIG_MODULES=y >> .out/.config<br />
<br />
echo CONFIG_MODULE_UNLOAD=y >> .out/.config<br />
Run kernel configuration:<br />
make O=.out menuconfig<br />
Exit and save. Then launch the build:<br />
make O=.out all -j$(nproc)<br />
<br />
= Renesas RZ/G2 PCIe Endpoint Driver =<br />
* [[RZ-G/RZG2_pcie_ep | Click Here]]<br />
<br />
= GPIO Pin Usage =<br />
Since linux-4.8 the GPIO sysfs interface is [https://www.kernel.org/doc/Documentation/gpio/sysfs.txt deprecated]. User space should use the character device instead. The libgpiod library encapsulates the ioctl calls and data structures behind a straightforward API.<br />
<br />
Also, the kernel source code contains a GPIO utility for user space. Please see directory tools/gpio/ in the kernel source code.<br />
<br />
== Character Device (/dev) Interface ==<br />
* Access to GPIO pins can be made using the /dev driver interfaces.<br />
* Official kernel documentation on this interface can be found here: https://docs.kernel.org/driver-api/gpio/using-gpio.html<br />
* The Linux kernel is distributed with three basic user-mode tools written for testing the GPIO interface. The source can be found in linux/tools/gpio/.<br />
* The three tools are:<br />
: 1) lsgpio – example on how to list the GPIO lines on a system<br />
: 2) gpio-event-mon – monitor GPIO line events from userspace<br />
: 3) gpio-hammer - example to shake GPIO lines on a system<br />
* Note: These are useful for debugging GPIO lines, but none of these tools will allow the user to configure, set and clear GPIO lines.<br />
* However, you can use the user API (chip info, line info, line request for values, reading values, setting values, line request for events, polling for events and reading events) from linux/gpio.h to program GPIO.<br />
<br />
'''RZ/G2M/H/N/E Numbering'''<br />
* GPIO pin number for '''RZ/G2M/H/N/E''' is determined by using the command line tool '''lsgpio''':<br />
* The RZ/G2M/H/N/E have multiple gpiochip interfaces.<br />
<pre><br />
GPIO chip: gpiochip6, "e6055400.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
GPIO chip: gpiochip5, "e6055000.gpio", 20 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 19: unnamed unused [output]<br />
GPIO chip: gpiochip4, "e6054000.gpio", 11 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 10: unnamed unused<br />
GPIO chip: gpiochip3, "e6053000.gpio", 16 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 15: unnamed unused<br />
GPIO chip: gpiochip2, "e6052000.gpio", 26 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 25: unnamed "wlan-en-regulator" [kernel output]<br />
GPIO chip: gpiochip1, "e6051000.gpio", 23 GPIO lines<br />
line 0: unnamed "interrupt" [kernel]<br />
....<br />
....<br />
line 22: unnamed unused<br />
GPIO chip: gpiochip0, "e6050000.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
</pre><br />
<br />
* For example, to access LED0, which is defined as GPIO5-19, you will use gpiochip5 chip and line 19.<br />
<br />
'''RZ/G2L Numbering'''<br />
* For RZ/G2L, the port numbering in the hardware manual and schematics are P0_0, P43_0, etc...<br />
* This shows you the port number and the pin number as '''Px_y''' (x: port number, y: pin number)<br />
* The equation to find the corresponding global port number is: '''(8*x + y)'''<br />
* For examples, P0_0 is 0 (8*0+0), P5_1 is 41 (8*5+1).<br />
* The RZ/G2L has only 1 gpiochip interface.<br />
<pre><br />
GPIO chip: gpiochip0, "11030000.pin-controller", 392 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 390: unnamed unused<br />
line 391: unnamed unused<br />
</pre><br />
* Example: To access, P43_1, you need to use, gpiochip0 and line 345 (43*8 + 1)<br><br />
* [[Media:gpio_led_linux.zip| Sample Code]] to blink LED0(GPIO5-19) RZG2E RevC using linux/gpio.h API<br />
* Note: To run, download the source code. You also need to install the yocto SDK for RZG2E Rev C<br><br />
<pre><br />
$ source /opt/poky/2.4.3/environment-setup-aarch64-poky-linux<br />
$ make<br />
</pre><br />
<br />
== libgpiod – C library & tools ==<br />
* libgpiod is a C library and tools for interacting the Linux GPIO character device.<br />
* To use libgpiod with RZ-G, in yocto, add the recipe to image. This can be done in local.conf with <br />
<pre><br />
IMAGE_INSTALL_append = “ libgpiod libgpiod-tools”<br />
</pre><br />
<br />
'''Command Line Tools:'''<br />
<br />
1) '''gpiodetect''': To find out which GPIO banks and how many GPIO lines are available on the hardware<br><br />
*Ex: for RZG2E:<br />
<pre><br />
root@ek874:~# gpiodetect<br />
gpiochip6 [e6055400.gpio] (18 lines)<br />
gpiochip5 [e6055000.gpio] (20 lines)<br />
gpiochip4 [e6054000.gpio] (11 lines)<br />
gpiochip3 [e6053000.gpio] (16 lines)<br />
gpiochip2 [e6052000.gpio] (26 lines)<br />
gpiochip1 [e6051000.gpio] (23 lines)<br />
gpiochip0 [e6050000.gpio] (18 lines)<br />
</pre><br />
* In case of RZG2E, you have 7 char devices, seven GPIO banks<br />
2) '''gpioinfo''': List all lines of specified gpiochips, their names, direction, active state and additional flags<br><br />
<pre><br />
gpiochip1 - 23 lines:<br />
line 0: unnamed "interrupt" input active-high [kernel]<br />
line 1: unnamed "interrupt" input active-high [kernel]<br />
....<br />
.... <br />
line 22: unnamed unused input active-high <br />
gpiochip0 - 18 lines:<br />
line 0: unnamed unused input active-high <br />
line 1: unnamed unused input active-high <br />
....<br />
....<br />
line 17: unnamed unused input active-high<br />
</pre><br />
3) '''gpiofind''': Find the gpiochip name and line offset given the line name. For RZ/G, we do not have pin name export in driver, so we can not use pin name to find the pin line.<br />
<br> <br><br />
4) '''gpioset''': Set the values of specified GPIO lines. gpioset expects the bank, gpiochip, GPIO line and the value to be set, 1 for HIGH and 0 for LOW active-high standard<br><br />
* ⚠ Note: gpioset (and all libgpiod apps) will '''revert the state''' of a GPIO line back to its '''original value when it exits'''. For this reason if you want the state to persist you need to instruct gpioset to wait for a signal and optionally detach and run in the background.<br><br />
Examples:<br />
<pre><br />
gpioset gpiochip5 3=1 ### To set the line 3 of gpiochip5 to 1 (but it will also immediately go back to 0)<br />
gpioset --mode=signal --background gpiochip5 19=1 ### Set the pin to 1, but continue to running in the background so the pin will stay 1<br />
gpioset --mode=time –-sec=1 gpiochip0 328=0 ### toggle the pin for 1 sec<br />
gpioset --mode=wait gpiochip0 328=0 ### toggle the pin and wait the user to press ENTER<br />
</pre><br />
<br />
5) '''gpioget''': Read values of specified GPIO lines<br><br />
*Ex: read line 10 of gpiochip6<br />
<pre>root@ek874:~# gpioget gpiochip6 10</pre><br />
* [[Media:gpio_led_libgpiod_rzg2l.zip| Sample Code]] using PMOD Module(https://store.digilentinc.com/pmod-led-four-high-brightness-leds/) and RZG2L<br />
* Note: To run, download the source code. You also need to install the yocto SDK for RZG2L <br><br />
* [[Media:gpio_led_libgpiod.zip| Sample Code]] to blink LED0(GPIO5-19) RZG2E RevC using libgpiod API<br />
* Note: To run, download the source code. You also need to install the yocto SDK for RZG2E Rev C<br><br />
<pre><br />
$ source /opt/poky/2.4.3/environment-setup-aarch64-poky-linux<br />
$ make<br />
</pre><br />
<br />
== Using sysfs interface ==<br />
* GPIO pins can be configured, monitored and controller on the command line using the system (/sys) interface<br />
<br />
<br><br />
<br />
'''RZ/G2M/H/N/E Numbering for sysfs'''<br />
<br />
* GPIO pin number for RZ/G2M/H/N/E is determined by: '''GPIO_ID = GPIO Bank Address + Pin Number''' <br />
<pre><br />
RZ/G2E RZ/G2M/N/H<br />
GPIO Bank Address GPIO Bank Address<br />
GPIO 0 494 GPIO 0 496 <br />
GPIO 1 471 GPIO 1 467<br />
GPIO 2 445 GPIO 2 452 <br />
GPIO 3 429 GPIO 3 436<br />
GPIO 4 418 GPIO 4 418<br />
GPIO 5 398 GPIO 5 392<br />
GPIO 6 380 GPIO 6 360<br />
GPIO 7 356<br />
</pre><br />
<br />
* For example, on RZ/G2E, GPIO number of GP5_19 is 398 + 19 = 417<br />
* On the RZ/G2E (Rev C) board, to turn on/off LED0 GP5_19 => gpio417<br />
* NOTE: GP5_19 is defined as a GPIO LED0 in Device Tree. So you need to either remove that from the Device Tree and reprogram the board, or you can remove it from device tree in uboot using fdt command. Below is the example using fdt.<br />
<pre><br />
=> setenv gpioLED_1=fatload mmc 0:1 0x48080000 Image-ek874.bin; fatload mmc 0:1 0x48000000 Image-r8a774c0-ek874-revc-mipi-2.1.dtb<br />
=> setenv gpioLED_2=fdt addr 0x48000000 ; fdt rm /leds<br />
=> setenv gpioLED_3=booti 0x48080000 - 0x48000000<br />
=> setenv gpioLED_boot=run gpioLED_1 gpioLED_2 gpioLED_3<br />
=> setenv<br />
** Then run the command to boot<br />
=> run gpioLED_boot<br />
</pre><br />
* Now, lets turn on/off switch using sysfs:<br />
<pre><br />
root@ek874:~# echo 417 > /sys/class/gpio/export # request gpio417<br />
root@ek874:~# echo out > /sys/class/gpio/gpio417/direction # set gpio417 (GP5_19) output<br />
root@ek874:~# echo 1 > /sys/class/gpio/gpio417/value # turn ON LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
1<br />
root@ek874:~# echo 0 > /sys/class/gpio/gpio417/value # turn OFF LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
0<br />
</pre><br />
<br />
'''RZ/G2L Pin Numbering for sysfs'''<br />
<br />
* GPIO pin number is determined by formula: '''GPIO_ID = GPIO_port * 8 + GPIO_pin + 120'''<br />
* Note that there is a 120 value offset when using the sysfs interface that is not there when using the /dev or libgpio interface<br />
* Example: '''P42_4''' has its id '''460''' with above formula ('''42 * 8 + 4 + 120''')<br />
* For example, on the RZ/G2L EVK, using a GPIO as input by using PMOD slide switch https://digilent.com/shop/pmod-swt-4-user-slide-switches/<br />
<pre><br />
root@smarc-rzg2l:~# echo 460 > /sys/class/gpio/export<br />
root@smarc-rzg2l:~# echo in > /sys/class/gpio/gpio460/direction <br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value <br />
1<br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value # after switch off<br />
0<br />
</pre><br />
== GPIO Interrupt in Linux userspace ==<br />
One way to work with GPIO interrupts from user space is by polling the GPIO to detect when its value changes.<br />
Depending on the mechanism you use to work with GPIOS in user space, there may be dedicated wait() or poll() method for that. For example, the libgpiod has a method called gpiod_line_event_wait() to wait for any event change in GPIO line. Another option is using character device interface, using line evets structures and functions.<br />
=== Using libgpiod line events ===<br />
libgpiod line events handling has the structures and functions to poll lines for events<br />
<pre><br />
Data Structures:<br />
struct gpiod_line_event<br />
Structure holding event info<br />
Enumerations<br />
enum { GPIOD_LINE_EVENT_RISING_EDGE = 1, GPIOD_LINE_EVENT_FALLING_EDGE }<br />
Event types<br />
Functions<br />
int gpiod_line_event_wait (struct gpiod_line *line, const struct timespec *timeout)<br />
Wait for an event on a single line. <br />
<br />
int gpiod_line_event_wait_bulk (struct gpiod_line_bulk *bulk, const struct timespec *timeout, struct gpiod_line_bulk *event_bulk)<br />
Wait for events on a set of lines.<br />
<br />
int gpiod_line_event_read (struct gpiod_line *line, struct gpiod_line_event *event)<br />
Read the last event from the GPIO line.<br />
</pre><br />
* Example source code can be found here https://github.com/renesas-rz/rzg2l_smarc_sample_code/tree/master/gpio-examples/libgpiod-examples/libgpiod-event</div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_GStreamer&diff=1830RZ-G/RZG GStreamer2022-11-18T22:07:18Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:GStreamer}}<br />
← [[RZ-G]]<br />
<br />
<img height=100 style="float:right" src=https://upload.wikimedia.org/wikipedia/commons/thumb/d/db/Gstreamer-logo.svg/1200px-Gstreamer-logo.svg.png><br />
<br />
= Examples for RZ/G2L =<br />
<br />
== Down Scaling using vspmfilter ==<br />
<br />
* Below table show range of support:<br />
{| class="wikitable"<br />
|+ style="caption-side:bottom;"|''Supported solution range''<br />
|<br />
| Input resolution<br />
| Output scale down ratio<br />
|-<br />
| Min<br />
| 128x72<br />
| 1<br />
|-<br />
| Max<br />
| 1920x1080<br />
| 15<br />
|}<br />
<br />
Following are sample commands for Up/Down Scaling with h264 Elementary Stream file.<br />
===Case of Down Scaling===<br />
<pre><br />
gst-launch-1.0 filesrc location=./<FullHDsize_h264_file> ! h264parse ! queue ! omxh264dec ! queue ! vspmfilter outbuf-alloc=true ! video/x-raw, format=BGRA, width=1280, height=720 ! waylandsink<br />
</pre><br />
===Case of Down Scaling (without color format conversion)===<br />
<pre><br />
gst-launch-1.0 filesrc location=./<FullHDsize_h264_file> ! h264parse ! queue ! omxh264dec ! queue ! vspmfilter outbuf-alloc=true ! video/x-raw, width=1280, height=720 ! waylandsink<br />
</pre><br />
===Case of Down Scaling (without color format conversion – use dmabuf)===<br />
<pre><br />
gst-launch-1.0 filesrc location=./<FullHDsize_h264_file> ! h264parse ! queue ! omxh264dec ! queue ! vspmfilter dmabuf-use=true ! video/x-raw, width=1280, height=720 ! waylandsink<br />
</pre><br />
<br />
== Color format conversion using vspmfilter ==<br />
* Below table show color format conversion using vspmfilter:<br />
<br />
{| class="wikitable"<br />
|+ style="caption-side:bottom;"|''Supported color format''<br />
| No.<br />
| Supported color format<br />
|-<br />
| 1<br />
| BGRA<br />
|-<br />
| 2<br />
| BGRx<br />
|-<br />
| 3<br />
| RGB16<br />
|-<br />
| 4<br />
| YUY2<br />
|-<br />
| 5<br />
| NV12<br />
|}<br />
<br />
Following are sample commands for converting color format. Please set the output format which begin supported following “format=”.<br />
===Case of BGRA output===<br />
<pre><br />
gst-launch-1.0 filesrc location=filename.mp4 ! qtdemux ! queue ! h264parse ! omxh264dec ! queue ! vspmfilter outbuf-alloc=true ! video/x-raw, format=BGRA ! waylandsink<br />
</pre><br />
== Camera Setup ==<br />
=== MIPI Camera Setup (OV5645 camera) ===<br />
Copy below script in a file say v412-init.sh and run the script first before using camera.<br />
<pre><br />
#!/bin/sh<br />
<br />
cru=$(cat /sys/class/video4linux/video*/name | grep "CRU")<br />
csi2=$(cat /sys/class/video4linux/v4l-subdev*/name | grep "csi2")<br />
<br />
# Please choose one of a following resolution then comment out the rest.<br />
ov5645_res=1280x960<br />
#ov5645_res=1920x1080<br />
<br />
if [ -z "$cru" ]<br />
then<br />
echo "No CRU video device founds"<br />
else<br />
media-ctl -d /dev/media0 -r<br />
if [ -z "$csi2" ]<br />
then<br />
echo "No MIPI CSI2 sub video device founds"<br />
else<br />
media-ctl -d /dev/media0 -l "'rzg2l_csi2 10830400.csi2':1 -> 'CRU output':0 [1]"<br />
media-ctl -d /dev/media0 -V "'rzg2l_csi2 10830400.csi2':1 [fmt:UYVY8_2X8/$ov5645_res field:none]"<br />
media-ctl -d /dev/media0 -V "'ov5645 0-003c':0 [fmt:UYVY8_2X8/$ov5645_res field:none]"<br />
echo "Link CRU/CSI2 to ov5645 0-003c with format UYVY8_2X8 and resolution $ov5645_res"<br />
fi<br />
fi<br />
</pre><br />
<br />
=== USB Camera Setup ===<br />
<pre><br />
$ rmmod uvcvideo<br />
$ insmod /lib/modules/5.10.83-cip1-yocto-standard/kernel/drivers/media/usb/uvc/uvcvideo.ko allocators=1<br />
</pre><br />
<br />
=== MIPI Camera Examples ===<br />
==== Capture from camera and display ====<br />
<pre><br />
gst-launch-1.0 v4l2src device=/dev/video0 ! video/x-raw,format=YUY2,width=1280,height=960 ! waylandsink<br />
</pre><br />
==== Capture and Scaling and Conversion using vspmfilter ====<br />
<pre><br />
gst-launch-1.0 v4l2src device=/dev/video0 ! "video/x-raw,format=ARGB,width=1280,height=960" ! vspmfilter outbuf-alloc=true ! "video/xraw,format=RGB16,width=640,height=480" ! waylandsink<br />
</pre><br />
====H.264 encode and save to a MP4 container file (using omxh264enc)====<br />
<pre><br />
gst-launch-1.0 v4l2src device=/dev/video0 num-buffers=300 ! video/x-raw,width=1280,height=960 ! vspmfilter dmabuf-use=true ! video/x-raw,format=NV12 ! omxh264enc control-rate=2 target-bitrate=10485760 interval_intraframes=14 periodicty-idr=2 ! video/x-h264,profile=\(string\)high,level=\(string\)4.2 ! filesink location=output.mp4<br />
</pre><br />
====H.264 decode stream (using omxh264dec)====<br />
<pre><br />
gst-launch-1.0 filesrc location=output.mp4 ! h264parse ! omxh264dec ! waylandsink<br />
</pre><br />
<br />
=== USB Camera Examples ===<br />
====Encode an .264 stream from camera (using omxh264enc)====<br />
<pre><br />
gst-launch-1.0 v4l2src device=/dev/video0 num-buffers=300 ! video/x-raw,width=1280,height=960 ! vspmfilter dmabuf-use=true ! video/x-raw,format=NV12 ! omxh264enc control-rate=2 target-bitrate=10485760 interval_intraframes=14 periodicty-idr=2 ! video/x-h264,profile=\(string\)high,level=\(string\)4.2 ! filesink location=output_xsga.264<br />
</pre><br />
====Decode (using omxh264dec)====<br />
<pre><br />
gst-launch-1.0 filesrc location=output_xsga.264 ! h264parse ! omxh264dec ! waylandsink<br />
</pre><br />
=== Stream H.264 video via Ethernet===<br />
====Create .sdp file for VLC to receive stream using rtsp====<br />
Let create a file named test.sdp and copy the below content in the file<br><br />
NOTE: The IP address is the IP4 is the IP address of the stream sender<br><br />
m=video 9001 RTP/AVP 96, 9001 is the port number which needs to be matched with the sender port<br />
<pre><br />
v=0<br />
i=RZ Board Demo<br />
c=IN IP4 192.168.86.57<br />
s=ESP H264 STREAM<br />
m=video 9001 RTP/AVP 96<br />
a=rtpmap:96 H264/90000<br />
</pre> <br />
Save the file and launch the VLC application by clicking test.sdp file to receive the stream.<br />
====Stream H.264 compressed test-pattern video via Ethernet to VLC media player====<br />
<pre><br />
NOTE: host ip address is the ip address of PC running VLC application<br />
gst-launch-1.0 -v videotestsrc ! queue ! videoconvert ! queue ! video/x-raw, width=320, height=240 ! queue ! omxh264enc ! queue ! rtph264pay ! queue ! udpsink host= 192.168.86.36 port=9001<br />
</pre><br />
====Send h.264 compressed Camera video over Ethernet to the VLC media player====<br />
<pre><br />
gst-launch-1.0 --gst-debug=3 v4l2src device=/dev/video1 ! video/x-raw, width=1280, height=720 ! videoconvert \<br />
! video/x-raw, format=NV12 ! omxh264enc control-rate=2 target-bitrate=10485760 interval_intraframes=14 periodicty-idr=2 use-dmabuf=false \<br />
! video/x-h264, profile=\(string\)high,level=\(string\)4.2 ! h264parse ! rtph264pay ! queue ! udpsink host=192.168.86.36 port=9001<br />
</pre><br />
<br />
====Send h.264 compressed MP4 video over Ethernet to the VLC media player====<br />
<pre><br />
gst-launch-1.0 -v filesrc location=sintel_trailer-1080p.mp4 ! decodebin ! omxh264enc ! rtph264pay ! udpsink host=192.168.86.36 port=9001<br />
</pre><br />
<br />
====Send and receive h264 video between the devices over Ethernet using gstreamer====<br />
<pre><br />
Sender:<br />
gst-launch-1.0 -v filesrc location=sintel_trailer-1080p.mp4 ! decodebin ! omxh264enc ! rtph264pay ! udpsink host=192.168.86.36 port=9001<br />
</pre><br />
<pre><br />
Receiver:<br />
gst-launch-1.0 -v udpsrc port=9001 caps = "application/x-rtp, media=(string)video, clock-rate=(int)90000, encoding-name=(string)H264, payload=(int)96" ! rtph264depay ! decodebin ! videoconvert ! autovideosink<br />
</pre><br />
<br />
= Examples for RZV2L =<br />
<br />
== Camera Setup ==<br />
This section describes how to setup the RZV2L Camera module OV5645. <br />
<br />
=== Camera Setup VGA ===<br />
<code>media-ctl -d /dev/media0 -r ;</code><br />
<br />
<code>media-ctl -d /dev/media0 -l "'rzg2l_csi2 10830400.csi2':1 -> 'CRU output':0 [1]" ;</code><br />
<br />
<code>media-ctl -d /dev/media0 -V "'rzg2l_csi2 10830400.csi2':1 [fmt:UYVY8_2X8/640x480 field:none]" ;</code><br />
<br />
<code>media-ctl -d /dev/media0 -V "'ov5645 0-003c':0 [fmt:UYVY8_2X8/640x480 field:none]" ;</code><br />
<br />
<code>gst-launch-1.0 v4l2src device=/dev/video0 ! videoconvert ! waylandsink</code><br />
<br />
=== Camera Setup 720p ===<br />
<code>media-ctl -d /dev/media0 -r ;</code><br />
<br />
<code>media-ctl -d /dev/media0 -l "'rzg2l_csi2 10830400.csi2':1 -> 'CRU output':0 [1]" ;</code><br />
<br />
<code>media-ctl -d /dev/media0 -V "'rzg2l_csi2 10830400.csi2':1 [fmt:UYVY8_2X8/1280x720 field:none]" ;</code><br />
<br />
<code>media-ctl -d /dev/media0 -V "'ov5645 0-003c':0 [fmt:UYVY8_2X8/1280x720 field:none]" ;</code><br />
<br />
<code>gst-launch-1.0 v4l2src device=/dev/video0 ! videoconvert ! waylandsink</code> <br />
<br />
== Down Scaling using vspmfilter ==<br />
<br />
=== Down Scale Camera 720p video ===<br />
<code>gst-launch-1.0 v4l2src device=/dev/video0 ! videoconvert ! vspmfilter dmabuf-use=true ! video/x-raw, width=640, height=480 ! waylandsink</code><br />
<br />
=== Down Scale H264 Video File ===<br />
gst-launch-1.0 filesrc location=./in720p.mp4 ! qtdemux ! queue ! h264parse ! queue ! omxh264dec ! queue ! <code>! vspmfilter dmabuf-use=true ! video/x-raw, width=640, height=480 !</code>waylandsink<br />
<br />
=== Create H264 Video File ===<br />
This script can be run on the RZV2L<br />
<br />
<code>gst-launch-1.0 videotestsrc ! omxh264enc ! filesink location=./testvideo.h264</code><br />
<br />
== Stream H264 Video Over IP ==<br />
<br />
=== RZV2L(Source) Device send h264 stream using RTP: ===<br />
'''''Set the IP address to the PC or device that receives the video'''''<br />
<br />
<code>gst-launch-1.0 -v v4l2src device=/dev/video0 ! videoconvert ! vspmfilter dmabuf-use=true ! video/x-raw, width=640, height=480 ! queue ! omxh264enc ! queue ! rtph264pay ! queue ! udpsink host=<PC IP Address> port=5000</code><br />
<br />
=== PC that receives h264 rtp stream: ===<br />
<code>gst-launch-1.0 -v udpsrc port=5000 caps = "application/x-rtp, media=(string)video, clock-rate=(int)90000, encoding-name=(string)H264, payload=(int)96" ! rtph264depay ! decodebin ! videoconvert ! autovideosink</code><br />
<br />
=== PC receives H264 RTP Stream with VLC Player: ===<br />
1) Create a SDP script file ( i.e. test.sdp ).<br />
<br />
2) Add the following to the file. The variable <code>IP_ADDR_HOST_VID needs to be changed to the device (RZV2L) that is hosting the video.</code> <br />
<br />
<code>c=IN IP4 IP_ADDR_HOST_VID</code><br />
<br />
<code>m=video 5000 RTP/AVP 96</code><br />
<br />
<code>a=rtpmap:96 H264/90000</code><br />
<br />
3) Run the following Command<br />
<br />
<code>vlc --avcodec-hw=vaapi test.sdp</code><br />
==RZ GStreamer C Level API Demos==<br />
Here is a an example of how to use the GStreamer C Code API for the RZV and RZG. The demo utilizes the RZ H.264 and VSPM library.<br />
<br />
[https://github.com/renesas-rz/rz_gstreamer_demos RZ GStreamer Demo]</div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_GStreamer&diff=1829RZ-G/RZG GStreamer2022-11-18T21:10:30Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:GStreamer}}<br />
← [[RZ-G]]<br />
<br />
<img height=100 style="float:right" src=https://upload.wikimedia.org/wikipedia/commons/thumb/d/db/Gstreamer-logo.svg/1200px-Gstreamer-logo.svg.png><br />
<br />
= Examples for RZ/G2L =<br />
<br />
== Down Scaling using vspmfilter ==<br />
<br />
* Below table show range of support:<br />
{| class="wikitable"<br />
|+ style="caption-side:bottom;"|''Supported solution range''<br />
|<br />
| Input resolution<br />
| Output scale down ratio<br />
|-<br />
| Min<br />
| 128x72<br />
| 1<br />
|-<br />
| Max<br />
| 1920x1080<br />
| 15<br />
|}<br />
<br />
Following are sample commands for Up/Down Scaling with h264 Elementary Stream file.<br />
===Case of Down Scaling===<br />
<pre><br />
gst-launch-1.0 filesrc location=./<FullHDsize_h264_file> ! h264parse ! queue ! omxh264dec ! queue ! vspmfilter outbuf-alloc=true ! video/x-raw, format=BGRA, width=1280, height=720 ! waylandsink<br />
</pre><br />
===Case of Down Scaling (without color format conversion)===<br />
<pre><br />
gst-launch-1.0 filesrc location=./<FullHDsize_h264_file> ! h264parse ! queue ! omxh264dec ! queue ! vspmfilter outbuf-alloc=true ! video/x-raw, width=1280, height=720 ! waylandsink<br />
</pre><br />
===Case of Down Scaling (without color format conversion – use dmabuf)===<br />
<pre><br />
gst-launch-1.0 filesrc location=./<FullHDsize_h264_file> ! h264parse ! queue ! omxh264dec ! queue ! vspmfilter dmabuf-use=true ! video/x-raw, width=1280, height=720 ! waylandsink<br />
</pre><br />
<br />
== Color format conversion using vspmfilter ==<br />
* Below table show color format conversion using vspmfilter:<br />
<br />
{| class="wikitable"<br />
|+ style="caption-side:bottom;"|''Supported color format''<br />
| No.<br />
| Supported color format<br />
|-<br />
| 1<br />
| BGRA<br />
|-<br />
| 2<br />
| BGRx<br />
|-<br />
| 3<br />
| RGB16<br />
|-<br />
| 4<br />
| YUY2<br />
|-<br />
| 5<br />
| NV12<br />
|}<br />
<br />
Following are sample commands for converting color format. Please set the output format which begin supported following “format=”.<br />
===Case of BGRA output===<br />
<pre><br />
gst-launch-1.0 filesrc location=filename.mp4 ! qtdemux ! queue ! h264parse ! omxh264dec ! queue ! vspmfilter outbuf-alloc=true ! video/x-raw, format=BGRA ! waylandsink<br />
</pre><br />
== Camera Setup ==<br />
=== MIPI Camera Setup (OV5645 camera) ===<br />
Copy below script in a file say v412-init.sh and run the script first before using camera.<br />
<pre><br />
#!/bin/sh<br />
<br />
cru=$(cat /sys/class/video4linux/video*/name | grep "CRU")<br />
csi2=$(cat /sys/class/video4linux/v4l-subdev*/name | grep "csi2")<br />
<br />
# Please choose one of a following resolution then comment out the rest.<br />
ov5645_res=1280x960<br />
#ov5645_res=1920x1080<br />
<br />
if [ -z "$cru" ]<br />
then<br />
echo "No CRU video device founds"<br />
else<br />
media-ctl -d /dev/media0 -r<br />
if [ -z "$csi2" ]<br />
then<br />
echo "No MIPI CSI2 sub video device founds"<br />
else<br />
media-ctl -d /dev/media0 -l "'rzg2l_csi2 10830400.csi2':1 -> 'CRU output':0 [1]"<br />
media-ctl -d /dev/media0 -V "'rzg2l_csi2 10830400.csi2':1 [fmt:UYVY8_2X8/$ov5645_res field:none]"<br />
media-ctl -d /dev/media0 -V "'ov5645 0-003c':0 [fmt:UYVY8_2X8/$ov5645_res field:none]"<br />
echo "Link CRU/CSI2 to ov5645 0-003c with format UYVY8_2X8 and resolution $ov5645_res"<br />
fi<br />
fi<br />
</pre><br />
<br />
=== USB Camera Setup ===<br />
<pre><br />
$ rmmod uvcvideo<br />
$ insmod /lib/modules/5.10.83-cip1-yocto-standard/kernel/drivers/media/usb/uvc/uvcvideo.ko allocators=1<br />
</pre><br />
<br />
=== MIPI Camera Examples ===<br />
==== Capture from camera and display ====<br />
<pre><br />
gst-launch-1.0 v4l2src device=/dev/video0 ! video/x-raw,format=YUY2,width=1280,height=960 ! waylandsink<br />
</pre><br />
==== Capture and Scaling and Conversion using vspmfilter ====<br />
<pre><br />
gst-launch-1.0 v4l2src device=/dev/video0 ! "video/x-raw,format=ARGB,width=1280,height=960" ! vspmfilter outbuf-alloc=true ! "video/xraw,format=RGB16,width=640,height=480" ! waylandsink<br />
</pre><br />
====H.264 encode and save to a MP4 container file (using omxh264enc)====<br />
<pre><br />
gst-launch-1.0 v4l2src device=/dev/video0 num-buffers=300 ! video/x-raw,width=1280,height=960 ! vspmfilter dmabuf-use=true ! video/x-raw,format=NV12 ! omxh264enc control-rate=2 target-bitrate=10485760 interval_intraframes=14 periodicty-idr=2 ! video/x-h264,profile=\(string\)high,level=\(string\)4.2 ! filesink location=output.mp4<br />
</pre><br />
====H.264 decode stream (using omxh264dec)====<br />
<pre><br />
gst-launch-1.0 filesrc location=output.mp4 ! h264parse ! omxh264dec ! waylandsink<br />
</pre><br />
<br />
=== USB Camera Examples ===<br />
====Encode an .264 stream from camera (using omxh264enc)====<br />
<pre><br />
gst-launch-1.0 v4l2src device=/dev/video0 num-buffers=300 ! video/x-raw,width=1280,height=960 ! vspmfilter dmabuf-use=true ! video/x-raw,format=NV12 ! omxh264enc control-rate=2 target-bitrate=10485760 interval_intraframes=14 periodicty-idr=2 ! video/x-h264,profile=\(string\)high,level=\(string\)4.2 ! filesink location=output_xsga.264<br />
</pre><br />
====Decode (using omxh264dec)====<br />
<pre><br />
gst-launch-1.0 filesrc location=output_xsga.264 ! h264parse ! omxh264dec ! waylandsink<br />
</pre><br />
<br />
= Examples for RZV2L =<br />
<br />
== Camera Setup ==<br />
This section describes how to setup the RZV2L Camera module OV5645. <br />
<br />
=== Camera Setup VGA ===<br />
<code>media-ctl -d /dev/media0 -r ;</code><br />
<br />
<code>media-ctl -d /dev/media0 -l "'rzg2l_csi2 10830400.csi2':1 -> 'CRU output':0 [1]" ;</code><br />
<br />
<code>media-ctl -d /dev/media0 -V "'rzg2l_csi2 10830400.csi2':1 [fmt:UYVY8_2X8/640x480 field:none]" ;</code><br />
<br />
<code>media-ctl -d /dev/media0 -V "'ov5645 0-003c':0 [fmt:UYVY8_2X8/640x480 field:none]" ;</code><br />
<br />
<code>gst-launch-1.0 v4l2src device=/dev/video0 ! videoconvert ! waylandsink</code><br />
<br />
=== Camera Setup 720p ===<br />
<code>media-ctl -d /dev/media0 -r ;</code><br />
<br />
<code>media-ctl -d /dev/media0 -l "'rzg2l_csi2 10830400.csi2':1 -> 'CRU output':0 [1]" ;</code><br />
<br />
<code>media-ctl -d /dev/media0 -V "'rzg2l_csi2 10830400.csi2':1 [fmt:UYVY8_2X8/1280x720 field:none]" ;</code><br />
<br />
<code>media-ctl -d /dev/media0 -V "'ov5645 0-003c':0 [fmt:UYVY8_2X8/1280x720 field:none]" ;</code><br />
<br />
<code>gst-launch-1.0 v4l2src device=/dev/video0 ! videoconvert ! waylandsink</code> <br />
<br />
== Down Scaling using vspmfilter ==<br />
<br />
=== Down Scale Camera 720p video ===<br />
<code>gst-launch-1.0 v4l2src device=/dev/video0 ! videoconvert ! vspmfilter dmabuf-use=true ! video/x-raw, width=640, height=480 ! waylandsink</code><br />
<br />
=== Down Scale H264 Video File ===<br />
gst-launch-1.0 filesrc location=./in720p.mp4 ! qtdemux ! queue ! h264parse ! queue ! omxh264dec ! queue ! <code>! vspmfilter dmabuf-use=true ! video/x-raw, width=640, height=480 !</code>waylandsink<br />
<br />
=== Create H264 Video File ===<br />
This script can be run on the RZV2L<br />
<br />
<code>gst-launch-1.0 videotestsrc ! omxh264enc ! filesink location=./testvideo.h264</code><br />
<br />
== Stream H264 Video Over IP ==<br />
<br />
=== RZV2L(Source) Device send h264 stream using RTP: ===<br />
'''''Set the IP address to the PC or device that receives the video'''''<br />
<br />
<code>gst-launch-1.0 -v v4l2src device=/dev/video0 ! videoconvert ! vspmfilter dmabuf-use=true ! video/x-raw, width=640, height=480 ! queue ! omxh264enc ! queue ! rtph264pay ! queue ! udpsink host=<PC IP Address> port=5000</code><br />
<br />
=== PC that receives h264 rtp stream: ===<br />
<code>gst-launch-1.0 -v udpsrc port=5000 caps = "application/x-rtp, media=(string)video, clock-rate=(int)90000, encoding-name=(string)H264, payload=(int)96" ! rtph264depay ! decodebin ! videoconvert ! autovideosink</code><br />
<br />
=== PC receives H264 RTP Stream with VLC Player: ===<br />
1) Create a SDP script file ( i.e. test.sdp ).<br />
<br />
2) Add the following to the file. The variable <code>IP_ADDR_HOST_VID needs to be changed to the device (RZV2L) that is hosting the video.</code> <br />
<br />
<code>c=IN IP4 IP_ADDR_HOST_VID</code><br />
<br />
<code>m=video 5000 RTP/AVP 96</code><br />
<br />
<code>a=rtpmap:96 H264/90000</code><br />
<br />
3) Run the following Command<br />
<br />
<code>vlc --avcodec-hw=vaapi test.sdp</code><br />
==RZ GStreamer C Level API Demos==<br />
Here is a an example of how to use the GStreamer C Code API for the RZV and RZG. The demo utilizes the RZ H.264 and VSPM library.<br />
<br />
[https://github.com/renesas-rz/rz_gstreamer_demos RZ GStreamer Demo]</div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_camera&diff=1828RZ-G/RZG camera2022-11-18T20:20:50Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G Camera Page}}<br />
← [[RZ-G]]<br />
<br />
= Displaying Camera Images using GStreamer =<br />
<br />
== Using MIPI Camera ==<br />
These instructions are for using a OV5645 MIPI Camera and [https://www.96boards.org/product/mipiadapter/ MIPI Adapter Mezzanine] board.<br />
<br />
Before GStreamer can be used, the VIN/CSI settings must best configured manually on the command line using the media-ctl utility. <br />
<br />
In the BSP, this is done by running the script /home/root/vin-init.sh in the rootfs. <br />
<br />
This file located in the BSP at rzg2_bsp_eva_v104/meta-rzg2/recipes-multimedia/vin-init/files/vin-init.sh <br />
<br />
The BSP also installs the file systemd service file "vin.service" into /etc/systemd/system/multi-user.target.wants/vin.service so that the vin-init.sh script runs automatically on system boot. <br />
<br />
For example, for RZ/G2E,the follow command will be executed: <br />
<pre><br />
media-ctl -d /dev/media0 -r <br />
media-ctl -d /dev/media0 -l "'rcar_csi2 feaa0000.csi2':1 -> 'VIN4 output':0 [1]" <br />
media-ctl -d /dev/media0 -V "'rcar_csi2 feaa0000.csi2':1 [fmt:UYVY8_2X8/1280x960 field:none]" <br />
media-ctl -d /dev/media0 -V "'ov5645 3-003c':0 [fmt:UYVY8_2X8/1280x960 field:none]" <br />
</pre><br />
This connects VIN4 (/dev/video0) to OV5645. <br />
<br />
The only thing you can change in G2E is 'VIN4 output' => 'VIN5 output' if you want to use /dev/video1<br />
<br />
For more information, please refer to the document '''R01US0400EJ0107_GStreamer_UME_v1.0x.pdf''' that comes the '''RZG2 Group BSP Manual Set''' that can be downloaded from renesas.com<br />
<br />
For the '''RZG2L/RZV2L''' the settings are slightly different the device uses the rzg2l_csi2 required settings:<pre><br />
media-ctl -d /dev/media0 -r<br />
media-ctl -d /dev/media0 -l "'rzg2l_csi2 10830400.csi2':1 -> 'CRU output':0 [1]"<br />
media-ctl -d /dev/media0 -V "'rzg2l_csi2 10830400.csi2':1 [fmt:UYVY8_2X8/1920x1080 field:none]"<br />
media-ctl -d /dev/media0 -V "'ov5645 0-003c':0 [fmt:UYVY8_2X8/1920x1080 field:none]"<br />
</pre><br />
== Using USB Camera ==<br />
These instructions are useful to check if USB camera is working or not with RZ/G2 board.<br />
<br />
1. Check whether UVC driver is enabled or not. If there is no output, UVC driver is not enabled.<br />
<pre><br />
root@hihope-rzg2m:~# zcat /proc/config.gz | grep USB_VIDEO<br />
CONFIG_USB_VIDEO_CLASS=y<br />
CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y<br />
</pre><br />
<pre><br />
root@hihope-rzg2m:~# dmesg | grep uvcvideo<br />
[ 1.977174] usbcore: registered new interface driver uvcvideo<br />
[ 3.070300] uvcvideo: Found UVC 1.00 device HD Pro Webcam C920 (046d:0892)<br />
</pre><br />
2. Check camera device number<br />
<pre><br />
root@hihope-rzg2m:~# v4l2-ctl --list-devices<br />
fe960000.vsp rpf.0 input (platform:fe960000.vsp):<br />
/dev/video2<br />
/dev/video3<br />
/dev/video4<br />
/dev/video5<br />
/dev/video6<br />
/dev/video7<br />
<br />
fe9a0000.vsp rpf.0 input (platform:fe9a0000.vsp):<br />
/dev/video8<br />
/dev/video9<br />
<br />
HD Pro Webcam C920 (usb-ee000000.usb-1):<br />
/dev/video0<br />
</pre><br />
3. List supported video formats and resolutions of a specific video device:<br />
<pre><br />
# v4l2-ctl --list-formats-ext --device /dev/video1<br />
</pre><br />
4. Run<br />
<pre><br />
root@hihope-rzg2m:~# modprobe uvcvideo # to enable USB camera driver<br />
root@hihope-rzg2m:~# gst-launch-1.0 v4l2src device=/dev/video0 ! videoconvert ! waylandsink<br />
</pre><br />
<br />
= AISTARVISION 96BOARDS MIPI Adapter v2.4 =<br />
{| class="toccolours" width="100%" style="border-style: none ; text-align: center; background-color:white;"<br />
|-<br />
| [[File:mipi adpater.jpg|frameless]]<br>'''Top view of AISTARVISION 96Boards MIPI Adapter version 2.4'''<br />
| [[File:OV5645.JPG |frameless|]] <br>'''OV5645 MIPI'''<br />
| [[File:mipi_adpater_OV5645.jpg|frameless]]<br>'''Connection OV5645 camera to adapter board'''<br />
|}<br />
<br />
== Connection guide for Silicon Linux RZ/G2E evaluation kit (EK874) ==<br />
To connect and use CSI40 with OV5645:<br><br />
1. Connect 20th pin to 19th pin on J13 header for I2C SCL line.<br><br />
2. Connect 22nd pin to 21st pin on J13 header for I2C SDA line.<br><br />
3. Connect 23rd pin to 6th pin on J15 header for supplying power to OV5645 camera sensor.<br><br />
4. Connect 6th pin to 5th pin and 4th pin to 3rd pin on J14 header for supplying clock to OV5645 camera sensor.<br><br />
5. Connect OV5645 camera sensor to J3 header for CSI40 Interface<br><br />
{| class="toccolours" width="100%" style="border-style: none ; text-align: center; background-color:white;"<br />
|-<br />
| style="text-align:left;" | [[File:rzg2e_pin_connection.png|frameless|]]<br>'''Instruction of connecting OV5645 camera module in EK874'''<br><br />
| style="text-align:left;" | [[File:rzg2e_mipi_adpter.jpg|frameless|]]<br>'''Connection of adpater board and G2E '''<br><br />
<br />
|}<br />
<br><br />
== Connection guide for HiHope RZ/G2M platform (hihope-rzg2m) ==<br />
To connect and use CSI20 with OV5645: <br><br />
1. Connect 15th pin to 16th pin on J13 header for I2C SCL line.<br><br />
2. Connect 17th pin to 18th pin on J13 header for I2C SDA line.<br><br />
3. Connect 24th pin to 14th pin on J15 header for supplying power to OV5645 camera sensor.<br><br />
4. Connect 6th pin to 5th pin and 4th pin to 3rd pin on J14 header for supplying clock to OV5645 camera sensor.<br><br />
5. Connect OV5645 camera sensor to J4 header. It uses for linking OV5645 with CSI20 Interface.<br><br />
{| class="toccolours" width="100%" style="border-style: none ; text-align: center; background-color:white;"<br />
|-<br />
| style="text-align:left;" | [[File:rzg2m_connect_pin.png|frameless|]]<br>'''Instruction of connecting OV5645 camera module in RZG2M'''<br><br />
| style="text-align:left;" | [[File:zg2m_mipi_adapter.jpg |frameless|]]<br>'''Connection of adpater board and RZG2M'''<br><br />
<br />
|}</div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_DeviceTree&diff=1739RZ-G/RZG DeviceTree2022-10-07T23:12:42Z<p>Padhikari: </p>
<hr />
<div>__FORCETOC__<br />
{{DISPLAYTITLE:Device Tree}}<br />
← [[RZ-G]]<br />
<br />
* This page contains helpful notes about Device Tree configurations<br />
<br />
= RZ Specific Files =<br />
* Device Tree files for Renesas SoC and evaluation boards are under the directory '''arch/arm64/boot/dts/renesas'''<br />
* Below is the list of Device Tree files used for the Renesas Evaluation boards.<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2H HiHope''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r8a774e1.dtsi || RZ/G2H Device Tree containing all peripherals<br />
|-<br />
| hihope-common.dtsi ||<br />
|-<br />
| hihope-rev2.dtsi ||<br />
|-<br />
| hihope-rev4.dtsi ||<br />
|-<br />
| hihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi ||<br />
|-<br />
| hihope-rzg2-ex-aistarvision-mipi-adapter-2.4.dtsi ||<br />
|-<br />
| hihope-rzg2-ex.dtsi ||<br />
|-<br />
| hihope-rzg2-ex-lvds.dtsi ||<br />
|-<br />
| r8a774e1-hihope-rzg2h.dts ||<br />
|-<br />
| r8a774e1-hihope-rzg2h-ex.dts ||<br />
|-<br />
| r8a774e1-hihope-rzg2h-ex-idk-1110wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774e1-hihope-rzg2h-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774e1-hihope-rzg2h-ex-mipi-2.4.dts ||<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2N HiHope''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r8a774b1.dtsi || RZ/G2N Device Tree containing all peripherals<br />
|-<br />
| r8a774b1-hihope-rzg2n.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-ex.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-ex-idk-1110wr.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-ex-mipi-2.4.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2-ex.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2-ex-mipi-2.4.dts ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2M HiHope''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r8a774a1.dtsi || RZ/G2M Device Tree containing all peripherals<br />
|-<br />
| r8a774a1-hihope-rzg2m.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-ex.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-ex-idk-1110wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-ex-mipi-2.4.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2-ex.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2-ex-mipi-2.4.dts ||<br />
|-<br />
| r8a774a3.dtsi ||<br />
|-<br />
| r8a774a3-hihope-rzg2m.dts ||<br />
|-<br />
| r8a774a3-hihope-rzg2m-ex.dts ||<br />
|-<br />
| r8a774a3-hihope-rzg2m-ex-idk-1110wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774a3-hihope-rzg2m-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774a3-hihope-rzg2m-ex-mipi-2.4.dts ||<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2E EK874''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r8a774c0.dtsi || RZ/G2E Device Tree containing all peripherals<br />
|-<br />
| r8a774c0-cat874.dts ||<br />
|-<br />
| r8a774c0-cat874-revc.dts ||<br />
|-<br />
| r8a774c0-ek874.dts ||<br />
|-<br />
| r8a774c0-ek874-idk-2121wr.dts ||<br />
|-<br />
| r8a774c0-ek874-mipi-2.1.dts ||<br />
|-<br />
| r8a774c0-ek874-mipi-2.4.dts ||<br />
|-<br />
| r8a774c0-ek874-revc.dts ||<br />
|-<br />
| r8a774c0-ek874-revc-idk-2121wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774c0-ek874-revc-mipi-2.1.dts ||<br />
|-<br />
| r8a774c0-ek874-revc-mipi-2.4.dts ||<br />
|-<br />
| r8a774c0-es10-cat874.dts ||<br />
|-<br />
| r8a774c0-es10.dtsi ||<br />
|-<br />
| r8a774c0-es10-ek874.dts ||<br />
|-<br />
| r8a774c0-es10-ek874-idk-2121wr.dts ||<br />
|-<br />
| r8a774c0-es10-ek874-mipi-2.1.dts ||<br />
|-<br />
| r8a774c0-es10-ek874-mipi-2.4.dts ||<br />
|-<br />
| cat874-common.dtsi ||<br />
|-<br />
| cat875.dtsi ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2L SMARC''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r9a07g044.dtsi || RZ/G2L family SoC common parts<br />
|-<br />
| r9a07g044l.dtsi || Specific to RZ/G2L (R9A07G044L) SoC<br />
|-<br />
| r9a07g044l1.dtsi || Specific to RZ/G2L (R9A07G044L single cortex A55) SoC <br />
|-<br />
| r9a07g044l2.dtsi || Specific to RZ/G2L (R9A07G044L dual cortex A55) SoC<br />
|-<br />
| rz-smarc-common.dtsi ||<br />
|-<br />
| rzg2l-smarc.dtsi ||<br />
|-<br />
| rzg2l-smarc-pinfunction.dtsi ||<br />
|-<br />
| rzg2l-smarc-som.dtsi ||<br />
|-<br />
| r9a07g044l2-smarc.dts ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2LC SMARC''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r9a07g044c1.dtsi || RZ/G2LC Device Tree containing all peripherals<br />
|-<br />
| r9a07g044c2.dtsi || RZ/G2LC Device Tree containing all peripherals<br />
|-<br />
| r9a07g044c2-smarc.dts ||<br />
|-<br />
| rzg2lc-smarc.dtsi ||<br />
|-<br />
| rzg2lc-smarc-pinfunction.dtsi ||<br />
|-<br />
| rzg2lc-smarc-som.dtsi ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2UL SMARC''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| rzg2ul-smarc.dtsi ||<br />
|-<br />
| r9a07g043.dtsi || RZ/G2UL Device Tree containing all peripherals<br />
|-<br />
| r9a07g043u11.dtsi ||<br />
|-<br />
| r9a07g043u11-smarc.dts ||<br />
|-<br />
| r9a07g043u12.dtsi ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/V2L SMARC''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r9a07g054.dtsi || RZ/V2L Device Tree containing all peripherals<br />
|-<br />
| r9a07g054l1.dtsi ||<br />
|-<br />
| r9a07g054l2-dev.dts ||<br />
|-<br />
| r9a07g054l2.dtsi ||<br />
|-<br />
| r9a07g054l2-smarc.dts ||<br />
|-<br />
|}<br />
<br />
Internal Renesas boards<br />
* r9a07g044l2-dev.dts<br />
* rzg2l-smarc-dev.dtsi<br />
<br />
=Device Tree Syntax=<br />
<br />
=Top Level (root node)=<br />
<br />
==Compatible for the SoC==<br />
* The .dtsi file for each SoC will have a "compatible" string to specify that SoC it is. If you decide to make your own top level compatible, make sure you include the original SoC string. The reason is that some drivers (the VSP driver for example) look for that SoC string to know what SoC they are running on. If it is missing, it will not load or run correctly.<br />
Here is a correct example of a .dts file for a RZ/G2L board. Notice how "renesas,r9a07g044" is at the end of the line.<br />
<pre><br />
/ {<br />
model = "My Really Cool RZ/G2L Board";<br />
compatible = "my-rzg2l-board" , "renesas,r9a07g044";<br />
<br />
chosen {<br />
bootargs = "ignore_loglevel rw root=/dev/mmc0blk1";<br />
stdout-path = "serial0:115200n8";<br />
};<br />
<br />
};<br />
</pre><br />
<br />
=Pin Control (pin mux)=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** drivers/pinctrl/renesas/*<br />
** CONFIG_xxx=y<br />
** Documentation/devicetree/bindings/pinctrl/renesas,pcf.yaml<br />
<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** drivers/pinctrl/renesas/pfc-rzg2l.c<br />
** CONFIG_PINCTRL_RZG2L=y<br />
** Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
= IRQ0-7 =<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
** <br />
<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** drivers/irqchip/irq-renesas-rzg2l.c<br />
** CONFIG_RENESAS_RZG2L_IRQC=y<br />
** Added after 'rz-5.10-cip13'<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
*<br />
<br />
=Display=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* '''Ports Node''' When defining ports { }, you must set <font color=navy>#address-cells = <1>;</font> and <font color=navy>#size-cells = <0>;</font>. For more information, see the documentation in the kernel source: Documentation/devicetree/bindings/media/video-interfaces.txt<br />
* '''Resolution and Clock Definitions:''' An LCD Panel will have it's own separate driver. That driver will define the clock rate and resolution. The Renesas LCD driver will then get that information in order to set up the LCD controller (DU) output.<br />
* '''DCS Commands:''' Many (most) MIPI DSI Panels require setup command (DCS) to be set over MIPI DSI to configure the panel's controller before pixel data can be sent. This is why there is usually a separate driver for each LCD since these commands are specific to each LCD panel.<br />
* '''Simple-Panel Driver:''' If you panel requires no special setup (no MIPI DSI DCS commands) or your system is doing it manually over I2C, you can use the kernels "simple-panel" driver. Note that you will be required to edit the driver file (drivers/gpu/drm/panel/panel-simple.c) to add your specific panel resolution and timing that you want. See kernel documentation Documentation/devicetree/bindings/panel/simple-panel.txt.<br />
* '''Parallel RGB LCD:''' Since a parallel LCD does not need any special setup, you can use simple-panel driver in the kernel.<br />
* '''Check Display Settings:''' You can use the command '''modetest -M rcar-du -c''' to check the status of your display driver. It will also show you the supported resolutions of your display (in the case that you are using an HDMI interface where it will read what is supported by the HDMI panel).<br />
<br />
* '''Check VBLANK Timings:''' You can use the command '''vbltest -M rcar-du''' to check the VBLANK timings. If your result is always around 60Hz, your panel is set correctly. <br />
<br />
<br><br />
<br />
'''Device Tree Examples:'''<br />
* RZ/G2L: MIPI-CSI to HDMI Bridge: See device tree for evaluation board.<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| Example of MIPI DSI Panel on RZ/G2L &emsp;<br />
|-<br />
|<br />
<br />
* Ilitek ILI9881c panel controller<br />
* 2-lane MIPI interface<br />
* 800x1280 Portrait Panel<br />
<br />
<pre><br />
<br />
&du {<br />
status = "okay";<br />
};<br />
<br />
&dsi0 {<br />
status = "okay";<br />
#address-cells = <1>;<br />
#size-cells = <0>;<br />
<br />
ports {<br />
#address-cells = <1>;<br />
#size-cells = <0>;<br />
<br />
port@1 {<br />
dsi0_out: endpoint {<br />
remote-endpoint = <&panel_in>;<br />
data-lanes = <1 2>;<br />
};<br />
};<br />
};<br />
<br />
panel@0 {<br />
compatible = "ilitek,ili9881c";<br />
reg = <0>;<br />
dsi-lanes = <2>;<br />
enable-gpios = <&pinctrl RZG2L_GPIO(43, 0) GPIO_ACTIVE_HIGH>;<br />
backlight = <&backlight>;<br />
status = "okay";<br />
<br />
port {<br />
panel_in: endpoint {<br />
remote-endpoint = <&dsi0_out>;<br />
};<br />
};<br />
};<br />
};<br />
<br />
</pre><br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| Example of RGB Panel on RZ/G2L &emsp;<br />
|-<br />
|<br />
<br />
* Add a rgb-dummy device<br />
<br />
<pre><br />
rgb-dummy {<br />
compatible = "renesas,rgb-dummy";<br />
ports {<br />
#address-cells = <1>;<br />
#size-cells = <0>;<br />
<br />
port@0 {<br />
reg = <0>;<br />
rgb_in: endpoint {<br />
remote-endpoint = <&du_out_rgb>;<br />
};<br />
};<br />
port@1 {<br />
reg = <1>;<br />
rgb_out: endpoint {<br />
remote-endpoint = <&panel_in>;<br />
};<br />
};<br />
};<br />
};<br />
</pre><br />
<br />
* Add panel device node:<br />
<pre><br />
panel {<br />
/* <br />
* Define code for panel here such as compatible, backlight, power,...<br />
* Can refer drivers/gpu/drm/panel/panel-simple.c<br />
*/<br />
port {<br />
panel_in: endpoint {<br />
remote-endpoint = <&rgb_out>;<br />
};<br />
};<br />
};<br />
</pre><br />
<br />
* Add endpoint for DU RGB out:<br />
<pre><br />
port@0 {<br />
du_out_rgb: endpoint {<br />
remote-endpoint = <&rgb_in>;<br />
};<br />
};<br />
</pre><br />
|}<br />
<br />
=Audio=<br />
<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E: rz_linux-cip/sound/soc/sh/'''rcar/*.c'''<br />
* RZ/G2L, G2LC, G2UL, V2L: rz_linux-cip/sound/soc/sh/'''rz-ssi.c'''<br />
<br />
'''Device Tree Examples'''<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| Example of MAX9867 codec with MAX98390 Amplifier for RZ/G2L &emsp;<br />
|-<br />
|<br />
Here is an example of a MAX9867 on SSI channel 3, using I2C-3. MAX98390 Amplifier on I2C-2.<br />
<br />
This is for the Linux-5.10 kernel. For the older Linux-4.19 kernel, there are some differences.<br />
<br />
'''Pin Setup'''<br />
<pre><br />
&pinctrl {<br />
<br />
/* MAX98390 Amplifier */<br />
i2c2_pins: i2c2 {<br />
pinmux = <RZG2L_PORT_PINMUX(42, 3, 1)>, /* SDA */<br />
<RZG2L_PORT_PINMUX(42, 4, 1)>; /* SCL */<br />
};<br />
<br />
/* MAX9867 Codec */<br />
i2c3_pins: i2c3 {<br />
pinmux = <RZG2L_PORT_PINMUX(18, 0, 3)>, /* SDA */<br />
<RZG2L_PORT_PINMUX(18, 1, 3)>; /* SCL */<br />
};<br />
<br />
ssi3_pins: ssi3 {<br />
pinmux = <RZG2L_PORT_PINMUX(31, 0, 5)>, /* BCK */<br />
<RZG2L_PORT_PINMUX(31, 1, 5)>, /* RCK */<br />
<RZG2L_PORT_PINMUX(32, 0, 5)>, /* TXD */<br />
<RZG2L_PORT_PINMUX(32, 1, 5)>; /* RXD */<br />
};<br />
};<br />
</pre><br />
<br />
'''Enable SSI channel'''<br />
<pre><br />
&ssi3 {<br />
pinctrl-0 = <&ssi3_pins>;<br />
pinctrl-names = "default";<br />
<br />
#sound-dai-cells = <1>;<br />
status = "okay";<br />
};<br />
</pre><br />
<br />
'''Create a node for the MAX9867'''<br />
<pre><br />
my_snd: sound {<br />
compatible = "simple-audio-card";<br />
simple-audio-card,widgets = "Speaker", "Ext Spk";<br />
<br />
simple-audio-card,routing =<br />
"Ext Spk", "BE_OUT";<br />
"Ext Spk", "LOUT",<br />
"Ext Spk", "ROUT";<br />
<br />
/* MAX98390 Amplifier */<br />
simple-audio-card,dai-link@0{<br />
format = "i2s";<br />
bitclock-master = <&cpu_dai3>;<br />
frame-master = <&cpu_dai3>;<br />
mclk-fs = <256>;<br />
cpu_dai3: cpu {<br />
sound-dai = <&ssi3>;<br />
};<br />
<br />
codec_dai3: codec {<br />
sound-dai = <&max98390>;<br />
clocks = <&mclk>;<br />
};<br />
};<br />
<br />
/* MAX9867 Codec */<br />
simple-audio-card,dai-link@1{<br />
format = "i2s";<br />
bitclock-master = <&cpu_dai0>;<br />
frame-master = <&cpu_dai0>;<br />
mclk-fs = <256>;<br />
cpu_dai0: cpu {<br />
sound-dai = <&ssi0>;<br />
};<br />
<br />
codec_dai0: codec {<br />
sound-dai = <&max9867>;<br />
clocks = <&mclk>;<br />
};<br />
};<br />
};<br />
</pre><br />
<br />
<br />
'''I2C node for the Codec and Amp'''<br />
<pre><br />
&i2c2 {<br />
pinctrl-0 = <&i2c2_pins>;<br />
pinctrl-names = "default";<br />
<br />
status = "okay";<br />
clock-frequency = <400000>;<br />
<br />
/* MAX98390 Amplifier */<br />
max98390: codec@3d {<br />
status = "okay";<br />
compatible = "maxim,max98390";<br />
#sound-dai-cells = <0>;<br />
reg = <0x3d>;<br />
};<br />
};<br />
<br />
&i2c3 {<br />
pinctrl-0 = <&i2c3_pins>;<br />
pinctrl-names = "default";<br />
<br />
status = "okay";<br />
clock-frequency = <400000>;<br />
<br />
/* MAX9867 Codec */<br />
max9867: codec@18 {<br />
status = "okay";<br />
compatible = "maxim,max9867";<br />
#sound-dai-cells = <0>;<br />
reg = <0x18>;<br />
};<br />
};<br />
</pre><br />
<br />
<br />
|}<br />
<br />
=Camera=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
<br />
=Ethernet=<br />
<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E, G2L, G2LC, G2UL, V2L:<br />
** rz_linux-cip/drivers/net/ethernet/renesas/ (ravb_main.c, ravb_ptp.c)<br />
** CONFIG_NET_VENDOR_RENESAS=y<br />
** # CONFIG_SH_ETH is not set<br />
** CONFIG_RAVB=y<br />
<br />
'''Notes'''<br />
* The Link Status input pin ('''LINKSTA''') is not used. The driver instead relies on the PHY to inform it that the link is up by using in-band status messages on the RGMII lines.<br />
* Do not forget to set the '''correct voltage levels''' for the pins (3.3v, 1.5v, etc..) in the device tree in the '''pinctrl node'''.<br />
** You use the syntax "power-source = <3300>;" when you declare the pins for Ethernet.<br />
** Refer to the '''pinctrl documentation''' in the kernel for more info.<br />
** Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml<br />
** Documentation/devicetree/bindings/pinctrl/renesas,pcf.yaml<br />
<br />
<br />
'''Device Tree Examples'''<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| Example of enabling MII mode for RZ/G2L &emsp;<br />
|-<br />
|<br />
<br />
'''Ethernet node for MII mode'''<br />
<pre><br />
&eth0 {<br />
pinctrl-0 = <&eth0_mii_pins>;<br />
pinctrl-names = "default";<br />
phy-handle = <&phy0>;<br />
phy-mode = "mii";<br />
status = "okay";<br />
<br />
phy0: ethernet-phy@7 {<br />
compatible = "ethernet-phy-id0022.1640",<br />
"ethernet-phy-ieee802.3-c22";<br />
reg = <7>;<br />
rxc-skew-psec = <2400>;<br />
txc-skew-psec = <2400>;<br />
rxdv-skew-psec = <0>;<br />
txdv-skew-psec = <0>;<br />
rxd0-skew-psec = <0>;<br />
rxd1-skew-psec = <0>;<br />
rxd2-skew-psec = <0>;<br />
rxd3-skew-psec = <0>;<br />
txd0-skew-psec = <0>;<br />
txd1-skew-psec = <0>;<br />
txd2-skew-psec = <0>;<br />
txd3-skew-psec = <0>;<br />
<br />
interrupt-parent = <&pinctrl>;<br />
interrupts = <RZG2L_GPIO(1, 0) IRQ_TYPE_LEVEL_LOW>;<br />
};<br />
};<br />
<br />
&eth1 {<br />
pinctrl-0 = <&eth1_mii_pins>;<br />
pinctrl-names = "default";<br />
phy-handle = <&phy1>;<br />
phy-mode = "mii";<br />
status = "okay";<br />
<br />
phy1: ethernet-phy@7 {<br />
compatible = "ethernet-phy-id0022.1640",<br />
"ethernet-phy-ieee802.3-c22";<br />
reg = <7>;<br />
rxc-skew-psec = <2400>;<br />
txc-skew-psec = <2400>;<br />
rxdv-skew-psec = <0>;<br />
txdv-skew-psec = <0>;<br />
rxd0-skew-psec = <0>;<br />
rxd1-skew-psec = <0>;<br />
rxd2-skew-psec = <0>;<br />
rxd3-skew-psec = <0>;<br />
txd0-skew-psec = <0>;<br />
txd1-skew-psec = <0>;<br />
txd2-skew-psec = <0>;<br />
txd3-skew-psec = <0>;<br />
<br />
interrupt-parent = <&pinctrl>;<br />
interrupts = <RZG2L_GPIO(1, 1) IRQ_TYPE_LEVEL_LOW>;<br />
};<br />
};<br />
</pre><br />
<br />
<br />
'''Pin Setup'''<br />
<br />
<pre><br />
&pinctrl {<br />
<br />
eth0_mii_pins: eth0 {<br />
pinmux = <RZG2L_PORT_PINMUX(28, 1, 1)>, /* ET0_LINKSTA */<br />
<RZG2L_PORT_PINMUX(27, 1, 1)>, /* ET0_MDC */<br />
<RZG2L_PORT_PINMUX(28, 0, 1)>, /* ET0_MDIO */<br />
<RZG2L_PORT_PINMUX(20, 0, 1)>, /* ET0_TXC */<br />
<RZG2L_PORT_PINMUX(20, 1, 1)>, /* ET0_TX_CTL */<br />
<RZG2L_PORT_PINMUX(20, 2, 1)>, /* ET0_TXD0 */<br />
<RZG2L_PORT_PINMUX(21, 0, 1)>, /* ET0_TXD1 */<br />
<RZG2L_PORT_PINMUX(21, 1, 1)>, /* ET0_TXD2 */<br />
<RZG2L_PORT_PINMUX(22, 0, 1)>, /* ET0_TXD3 */<br />
<RZG2L_PORT_PINMUX(22, 1, 1)>, /* ETH0_TX_ERR */<br />
<RZG2L_PORT_PINMUX(23, 0, 1)>, /* ETH0_TX_COL */<br />
<RZG2L_PORT_PINMUX(23, 1, 1)>, /* ETH0_TX_CRS */<br />
<RZG2L_PORT_PINMUX(24, 0, 1)>, /* ET0_RXC */<br />
<RZG2L_PORT_PINMUX(24, 1, 1)>, /* ET0_RX_CTL */<br />
<RZG2L_PORT_PINMUX(25, 0, 1)>, /* ET0_RXD0 */<br />
<RZG2L_PORT_PINMUX(25, 1, 1)>, /* ET0_RXD1 */<br />
<RZG2L_PORT_PINMUX(26, 0, 1)>, /* ET0_RXD2 */<br />
<RZG2L_PORT_PINMUX(26, 1, 1)>, /* ET0_RXD3 */<br />
<RZG2L_PORT_PINMUX(27, 0, 1)>; /* ETH0_RX_ERR */<br />
};<br />
<br />
eth1_mii_pins: eth1 {<br />
pinmux = <RZG2L_PORT_PINMUX(37, 2, 1)>, /* ET1_LINKSTA */<br />
<RZG2L_PORT_PINMUX(37, 0, 1)>, /* ET1_MDC */<br />
<RZG2L_PORT_PINMUX(37, 1, 1)>, /* ET1_MDIO */<br />
<RZG2L_PORT_PINMUX(29, 0, 1)>, /* ET1_TXC */<br />
<RZG2L_PORT_PINMUX(29, 1, 1)>, /* ET1_TX_CTL */<br />
<RZG2L_PORT_PINMUX(30, 0, 1)>, /* ET1_TXD0 */<br />
<RZG2L_PORT_PINMUX(30, 1, 1)>, /* ET1_TXD1 */<br />
<RZG2L_PORT_PINMUX(31, 0, 1)>, /* ET1_TXD2 */<br />
<RZG2L_PORT_PINMUX(31, 1, 1)>, /* ET1_TXD3 */<br />
<RZG2L_PORT_PINMUX(32, 0, 1)>, /* ETH1_TX_ERR */<br />
<RZG2L_PORT_PINMUX(32, 1, 1)>, /* ETH1_TX_COL */<br />
<RZG2L_PORT_PINMUX(33, 0, 1)>, /* ETH1_TX_CRS */<br />
<RZG2L_PORT_PINMUX(33, 1, 1)>, /* ET1_RXC */<br />
<RZG2L_PORT_PINMUX(34, 0, 1)>, /* ET1_RX_CTL */<br />
<RZG2L_PORT_PINMUX(34, 1, 1)>, /* ET1_RXD0 */<br />
<RZG2L_PORT_PINMUX(35, 0, 1)>, /* ET1_RXD1 */<br />
<RZG2L_PORT_PINMUX(35, 1, 1)>, /* ET1_RXD2 */<br />
<RZG2L_PORT_PINMUX(36, 0, 1)>, /* ET1_RXD3 */<br />
<RZG2L_PORT_PINMUX(36, 1, 1)>; /* ETH1_RX_ERR */<br />
};<br />
}; <br />
</pre><br />
<br />
|}<br />
<br />
=USB=<br />
<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=SD Card=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=eMMC=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** driver/mmc/host/'''renesas_sdhi.h'''<br />
** driver/mmc/host/'''renesas_sdhi_core.c'''<br />
** driver/mmc/host/'''renesas_sdhi_internal_dmac.c'''<br />
** driver/mmc/host/'''tmio_mmc.h'''<br />
** driver/mmc/host/'''tmio_mmc_core.c'''<br />
** CONFIG_MMC_SDHI=y<br />
** CONFIG_MMC_SDHI_INTERNAL_DMAC=y (selected automatically by MMC_SDHI)<br />
** CONFIG_MMC_TMIO_CORE=y (selected automatically by MMC_SDHI)<br />
<br />
'''Notes'''<br />
* Combo driver for MMC + SDHI HW<br />
* The core of the SDHI code is using the TMIO (Toshiba Mobile IO) driver because it is the same HW block and they have shared the same driver for many years.<br />
* CONFIG_MMC_SDHI_SYS_DMAC=y is selected automatically by MMC_SDHI, but is only for RZ/G1 series devices.<br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=I2C=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** drivers/i2c/busses/ i2c-riic.c<br />
** CONFIG_I2C_RIIC=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
= SPI =<br />
'''Linux Drivers'''<br />
* MSIOF: RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RSPI: RZ/G2L, G2LC, G2UL, V2L:<br />
** drivers/spi/spi-rspi.c<br />
** CONFIG_SPI_RSPI=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
<br />
=QSPI Flash=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
= UART (SCIF) =<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
= UART (SCI) =<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=CAN=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
<br />
=ADC=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=Watchdog Timer(WDT)=<br />
<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** rz_linux-cip/drivers/watchdog/'''renesas_wdt.c'''<br />
** CONFIG_RENESAS_WDT<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** rz_linux-cip/drivers/watchdog/'''rzg2l_wdt.c'''<br />
** CONFIG_RENESAS_RZG2LWDT<br />
<br />
'''Notes'''<br />
* When rebooting the system, the watchdog timer is used. Simply type the command line "reboot" in the console.<br />
* To test a watch dog timeout/reboot, enter this command in the console "cat >> /dev/watchdog", then press ENTER again, then wait 1 minutes, and the board should reboot.<br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=PWM=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
<br />
=Timer=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
= Thermal =<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** drivers/thermal/rcar_gen3__thermal.c<br />
** CONFIG_RCAR_GEN3_THERMAL=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** drivers/thermal/rzg2l_thermal.c<br />
** CONFIG_RZG2L_THERMAL=y<br />
<br />
'''Notes'''<br />
* The Linux driver reads the registers and applies the formula in the hardware manual<br />
* You can read the current value running the command:<br />
** $ cat /sys/class/thermal/thermal_zone0/temp<br />
* The output value is in millicelsius<br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
= PMIC RAA215300 =<br />
'''Linux Drivers'''<br />
** drivers/mfd/raa215300.c<br />
** CONFIG_PMIC_RAA215300=y<br />
** Documentation/devicetree/bindings/mfd/raa215300.txt<br />
<br />
'''Notes'''<br />
* Only supports RTC function<br />
* Added in VLP/G v3.0.1 release (branch rz-5.10-cip13)<br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)</div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_DeviceTree&diff=1737RZ-G/RZG DeviceTree2022-10-07T16:49:43Z<p>Padhikari: </p>
<hr />
<div>__FORCETOC__<br />
{{DISPLAYTITLE:Device Tree}}<br />
← [[RZ-G]]<br />
<br />
* This page contains helpful notes about Device Tree configurations<br />
<br />
= RZ Specific Files =<br />
* Device Tree files for Renesas SoC and evaluation boards are under the directory '''arch/arm64/boot/dts/renesas'''<br />
* Below is the list of Device Tree files used for the Renesas Evaluation boards.<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2H HiHope''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r8a774e1.dtsi || RZ/G2H Device Tree containing all peripherals<br />
|-<br />
| hihope-common.dtsi ||<br />
|-<br />
| hihope-rev2.dtsi ||<br />
|-<br />
| hihope-rev4.dtsi ||<br />
|-<br />
| hihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi ||<br />
|-<br />
| hihope-rzg2-ex-aistarvision-mipi-adapter-2.4.dtsi ||<br />
|-<br />
| hihope-rzg2-ex.dtsi ||<br />
|-<br />
| hihope-rzg2-ex-lvds.dtsi ||<br />
|-<br />
| r8a774e1-hihope-rzg2h.dts ||<br />
|-<br />
| r8a774e1-hihope-rzg2h-ex.dts ||<br />
|-<br />
| r8a774e1-hihope-rzg2h-ex-idk-1110wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774e1-hihope-rzg2h-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774e1-hihope-rzg2h-ex-mipi-2.4.dts ||<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2N HiHope''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r8a774b1.dtsi || RZ/G2N Device Tree containing all peripherals<br />
|-<br />
| r8a774b1-hihope-rzg2n.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-ex.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-ex-idk-1110wr.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-ex-mipi-2.4.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2-ex.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2-ex-mipi-2.4.dts ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2M HiHope''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r8a774a1.dtsi || RZ/G2M Device Tree containing all peripherals<br />
|-<br />
| r8a774a1-hihope-rzg2m.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-ex.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-ex-idk-1110wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-ex-mipi-2.4.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2-ex.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2-ex-mipi-2.4.dts ||<br />
|-<br />
| r8a774a3.dtsi ||<br />
|-<br />
| r8a774a3-hihope-rzg2m.dts ||<br />
|-<br />
| r8a774a3-hihope-rzg2m-ex.dts ||<br />
|-<br />
| r8a774a3-hihope-rzg2m-ex-idk-1110wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774a3-hihope-rzg2m-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774a3-hihope-rzg2m-ex-mipi-2.4.dts ||<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2E EK874''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r8a774c0.dtsi || RZ/G2E Device Tree containing all peripherals<br />
|-<br />
| r8a774c0-cat874.dts ||<br />
|-<br />
| r8a774c0-cat874-revc.dts ||<br />
|-<br />
| r8a774c0-ek874.dts ||<br />
|-<br />
| r8a774c0-ek874-idk-2121wr.dts ||<br />
|-<br />
| r8a774c0-ek874-mipi-2.1.dts ||<br />
|-<br />
| r8a774c0-ek874-mipi-2.4.dts ||<br />
|-<br />
| r8a774c0-ek874-revc.dts ||<br />
|-<br />
| r8a774c0-ek874-revc-idk-2121wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774c0-ek874-revc-mipi-2.1.dts ||<br />
|-<br />
| r8a774c0-ek874-revc-mipi-2.4.dts ||<br />
|-<br />
| r8a774c0-es10-cat874.dts ||<br />
|-<br />
| r8a774c0-es10.dtsi ||<br />
|-<br />
| r8a774c0-es10-ek874.dts ||<br />
|-<br />
| r8a774c0-es10-ek874-idk-2121wr.dts ||<br />
|-<br />
| r8a774c0-es10-ek874-mipi-2.1.dts ||<br />
|-<br />
| r8a774c0-es10-ek874-mipi-2.4.dts ||<br />
|-<br />
| cat874-common.dtsi ||<br />
|-<br />
| cat875.dtsi ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2L SMARC''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r9a07g044.dtsi || RZ/G2L family SoC common parts<br />
|-<br />
| r9a07g044l.dtsi || Specific to RZ/G2L (R9A07G044L) SoC<br />
|-<br />
| r9a07g044l1.dtsi || Specific to RZ/G2L (R9A07G044L single cortex A55) SoC <br />
|-<br />
| r9a07g044l2.dtsi || Specific to RZ/G2L (R9A07G044L dual cortex A55) SoC<br />
|-<br />
| rz-smarc-common.dtsi ||<br />
|-<br />
| rzg2l-smarc.dtsi ||<br />
|-<br />
| rzg2l-smarc-pinfunction.dtsi ||<br />
|-<br />
| rzg2l-smarc-som.dtsi ||<br />
|-<br />
| r9a07g044l2-smarc.dts ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2LC SMARC''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r9a07g044c1.dtsi || RZ/G2LC Device Tree containing all peripherals<br />
|-<br />
| r9a07g044c2.dtsi || RZ/G2LC Device Tree containing all peripherals<br />
|-<br />
| r9a07g044c2-smarc.dts ||<br />
|-<br />
| rzg2lc-smarc.dtsi ||<br />
|-<br />
| rzg2lc-smarc-pinfunction.dtsi ||<br />
|-<br />
| rzg2lc-smarc-som.dtsi ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2UL SMARC''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| rzg2ul-smarc.dtsi ||<br />
|-<br />
| r9a07g043.dtsi || RZ/G2UL Device Tree containing all peripherals<br />
|-<br />
| r9a07g043u11.dtsi ||<br />
|-<br />
| r9a07g043u11-smarc.dts ||<br />
|-<br />
| r9a07g043u12.dtsi ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/V2L SMARC''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r9a07g054.dtsi || RZ/V2L Device Tree containing all peripherals<br />
|-<br />
| r9a07g054l1.dtsi ||<br />
|-<br />
| r9a07g054l2-dev.dts ||<br />
|-<br />
| r9a07g054l2.dtsi ||<br />
|-<br />
| r9a07g054l2-smarc.dts ||<br />
|-<br />
|}<br />
<br />
Internal Renesas boards<br />
* r9a07g044l2-dev.dts<br />
* rzg2l-smarc-dev.dtsi<br />
<br />
=Device Tree Syntax=<br />
<br />
=Top Level (root node)=<br />
<br />
==Compatible for the SoC==<br />
* The .dtsi file for each SoC will have a "compatible" string to specify that SoC it is. If you decide to make your own top level compatible, make sure you include the original SoC string. The reason is that some drivers (the VSP driver for example) look for that SoC string to know what SoC they are running on. If it is missing, it will not load or run correctly.<br />
Here is a correct example of a .dts file for a RZ/G2L board. Notice how "renesas,r9a07g044" is at the end of the line.<br />
<pre><br />
/ {<br />
model = "My Really Cool RZ/G2L Board";<br />
compatible = "my-rzg2l-board" , "renesas,r9a07g044";<br />
<br />
chosen {<br />
bootargs = "ignore_loglevel rw root=/dev/mmc0blk1";<br />
stdout-path = "serial0:115200n8";<br />
};<br />
<br />
};<br />
</pre><br />
<br />
=Pin Control (pin mux)=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** drivers/pinctrl/renesas/*<br />
** CONFIG_xxx=y<br />
** Documentation/devicetree/bindings/pinctrl/renesas,pcf.yaml<br />
<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** drivers/pinctrl/renesas/pfc-rzg2l.c<br />
** CONFIG_xxx=y<br />
** Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
= IRQ0-7 =<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
** <br />
<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** drivers/irqchip/irq-renesas-rzg2l.c<br />
** CONFIG_RENESAS_RZG2L_IRQC=y<br />
** Added after 'rz-5.10-cip13'<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
*<br />
<br />
=Display=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* '''Ports Node''' When defining ports { }, you must set <font color=navy>#address-cells = <1>;</font> and <font color=navy>#size-cells = <0>;</font>. For more information, see the documentation in the kernel source: Documentation/devicetree/bindings/media/video-interfaces.txt<br />
* '''Resolution and Clock Definitions:''' An LCD Panel will have it's own separate driver. That driver will define the clock rate and resolution. The Renesas LCD driver will then get that information in order to set up the LCD controller (DU) output.<br />
* '''DCS Commands:''' Many (most) MIPI DSI Panels require setup command (DCS) to be set over MIPI DSI to configure the panel's controller before pixel data can be sent. This is why there is usually a separate driver for each LCD since these commands are specific to each LCD panel.<br />
* '''Simple-Panel Driver:''' If you panel requires no special setup (no MIPI DSI DCS commands) or your system is doing it manually over I2C, you can use the kernels "simple-panel" driver. Note that you will be required to edit the driver file (drivers/gpu/drm/panel/panel-simple.c) to add your specific panel resolution and timing that you want. See kernel documentation Documentation/devicetree/bindings/panel/simple-panel.txt.<br />
* '''Parallel RGB LCD:''' Since a parallel LCD does not need any special setup, you can use simple-panel driver in the kernel.<br />
* '''Check Display Settings:''' You can use the command '''modetest -M rcar-du -c''' to check the status of your display driver. It will also show you the supported resolutions of your display (in the case that you are using an HDMI interface where it will read what is supported by the HDMI panel).<br />
<br />
* '''Check VBLANK Timings:''' You can use the command '''vbltest -M rcar-du''' to check the VBLANK timings. If your result is always around 60Hz, your panel is set correctly. <br />
<br />
<br><br />
<br />
'''Device Tree Examples:'''<br />
* RZ/G2L: MIPI-CSI to HDMI Bridge: See device tree for evaluation board.<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| Example of MIPI DSI Panel on RZ/G2L &emsp;<br />
|-<br />
|<br />
<br />
* Ilitek ILI9881c panel controller<br />
* 2-lane MIPI interface<br />
* 800x1280 Portrait Panel<br />
<br />
<pre><br />
<br />
&du {<br />
status = "okay";<br />
};<br />
<br />
&dsi0 {<br />
status = "okay";<br />
#address-cells = <1>;<br />
#size-cells = <0>;<br />
<br />
ports {<br />
#address-cells = <1>;<br />
#size-cells = <0>;<br />
<br />
port@1 {<br />
dsi0_out: endpoint {<br />
remote-endpoint = <&panel_in>;<br />
data-lanes = <1 2>;<br />
};<br />
};<br />
};<br />
<br />
panel@0 {<br />
compatible = "ilitek,ili9881c";<br />
reg = <0>;<br />
dsi-lanes = <2>;<br />
enable-gpios = <&pinctrl RZG2L_GPIO(43, 0) GPIO_ACTIVE_HIGH>;<br />
backlight = <&backlight>;<br />
status = "okay";<br />
<br />
port {<br />
panel_in: endpoint {<br />
remote-endpoint = <&dsi0_out>;<br />
};<br />
};<br />
};<br />
};<br />
<br />
</pre><br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| Example of RGB Panel on RZ/G2L &emsp;<br />
|-<br />
|<br />
<br />
* Add a rgb-dummy device<br />
<br />
<pre><br />
rgb-dummy {<br />
compatible = "renesas,rgb-dummy";<br />
ports {<br />
#address-cells = <1>;<br />
#size-cells = <0>;<br />
<br />
port@0 {<br />
reg = <0>;<br />
rgb_in: endpoint {<br />
remote-endpoint = <&du_out_rgb>;<br />
};<br />
};<br />
port@1 {<br />
reg = <1>;<br />
rgb_out: endpoint {<br />
remote-endpoint = <&panel_in>;<br />
};<br />
};<br />
};<br />
};<br />
</pre><br />
<br />
* Add panel device node:<br />
<pre><br />
panel {<br />
/* <br />
* Define code for panel here such as compatible, backlight, power,...<br />
* Can refer drivers/gpu/drm/panel/panel-simple.c<br />
*/<br />
port {<br />
panel_in: endpoint {<br />
remote-endpoint = <&rgb_out>;<br />
};<br />
};<br />
};<br />
</pre><br />
<br />
* Add endpoint for DU RGB out:<br />
<pre><br />
port@0 {<br />
du_out_rgb: endpoint {<br />
remote-endpoint = <&rgb_in>;<br />
};<br />
};<br />
</pre><br />
|}<br />
<br />
=Audio=<br />
<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E: rz_linux-cip/sound/soc/sh/'''rcar/*.c'''<br />
* RZ/G2L, G2LC, G2UL, V2L: rz_linux-cip/sound/soc/sh/'''rz-ssi.c'''<br />
<br />
'''Device Tree Examples'''<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| Example of MAX9867 codec with MAX98390 Amplifier for RZ/G2L &emsp;<br />
|-<br />
|<br />
Here is an example of a MAX9867 on SSI channel 3, using I2C-3. MAX98390 Amplifier on I2C-2.<br />
<br />
This is for the Linux-5.10 kernel. For the older Linux-4.19 kernel, there are some differences.<br />
<br />
'''Pin Setup'''<br />
<pre><br />
&pinctrl {<br />
<br />
/* MAX98390 Amplifier */<br />
i2c2_pins: i2c2 {<br />
pinmux = <RZG2L_PORT_PINMUX(42, 3, 1)>, /* SDA */<br />
<RZG2L_PORT_PINMUX(42, 4, 1)>; /* SCL */<br />
};<br />
<br />
/* MAX9867 Codec */<br />
i2c3_pins: i2c3 {<br />
pinmux = <RZG2L_PORT_PINMUX(18, 0, 3)>, /* SDA */<br />
<RZG2L_PORT_PINMUX(18, 1, 3)>; /* SCL */<br />
};<br />
<br />
ssi3_pins: ssi3 {<br />
pinmux = <RZG2L_PORT_PINMUX(31, 0, 5)>, /* BCK */<br />
<RZG2L_PORT_PINMUX(31, 1, 5)>, /* RCK */<br />
<RZG2L_PORT_PINMUX(32, 0, 5)>, /* TXD */<br />
<RZG2L_PORT_PINMUX(32, 1, 5)>; /* RXD */<br />
};<br />
};<br />
</pre><br />
<br />
'''Enable SSI channel'''<br />
<pre><br />
&ssi3 {<br />
pinctrl-0 = <&ssi3_pins>;<br />
pinctrl-names = "default";<br />
<br />
#sound-dai-cells = <1>;<br />
status = "okay";<br />
};<br />
</pre><br />
<br />
'''Create a node for the MAX9867'''<br />
<pre><br />
my_snd: sound {<br />
compatible = "simple-audio-card";<br />
simple-audio-card,widgets = "Speaker", "Ext Spk";<br />
<br />
simple-audio-card,routing =<br />
"Ext Spk", "BE_OUT";<br />
"Ext Spk", "LOUT",<br />
"Ext Spk", "ROUT";<br />
<br />
/* MAX98390 Amplifier */<br />
simple-audio-card,dai-link@0{<br />
format = "i2s";<br />
bitclock-master = <&cpu_dai3>;<br />
frame-master = <&cpu_dai3>;<br />
mclk-fs = <256>;<br />
cpu_dai3: cpu {<br />
sound-dai = <&ssi3>;<br />
};<br />
<br />
codec_dai3: codec {<br />
sound-dai = <&max98390>;<br />
clocks = <&mclk>;<br />
};<br />
};<br />
<br />
/* MAX9867 Codec */<br />
simple-audio-card,dai-link@1{<br />
format = "i2s";<br />
bitclock-master = <&cpu_dai0>;<br />
frame-master = <&cpu_dai0>;<br />
mclk-fs = <256>;<br />
cpu_dai0: cpu {<br />
sound-dai = <&ssi0>;<br />
};<br />
<br />
codec_dai0: codec {<br />
sound-dai = <&max9867>;<br />
clocks = <&mclk>;<br />
};<br />
};<br />
};<br />
</pre><br />
<br />
<br />
'''I2C node for the Codec and Amp'''<br />
<pre><br />
&i2c2 {<br />
pinctrl-0 = <&i2c2_pins>;<br />
pinctrl-names = "default";<br />
<br />
status = "okay";<br />
clock-frequency = <400000>;<br />
<br />
/* MAX98390 Amplifier */<br />
max98390: codec@3d {<br />
status = "okay";<br />
compatible = "maxim,max98390";<br />
#sound-dai-cells = <0>;<br />
reg = <0x3d>;<br />
};<br />
};<br />
<br />
&i2c3 {<br />
pinctrl-0 = <&i2c3_pins>;<br />
pinctrl-names = "default";<br />
<br />
status = "okay";<br />
clock-frequency = <400000>;<br />
<br />
/* MAX9867 Codec */<br />
max9867: codec@18 {<br />
status = "okay";<br />
compatible = "maxim,max9867";<br />
#sound-dai-cells = <0>;<br />
reg = <0x18>;<br />
};<br />
};<br />
</pre><br />
<br />
<br />
|}<br />
<br />
=Camera=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
<br />
=Ethernet=<br />
<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E, G2L, G2LC, G2UL, V2L:<br />
** rz_linux-cip/drivers/net/ethernet/renesas/ (ravb_main.c, ravb_ptp.c)<br />
** CONFIG_NET_VENDOR_RENESAS=y<br />
** # CONFIG_SH_ETH is not set<br />
** CONFIG_RAVB=y<br />
<br />
'''Notes'''<br />
* The Link Status input pin ('''LINKSTA''') is not used. The driver instead relies on the PHY to inform it that the link is up by using in-band status messages on the RGMII lines.<br />
* Do not forget to set the '''correct voltage levels''' for the pins (3.3v, 1.5v, etc..) in the device tree in the '''pinctrl node'''.<br />
** You use the syntax "power-source = <3300>;" when you declare the pins for Ethernet.<br />
** Refer to the '''pinctrl documentation''' in the kernel for more info.<br />
** Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml<br />
** Documentation/devicetree/bindings/pinctrl/renesas,pcf.yaml<br />
<br />
<br />
'''Device Tree Examples'''<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| Example of enabling MII mode for RZ/G2L &emsp;<br />
|-<br />
|<br />
<br />
'''Ethernet node for MII mode'''<br />
<pre><br />
&eth0 {<br />
pinctrl-0 = <&eth0_mii_pins>;<br />
pinctrl-names = "default";<br />
phy-handle = <&phy0>;<br />
phy-mode = "mii";<br />
status = "okay";<br />
<br />
phy0: ethernet-phy@7 {<br />
compatible = "ethernet-phy-id0022.1640",<br />
"ethernet-phy-ieee802.3-c22";<br />
reg = <7>;<br />
rxc-skew-psec = <2400>;<br />
txc-skew-psec = <2400>;<br />
rxdv-skew-psec = <0>;<br />
txdv-skew-psec = <0>;<br />
rxd0-skew-psec = <0>;<br />
rxd1-skew-psec = <0>;<br />
rxd2-skew-psec = <0>;<br />
rxd3-skew-psec = <0>;<br />
txd0-skew-psec = <0>;<br />
txd1-skew-psec = <0>;<br />
txd2-skew-psec = <0>;<br />
txd3-skew-psec = <0>;<br />
<br />
interrupt-parent = <&pinctrl>;<br />
interrupts = <RZG2L_GPIO(1, 0) IRQ_TYPE_LEVEL_LOW>;<br />
};<br />
};<br />
<br />
&eth1 {<br />
pinctrl-0 = <&eth1_mii_pins>;<br />
pinctrl-names = "default";<br />
phy-handle = <&phy1>;<br />
phy-mode = "mii";<br />
status = "okay";<br />
<br />
phy1: ethernet-phy@7 {<br />
compatible = "ethernet-phy-id0022.1640",<br />
"ethernet-phy-ieee802.3-c22";<br />
reg = <7>;<br />
rxc-skew-psec = <2400>;<br />
txc-skew-psec = <2400>;<br />
rxdv-skew-psec = <0>;<br />
txdv-skew-psec = <0>;<br />
rxd0-skew-psec = <0>;<br />
rxd1-skew-psec = <0>;<br />
rxd2-skew-psec = <0>;<br />
rxd3-skew-psec = <0>;<br />
txd0-skew-psec = <0>;<br />
txd1-skew-psec = <0>;<br />
txd2-skew-psec = <0>;<br />
txd3-skew-psec = <0>;<br />
<br />
interrupt-parent = <&pinctrl>;<br />
interrupts = <RZG2L_GPIO(1, 1) IRQ_TYPE_LEVEL_LOW>;<br />
};<br />
};<br />
</pre><br />
<br />
<br />
'''Pin Setup'''<br />
<br />
<pre><br />
&pinctrl {<br />
<br />
eth0_mii_pins: eth0 {<br />
pinmux = <RZG2L_PORT_PINMUX(28, 1, 1)>, /* ET0_LINKSTA */<br />
<RZG2L_PORT_PINMUX(27, 1, 1)>, /* ET0_MDC */<br />
<RZG2L_PORT_PINMUX(28, 0, 1)>, /* ET0_MDIO */<br />
<RZG2L_PORT_PINMUX(20, 0, 1)>, /* ET0_TXC */<br />
<RZG2L_PORT_PINMUX(20, 1, 1)>, /* ET0_TX_CTL */<br />
<RZG2L_PORT_PINMUX(20, 2, 1)>, /* ET0_TXD0 */<br />
<RZG2L_PORT_PINMUX(21, 0, 1)>, /* ET0_TXD1 */<br />
<RZG2L_PORT_PINMUX(21, 1, 1)>, /* ET0_TXD2 */<br />
<RZG2L_PORT_PINMUX(22, 0, 1)>, /* ET0_TXD3 */<br />
<RZG2L_PORT_PINMUX(22, 1, 1)>, /* ETH0_TX_ERR */<br />
<RZG2L_PORT_PINMUX(23, 0, 1)>, /* ETH0_TX_COL */<br />
<RZG2L_PORT_PINMUX(23, 1, 1)>, /* ETH0_TX_CRS */<br />
<RZG2L_PORT_PINMUX(24, 0, 1)>, /* ET0_RXC */<br />
<RZG2L_PORT_PINMUX(24, 1, 1)>, /* ET0_RX_CTL */<br />
<RZG2L_PORT_PINMUX(25, 0, 1)>, /* ET0_RXD0 */<br />
<RZG2L_PORT_PINMUX(25, 1, 1)>, /* ET0_RXD1 */<br />
<RZG2L_PORT_PINMUX(26, 0, 1)>, /* ET0_RXD2 */<br />
<RZG2L_PORT_PINMUX(26, 1, 1)>, /* ET0_RXD3 */<br />
<RZG2L_PORT_PINMUX(27, 0, 1)>; /* ETH0_RX_ERR */<br />
};<br />
<br />
eth1_mii_pins: eth1 {<br />
pinmux = <RZG2L_PORT_PINMUX(37, 2, 1)>, /* ET1_LINKSTA */<br />
<RZG2L_PORT_PINMUX(37, 0, 1)>, /* ET1_MDC */<br />
<RZG2L_PORT_PINMUX(37, 1, 1)>, /* ET1_MDIO */<br />
<RZG2L_PORT_PINMUX(29, 0, 1)>, /* ET1_TXC */<br />
<RZG2L_PORT_PINMUX(29, 1, 1)>, /* ET1_TX_CTL */<br />
<RZG2L_PORT_PINMUX(30, 0, 1)>, /* ET1_TXD0 */<br />
<RZG2L_PORT_PINMUX(30, 1, 1)>, /* ET1_TXD1 */<br />
<RZG2L_PORT_PINMUX(31, 0, 1)>, /* ET1_TXD2 */<br />
<RZG2L_PORT_PINMUX(31, 1, 1)>, /* ET1_TXD3 */<br />
<RZG2L_PORT_PINMUX(32, 0, 1)>, /* ETH1_TX_ERR */<br />
<RZG2L_PORT_PINMUX(32, 1, 1)>, /* ETH1_TX_COL */<br />
<RZG2L_PORT_PINMUX(33, 0, 1)>, /* ETH1_TX_CRS */<br />
<RZG2L_PORT_PINMUX(33, 1, 1)>, /* ET1_RXC */<br />
<RZG2L_PORT_PINMUX(34, 0, 1)>, /* ET1_RX_CTL */<br />
<RZG2L_PORT_PINMUX(34, 1, 1)>, /* ET1_RXD0 */<br />
<RZG2L_PORT_PINMUX(35, 0, 1)>, /* ET1_RXD1 */<br />
<RZG2L_PORT_PINMUX(35, 1, 1)>, /* ET1_RXD2 */<br />
<RZG2L_PORT_PINMUX(36, 0, 1)>, /* ET1_RXD3 */<br />
<RZG2L_PORT_PINMUX(36, 1, 1)>; /* ETH1_RX_ERR */<br />
};<br />
}; <br />
</pre><br />
<br />
|}<br />
<br />
=USB=<br />
<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=SD Card=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=eMMC=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** driver/mmc/host/'''renesas_sdhi.h'''<br />
** driver/mmc/host/'''renesas_sdhi_core.c'''<br />
** driver/mmc/host/'''renesas_sdhi_internal_dmac.c'''<br />
** driver/mmc/host/'''tmio_mmc.h'''<br />
** driver/mmc/host/'''tmio_mmc_core.c'''<br />
** CONFIG_MMC_SDHI=y<br />
** CONFIG_MMC_SDHI_INTERNAL_DMAC=y (selected automatically by MMC_SDHI)<br />
** CONFIG_MMC_TMIO_CORE=y (selected automatically by MMC_SDHI)<br />
<br />
'''Notes'''<br />
* Combo driver for MMC + SDHI HW<br />
* The core of the SDHI code is using the TMIO (Toshiba Mobile IO) driver because it is the same HW block and they have shared the same driver for many years.<br />
* CONFIG_MMC_SDHI_SYS_DMAC=y is selected automatically by MMC_SDHI, but is only for RZ/G1 series devices.<br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=I2C=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
= SPI =<br />
'''Linux Drivers'''<br />
* MSIOF: RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RSPI: RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
<br />
=QSPI Flash=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
= UART (SCIF) =<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
= UART (SCI) =<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=CAN=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
<br />
=ADC=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=Watchdog Timer(WDT)=<br />
<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** rz_linux-cip/drivers/watchdog/'''renesas_wdt.c'''<br />
** CONFIG_RENESAS_WDT<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** rz_linux-cip/drivers/watchdog/'''rzg2l_wdt.c'''<br />
** CONFIG_RENESAS_RZG2LWDT<br />
<br />
'''Notes'''<br />
* When rebooting the system, the watchdog timer is used. Simply type the command line "reboot" in the console.<br />
* To test a watch dog timeout/reboot, enter this command in the console "cat >> /dev/watchdog", then press ENTER again, then wait 1 minutes, and the board should reboot.<br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=PWM=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
<br />
=Timer=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
= Thermal =<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** drivers/thermal/rcar_gen3__thermal.c<br />
** CONFIG_RCAR_GEN3_THERMAL=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** drivers/thermal/rzg2l_thermal.c<br />
** CONFIG_RZG2L_THERMAL=y<br />
<br />
'''Notes'''<br />
* The Linux driver reads the registers and applies the formula in the hardware manual<br />
* You can read the current value running the command:<br />
** $ cat /sys/class/thermal/thermal_zone0/temp<br />
* The output value is in millicelsius<br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
= PMIC RAA215300 =<br />
'''Linux Drivers'''<br />
** drivers/mfd/raa215300.c<br />
** CONFIG_PMIC_RAA215300=y<br />
** Documentation/devicetree/bindings/mfd/raa215300.txt<br />
<br />
'''Notes'''<br />
* Only supports RTC function<br />
* Added in VLP/G v3.0.1 release (branch rz-5.10-cip13)<br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)</div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_DeviceTree&diff=1665RZ-G/RZG DeviceTree2022-09-22T22:24:50Z<p>Padhikari: </p>
<hr />
<div>__FORCETOC__<br />
{{DISPLAYTITLE:Device Tree}}<br />
← [[RZ-G]]<br />
<br />
* This page contains helpful notes about Device Tree configurations<br />
<br />
= RZ Specific Files =<br />
* Device Tree files for Renesas SoC and evaluation boards are under the directory '''arch/arm64/boot/dts/renesas'''<br />
* Below is the list of Device Tree files used for the Renesas Evaluation boards.<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2H HiHope''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r8a774e1.dtsi || RZ/G2H Device Tree containing all peripherals<br />
|-<br />
| hihope-common.dtsi ||<br />
|-<br />
| hihope-rev2.dtsi ||<br />
|-<br />
| hihope-rev4.dtsi ||<br />
|-<br />
| hihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi ||<br />
|-<br />
| hihope-rzg2-ex-aistarvision-mipi-adapter-2.4.dtsi ||<br />
|-<br />
| hihope-rzg2-ex.dtsi ||<br />
|-<br />
| hihope-rzg2-ex-lvds.dtsi ||<br />
|-<br />
| r8a774e1-hihope-rzg2h.dts ||<br />
|-<br />
| r8a774e1-hihope-rzg2h-ex.dts ||<br />
|-<br />
| r8a774e1-hihope-rzg2h-ex-idk-1110wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774e1-hihope-rzg2h-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774e1-hihope-rzg2h-ex-mipi-2.4.dts ||<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2N HiHope''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r8a774b1.dtsi || RZ/G2N Device Tree containing all peripherals<br />
|-<br />
| r8a774b1-hihope-rzg2n.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-ex.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-ex-idk-1110wr.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-ex-mipi-2.4.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2-ex.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2-ex-mipi-2.4.dts ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2M HiHope''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r8a774a1.dtsi || RZ/G2M Device Tree containing all peripherals<br />
|-<br />
| r8a774a1-hihope-rzg2m.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-ex.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-ex-idk-1110wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-ex-mipi-2.4.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2-ex.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2-ex-mipi-2.4.dts ||<br />
|-<br />
| r8a774a3.dtsi ||<br />
|-<br />
| r8a774a3-hihope-rzg2m.dts ||<br />
|-<br />
| r8a774a3-hihope-rzg2m-ex.dts ||<br />
|-<br />
| r8a774a3-hihope-rzg2m-ex-idk-1110wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774a3-hihope-rzg2m-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774a3-hihope-rzg2m-ex-mipi-2.4.dts ||<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2E EK874''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r8a774c0.dtsi || RZ/G2E Device Tree containing all peripherals<br />
|-<br />
| r8a774c0-cat874.dts ||<br />
|-<br />
| r8a774c0-cat874-revc.dts ||<br />
|-<br />
| r8a774c0-ek874.dts ||<br />
|-<br />
| r8a774c0-ek874-idk-2121wr.dts ||<br />
|-<br />
| r8a774c0-ek874-mipi-2.1.dts ||<br />
|-<br />
| r8a774c0-ek874-mipi-2.4.dts ||<br />
|-<br />
| r8a774c0-ek874-revc.dts ||<br />
|-<br />
| r8a774c0-ek874-revc-idk-2121wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774c0-ek874-revc-mipi-2.1.dts ||<br />
|-<br />
| r8a774c0-ek874-revc-mipi-2.4.dts ||<br />
|-<br />
| r8a774c0-es10-cat874.dts ||<br />
|-<br />
| r8a774c0-es10.dtsi ||<br />
|-<br />
| r8a774c0-es10-ek874.dts ||<br />
|-<br />
| r8a774c0-es10-ek874-idk-2121wr.dts ||<br />
|-<br />
| r8a774c0-es10-ek874-mipi-2.1.dts ||<br />
|-<br />
| r8a774c0-es10-ek874-mipi-2.4.dts ||<br />
|-<br />
| cat874-common.dtsi ||<br />
|-<br />
| cat875.dtsi ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2L SMARC''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r9a07g044.dtsi || RZ/G2L family SoC common parts<br />
|-<br />
| r9a07g044l.dtsi || Specific to RZ/G2L (R9A07G044L) SoC<br />
|-<br />
| r9a07g044l1.dtsi || Specific to RZ/G2L (R9A07G044L single cortex A55) SoC <br />
|-<br />
| r9a07g044l2.dtsi || Specific to RZ/G2L (R9A07G044L dual cortex A55) SoC<br />
|-<br />
| rz-smarc-common.dtsi ||<br />
|-<br />
| rzg2l-smarc.dtsi ||<br />
|-<br />
| rzg2l-smarc-pinfunction.dtsi ||<br />
|-<br />
| rzg2l-smarc-som.dtsi ||<br />
|-<br />
| r9a07g044l2-smarc.dts ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2LC SMARC''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r9a07g044c1.dtsi || RZ/G2LC Device Tree containing all peripherals<br />
|-<br />
| r9a07g044c2.dtsi || RZ/G2LC Device Tree containing all peripherals<br />
|-<br />
| r9a07g044c2-smarc.dts ||<br />
|-<br />
| rzg2lc-smarc.dtsi ||<br />
|-<br />
| rzg2lc-smarc-pinfunction.dtsi ||<br />
|-<br />
| rzg2lc-smarc-som.dtsi ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2UL SMARC''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| rzg2ul-smarc.dtsi ||<br />
|-<br />
| r9a07g043.dtsi || RZ/G2UL Device Tree containing all peripherals<br />
|-<br />
| r9a07g043u11.dtsi ||<br />
|-<br />
| r9a07g043u11-smarc.dts ||<br />
|-<br />
| r9a07g043u12.dtsi ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/V2L SMARC''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r9a07g054.dtsi || RZ/V2L Device Tree containing all peripherals<br />
|-<br />
| r9a07g054l1.dtsi ||<br />
|-<br />
| r9a07g054l2-dev.dts ||<br />
|-<br />
| r9a07g054l2.dtsi ||<br />
|-<br />
| r9a07g054l2-smarc.dts ||<br />
|-<br />
|}<br />
<br />
Internal Renesas boards<br />
* r9a07g044l2-dev.dts<br />
* rzg2l-smarc-dev.dtsi<br />
<br />
=Device Tree Syntax=<br />
<br />
=Top Level (root node)=<br />
<br />
==Compatible for the SoC==<br />
* The .dtsi file for each SoC will have a "compatible" string to specify that SoC it is. If you decide to make your own top level compatible, make sure you include the original SoC string. The reason is that some drivers (the VSP driver for example) look for that SoC string to know what SoC they are running on. If it is missing, it will not load or run correctly.<br />
Here is a correct example of a .dts file for a RZ/G2L board. Notice how "renesas,r9a07g044" is at the end of the line.<br />
<pre><br />
/ {<br />
model = "My Really Cool RZ/G2L Board";<br />
compatible = "my-rzg2l-board" , "renesas,r9a07g044";<br />
<br />
chosen {<br />
bootargs = "ignore_loglevel rw root=/dev/mmc0blk1";<br />
stdout-path = "serial0:115200n8";<br />
};<br />
<br />
};<br />
</pre><br />
<br />
=Pin Control (pin mux)=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** drivers/pinctrl/renesas/*<br />
** CONFIG_xxx=y<br />
** Documentation/devicetree/bindings/pinctrl/renesas,pcf.yaml<br />
<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** drivers/pinctrl/renesas/pfc-rzg2l.c<br />
** CONFIG_xxx=y<br />
** Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
<br />
=Display=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=Audio=<br />
<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E: rz_linux-cip/sound/soc/sh/'''rcar/*.c'''<br />
* RZ/G2L, G2LC, G2UL, V2L: rz_linux-cip/sound/soc/sh/'''rz-ssi.c'''<br />
<br />
'''Device Tree Examples'''<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| Example of MAX9867 codec with MAX98390 Amplifier for RZ/G2L &emsp;<br />
|-<br />
|<br />
Here is an example of a MAX9867 on SSI channel 3, using I2C-3. MAX98390 Amplifier on I2C-2.<br />
<br />
This is for the Linux-5.10 kernel. For the older Linux-4.19 kernel, there are some differences.<br />
<br />
'''Pin Setup'''<br />
<pre><br />
&pinctrl {<br />
<br />
/* MAX98390 Amplifier */<br />
i2c2_pins: i2c2 {<br />
pinmux = <RZG2L_PORT_PINMUX(42, 3, 1)>, /* SDA */<br />
<RZG2L_PORT_PINMUX(42, 4, 1)>; /* SCL */<br />
};<br />
<br />
/* MAX9867 Codec */<br />
i2c3_pins: i2c3 {<br />
pinmux = <RZG2L_PORT_PINMUX(18, 0, 3)>, /* SDA */<br />
<RZG2L_PORT_PINMUX(18, 1, 3)>; /* SCL */<br />
};<br />
<br />
ssi3_pins: ssi3 {<br />
pinmux = <RZG2L_PORT_PINMUX(31, 0, 5)>, /* BCK */<br />
<RZG2L_PORT_PINMUX(31, 1, 5)>, /* RCK */<br />
<RZG2L_PORT_PINMUX(32, 0, 5)>, /* TXD */<br />
<RZG2L_PORT_PINMUX(32, 1, 5)>; /* RXD */<br />
};<br />
};<br />
</pre><br />
<br />
'''Enable SSI channel'''<br />
<pre><br />
&ssi3 {<br />
pinctrl-0 = <&ssi3_pins>;<br />
pinctrl-names = "default";<br />
<br />
#sound-dai-cells = <1>;<br />
status = "okay";<br />
};<br />
</pre><br />
<br />
'''Create a node for the MAX9867'''<br />
<pre><br />
my_snd: sound {<br />
compatible = "simple-audio-card";<br />
simple-audio-card,widgets = "Speaker", "Ext Spk";<br />
<br />
simple-audio-card,routing =<br />
"Ext Spk", "BE_OUT";<br />
"Ext Spk", "LOUT",<br />
"Ext Spk", "ROUT";<br />
<br />
/* MAX98390 Amplifier */<br />
simple-audio-card,dai-link@0{<br />
format = "i2s";<br />
bitclock-master = <&cpu_dai3>;<br />
frame-master = <&cpu_dai3>;<br />
mclk-fs = <256>;<br />
cpu_dai3: cpu {<br />
sound-dai = <&ssi3>;<br />
};<br />
<br />
codec_dai3: codec {<br />
sound-dai = <&max98390>;<br />
clocks = <&mclk>;<br />
};<br />
};<br />
<br />
/* MAX9867 Codec */<br />
simple-audio-card,dai-link@1{<br />
format = "i2s";<br />
bitclock-master = <&cpu_dai0>;<br />
frame-master = <&cpu_dai0>;<br />
mclk-fs = <256>;<br />
cpu_dai0: cpu {<br />
sound-dai = <&ssi0>;<br />
};<br />
<br />
codec_dai0: codec {<br />
sound-dai = <&max9867>;<br />
clocks = <&mclk>;<br />
};<br />
};<br />
};<br />
</pre><br />
<br />
<br />
'''I2C node for the Codec and Amp'''<br />
<pre><br />
&i2c2 {<br />
pinctrl-0 = <&i2c2_pins>;<br />
pinctrl-names = "default";<br />
<br />
status = "okay";<br />
clock-frequency = <400000>;<br />
<br />
/* MAX98390 Amplifier */<br />
max98390: codec@3d {<br />
status = "okay";<br />
compatible = "maxim,max98390";<br />
#sound-dai-cells = <0>;<br />
reg = <0x3d>;<br />
};<br />
};<br />
<br />
&i2c3 {<br />
pinctrl-0 = <&i2c3_pins>;<br />
pinctrl-names = "default";<br />
<br />
status = "okay";<br />
clock-frequency = <400000>;<br />
<br />
/* MAX9867 Codec */<br />
max9867: codec@18 {<br />
status = "okay";<br />
compatible = "maxim,max9867";<br />
#sound-dai-cells = <0>;<br />
reg = <0x18>;<br />
};<br />
};<br />
</pre><br />
<br />
<br />
|}<br />
<br />
=Camera=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
<br />
=Ethernet=<br />
<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E, G2L, G2LC, G2UL, V2L:<br />
** rz_linux-cip/drivers/net/ethernet/renesas/ (ravb_main.c, ravb_ptp.c)<br />
** CONFIG_NET_VENDOR_RENESAS=y<br />
** # CONFIG_SH_ETH is not set<br />
** CONFIG_RAVB=y<br />
<br />
'''Notes'''<br />
* The Link Status input pin ('''LINKSTA''') is not used. The driver instead relies on the PHY to inform it that the link is up by using in-band status messages on the RGMII lines.<br />
* Do not forget to set the '''correct voltage levels''' for the pins (3.3v, 1.5v, etc..) in the device tree in the '''pinctrl node'''.<br />
** You use the syntax "power-source = <3300>;" when you declare the pins for Ethernet.<br />
** Refer to the '''pinctrl documentation''' in the kernel for more info.<br />
** Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml<br />
** Documentation/devicetree/bindings/pinctrl/renesas,pcf.yaml<br />
<br />
<br />
'''Device Tree Examples'''<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| Example of enabling MII mode for RZ/G2L &emsp;<br />
|-<br />
|<br />
<br />
'''Ethernet node for MII mode'''<br />
<pre><br />
&eth0 {<br />
pinctrl-0 = <&eth0_mii_pins>;<br />
pinctrl-names = "default";<br />
phy-handle = <&phy0>;<br />
phy-mode = "mii";<br />
status = "okay";<br />
<br />
phy0: ethernet-phy@7 {<br />
compatible = "ethernet-phy-id0022.1640",<br />
"ethernet-phy-ieee802.3-c22";<br />
reg = <7>;<br />
rxc-skew-psec = <2400>;<br />
txc-skew-psec = <2400>;<br />
rxdv-skew-psec = <0>;<br />
txdv-skew-psec = <0>;<br />
rxd0-skew-psec = <0>;<br />
rxd1-skew-psec = <0>;<br />
rxd2-skew-psec = <0>;<br />
rxd3-skew-psec = <0>;<br />
txd0-skew-psec = <0>;<br />
txd1-skew-psec = <0>;<br />
txd2-skew-psec = <0>;<br />
txd3-skew-psec = <0>;<br />
<br />
interrupt-parent = <&pinctrl>;<br />
interrupts = <RZG2L_GPIO(1, 0) IRQ_TYPE_LEVEL_LOW>;<br />
};<br />
};<br />
<br />
&eth1 {<br />
pinctrl-0 = <&eth1_mii_pins>;<br />
pinctrl-names = "default";<br />
phy-handle = <&phy1>;<br />
phy-mode = "mii";<br />
status = "okay";<br />
<br />
phy1: ethernet-phy@7 {<br />
compatible = "ethernet-phy-id0022.1640",<br />
"ethernet-phy-ieee802.3-c22";<br />
reg = <7>;<br />
rxc-skew-psec = <2400>;<br />
txc-skew-psec = <2400>;<br />
rxdv-skew-psec = <0>;<br />
txdv-skew-psec = <0>;<br />
rxd0-skew-psec = <0>;<br />
rxd1-skew-psec = <0>;<br />
rxd2-skew-psec = <0>;<br />
rxd3-skew-psec = <0>;<br />
txd0-skew-psec = <0>;<br />
txd1-skew-psec = <0>;<br />
txd2-skew-psec = <0>;<br />
txd3-skew-psec = <0>;<br />
<br />
interrupt-parent = <&pinctrl>;<br />
interrupts = <RZG2L_GPIO(1, 1) IRQ_TYPE_LEVEL_LOW>;<br />
};<br />
};<br />
</pre><br />
<br />
<br />
'''Pin Setup'''<br />
<br />
<pre><br />
&pinctrl {<br />
<br />
eth0_mii_pins: eth0 {<br />
pinmux = <RZG2L_PORT_PINMUX(28, 1, 1)>, /* ET0_LINKSTA */<br />
<RZG2L_PORT_PINMUX(27, 1, 1)>, /* ET0_MDC */<br />
<RZG2L_PORT_PINMUX(28, 0, 1)>, /* ET0_MDIO */<br />
<RZG2L_PORT_PINMUX(20, 0, 1)>, /* ET0_TXC */<br />
<RZG2L_PORT_PINMUX(20, 1, 1)>, /* ET0_TX_CTL */<br />
<RZG2L_PORT_PINMUX(20, 2, 1)>, /* ET0_TXD0 */<br />
<RZG2L_PORT_PINMUX(21, 0, 1)>, /* ET0_TXD1 */<br />
<RZG2L_PORT_PINMUX(21, 1, 1)>, /* ET0_TXD2 */<br />
<RZG2L_PORT_PINMUX(22, 0, 1)>, /* ET0_TXD3 */<br />
<RZG2L_PORT_PINMUX(22, 1, 1)>, /* ETH0_TX_ERR */<br />
<RZG2L_PORT_PINMUX(23, 0, 1)>, /* ETH0_TX_COL */<br />
<RZG2L_PORT_PINMUX(23, 1, 1)>, /* ETH0_TX_CRS */<br />
<RZG2L_PORT_PINMUX(24, 0, 1)>, /* ET0_RXC */<br />
<RZG2L_PORT_PINMUX(24, 1, 1)>, /* ET0_RX_CTL */<br />
<RZG2L_PORT_PINMUX(25, 0, 1)>, /* ET0_RXD0 */<br />
<RZG2L_PORT_PINMUX(25, 1, 1)>, /* ET0_RXD1 */<br />
<RZG2L_PORT_PINMUX(26, 0, 1)>, /* ET0_RXD2 */<br />
<RZG2L_PORT_PINMUX(26, 1, 1)>, /* ET0_RXD3 */<br />
<RZG2L_PORT_PINMUX(27, 0, 1)>; /* ETH0_RX_ERR */<br />
};<br />
<br />
eth1_mii_pins: eth1 {<br />
pinmux = <RZG2L_PORT_PINMUX(37, 2, 1)>, /* ET1_LINKSTA */<br />
<RZG2L_PORT_PINMUX(37, 0, 1)>, /* ET1_MDC */<br />
<RZG2L_PORT_PINMUX(37, 1, 1)>, /* ET1_MDIO */<br />
<RZG2L_PORT_PINMUX(29, 0, 1)>, /* ET1_TXC */<br />
<RZG2L_PORT_PINMUX(29, 1, 1)>, /* ET1_TX_CTL */<br />
<RZG2L_PORT_PINMUX(30, 0, 1)>, /* ET1_TXD0 */<br />
<RZG2L_PORT_PINMUX(30, 1, 1)>, /* ET1_TXD1 */<br />
<RZG2L_PORT_PINMUX(31, 0, 1)>, /* ET1_TXD2 */<br />
<RZG2L_PORT_PINMUX(31, 1, 1)>, /* ET1_TXD3 */<br />
<RZG2L_PORT_PINMUX(32, 0, 1)>, /* ETH1_TX_ERR */<br />
<RZG2L_PORT_PINMUX(32, 1, 1)>, /* ETH1_TX_COL */<br />
<RZG2L_PORT_PINMUX(33, 0, 1)>, /* ETH1_TX_CRS */<br />
<RZG2L_PORT_PINMUX(33, 1, 1)>, /* ET1_RXC */<br />
<RZG2L_PORT_PINMUX(34, 0, 1)>, /* ET1_RX_CTL */<br />
<RZG2L_PORT_PINMUX(34, 1, 1)>, /* ET1_RXD0 */<br />
<RZG2L_PORT_PINMUX(35, 0, 1)>, /* ET1_RXD1 */<br />
<RZG2L_PORT_PINMUX(35, 1, 1)>, /* ET1_RXD2 */<br />
<RZG2L_PORT_PINMUX(36, 0, 1)>, /* ET1_RXD3 */<br />
<RZG2L_PORT_PINMUX(36, 1, 1)>; /* ETH1_RX_ERR */<br />
};<br />
}; <br />
</pre><br />
<br />
|}<br />
<br />
=USB=<br />
<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=SD Card=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=eMMC=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=I2C=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=SPI=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=QSPI Flash=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=UART=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=CAN=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
<br />
=ADC=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=Watchdog Timer(WDT)=<br />
<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** rz_linux-cip/drivers/watchdog/'''renesas_wdt.c'''<br />
** CONFIG_RENESAS_WDT<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** rz_linux-cip/drivers/watchdog/'''rzg2l_wdt.c'''<br />
** CONFIG_RENESAS_RZG2LWDT<br />
<br />
'''Notes'''<br />
* When rebooting the system, the watchdog timer is used. Simply type the command line "reboot" in the console.<br />
* To test a watch dog timeout/reboot, enter this command in the console "cat >> /dev/watchdog", then press ENTER again, then wait 1 minutes, and the board should reboot.<br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=PWM=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
<br />
=Timer=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
= Thermal =<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** drivers/thermal/rcar_gen3__thermal.c<br />
** CONFIG_RCAR_GEN3_THERMAL=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** drivers/thermal/rzg2l_thermal.c<br />
** CONFIG_RZG2L_THERMAL=y<br />
<br />
'''Notes'''<br />
* The Linux driver reads the registers and applies the formula in the hardware manual<br />
* You can read the current value running the command:<br />
** $ cat /sys/class/thermal/thermal_zone0/temp<br />
* The output value is in millicelsius<br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)</div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_DeviceTree&diff=1664RZ-G/RZG DeviceTree2022-09-22T22:23:03Z<p>Padhikari: </p>
<hr />
<div>__FORCETOC__<br />
{{DISPLAYTITLE:Device Tree}}<br />
← [[RZ-G]]<br />
<br />
* This page contains helpful notes about Device Tree configurations<br />
<br />
= RZ Specific Files =<br />
* Device Tree files for Renesas SoC and evaluation boards are under the directory '''arch/arm64/boot/dts/renesas'''<br />
* Below is the list of Device Tree files used for the Renesas Evaluation boards.<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2H HiHope''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r8a774e1.dtsi || RZ/G2H Device Tree containing all peripherals<br />
|-<br />
| hihope-common.dtsi ||<br />
|-<br />
| hihope-rev2.dtsi ||<br />
|-<br />
| hihope-rev4.dtsi ||<br />
|-<br />
| hihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi ||<br />
|-<br />
| hihope-rzg2-ex-aistarvision-mipi-adapter-2.4.dtsi ||<br />
|-<br />
| hihope-rzg2-ex.dtsi ||<br />
|-<br />
| hihope-rzg2-ex-lvds.dtsi ||<br />
|-<br />
| r8a774e1-hihope-rzg2h.dts ||<br />
|-<br />
| r8a774e1-hihope-rzg2h-ex.dts ||<br />
|-<br />
| r8a774e1-hihope-rzg2h-ex-idk-1110wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774e1-hihope-rzg2h-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774e1-hihope-rzg2h-ex-mipi-2.4.dts ||<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2N HiHope''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r8a774b1.dtsi || RZ/G2N Device Tree containing all peripherals<br />
|-<br />
| r8a774b1-hihope-rzg2n.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-ex.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-ex-idk-1110wr.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-ex-mipi-2.4.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2-ex.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774b1-hihope-rzg2n-rev2-ex-mipi-2.4.dts ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2M HiHope''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r8a774a1.dtsi || RZ/G2M Device Tree containing all peripherals<br />
|-<br />
| r8a774a1-hihope-rzg2m.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-ex.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-ex-idk-1110wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-ex-mipi-2.4.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2-ex.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774a1-hihope-rzg2m-rev2-ex-mipi-2.4.dts ||<br />
|-<br />
| r8a774a3.dtsi ||<br />
|-<br />
| r8a774a3-hihope-rzg2m.dts ||<br />
|-<br />
| r8a774a3-hihope-rzg2m-ex.dts ||<br />
|-<br />
| r8a774a3-hihope-rzg2m-ex-idk-1110wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774a3-hihope-rzg2m-ex-mipi-2.1.dts ||<br />
|-<br />
| r8a774a3-hihope-rzg2m-ex-mipi-2.4.dts ||<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2E EK874''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r8a774c0.dtsi || RZ/G2E Device Tree containing all peripherals<br />
|-<br />
| r8a774c0-cat874.dts ||<br />
|-<br />
| r8a774c0-cat874-revc.dts ||<br />
|-<br />
| r8a774c0-ek874.dts ||<br />
|-<br />
| r8a774c0-ek874-idk-2121wr.dts ||<br />
|-<br />
| r8a774c0-ek874-mipi-2.1.dts ||<br />
|-<br />
| r8a774c0-ek874-mipi-2.4.dts ||<br />
|-<br />
| r8a774c0-ek874-revc.dts ||<br />
|-<br />
| r8a774c0-ek874-revc-idk-2121wr.dts ||<br />
|-<br />
| rzg2-advantech-idk-1110wr-panel.dtsi ||<br />
|-<br />
| r8a774c0-ek874-revc-mipi-2.1.dts ||<br />
|-<br />
| r8a774c0-ek874-revc-mipi-2.4.dts ||<br />
|-<br />
| r8a774c0-es10-cat874.dts ||<br />
|-<br />
| r8a774c0-es10.dtsi ||<br />
|-<br />
| r8a774c0-es10-ek874.dts ||<br />
|-<br />
| r8a774c0-es10-ek874-idk-2121wr.dts ||<br />
|-<br />
| r8a774c0-es10-ek874-mipi-2.1.dts ||<br />
|-<br />
| r8a774c0-es10-ek874-mipi-2.4.dts ||<br />
|-<br />
| cat874-common.dtsi ||<br />
|-<br />
| cat875.dtsi ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2L SMARC''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r9a07g044.dtsi || RZ/G2L family SoC common parts<br />
|-<br />
| r9a07g044l.dtsi || Specific to RZ/G2L (R9A07G044L) SoC<br />
|-<br />
| r9a07g044l1.dtsi || Specific to RZ/G2L (R9A07G044L single cortex A55) SoC <br />
|-<br />
| r9a07g044l2.dtsi || Specific to RZ/G2L (R9A07G044L dual cortex A55) SoC<br />
|-<br />
| rz-smarc-common.dtsi ||<br />
|-<br />
| rzg2l-smarc.dtsi ||<br />
|-<br />
| rzg2l-smarc-pinfunction.dtsi ||<br />
|-<br />
| rzg2l-smarc-som.dtsi ||<br />
|-<br />
| r9a07g044l2-smarc.dts ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2LC SMARC''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r9a07g044c1.dtsi || RZ/G2LC Device Tree containing all peripherals<br />
|-<br />
| r9a07g044c2.dtsi || RZ/G2LC Device Tree containing all peripherals<br />
|-<br />
| r9a07g044c2-smarc.dts ||<br />
|-<br />
| rzg2lc-smarc.dtsi ||<br />
|-<br />
| rzg2lc-smarc-pinfunction.dtsi ||<br />
|-<br />
| rzg2lc-smarc-som.dtsi ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/G2UL SMARC''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| rzg2ul-smarc.dtsi ||<br />
|-<br />
| r9a07g043.dtsi || RZ/G2UL Device Tree containing all peripherals<br />
|-<br />
| r9a07g043u11.dtsi ||<br />
|-<br />
| r9a07g043u11-smarc.dts ||<br />
|-<br />
| r9a07g043u12.dtsi ||<br />
|-<br />
|}<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| '''RZ/V2L SMARC''' &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &nbsp;<br />
|-<br />
! File !! Description<br />
|-<br />
| r9a07g054.dtsi || RZ/V2L Device Tree containing all peripherals<br />
|-<br />
| r9a07g054l1.dtsi ||<br />
|-<br />
| r9a07g054l2-dev.dts ||<br />
|-<br />
| r9a07g054l2.dtsi ||<br />
|-<br />
| r9a07g054l2-smarc.dts ||<br />
|-<br />
|}<br />
<br />
Internal Renesas boards<br />
* r9a07g044l2-dev.dts<br />
* rzg2l-smarc-dev.dtsi<br />
<br />
=Device Tree Syntax=<br />
<br />
=Top Level (root node)=<br />
<br />
==Compatible for the SoC==<br />
* The .dtsi file for each SoC will have a "compatible" string to specify that SoC it is. If you decide to make your own top level compatible, make sure you include the original SoC string. The reason is that some drivers (the VSP driver for example) look for that SoC string to know what SoC they are running on. If it is missing, it will not load or run correctly.<br />
Here is a correct example of a .dts file for a RZ/G2L board. Notice how "renesas,r9a07g044" is at the end of the line.<br />
<pre><br />
/ {<br />
model = "My Really Cool RZ/G2L Board";<br />
compatible = "my-rzg2l-board" , "renesas,r9a07g044";<br />
<br />
chosen {<br />
bootargs = "ignore_loglevel rw root=/dev/mmc0blk1";<br />
stdout-path = "serial0:115200n8";<br />
};<br />
<br />
};<br />
</pre><br />
<br />
=Pin Control (pin mux)=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** drivers/pinctrl/renesas/*<br />
** CONFIG_xxx=y<br />
** Documentation/devicetree/bindings/pinctrl/renesas,pcf.yaml<br />
<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** drivers/pinctrl/renesas/pfc-rzg2l.c<br />
** CONFIG_xxx=y<br />
** Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
<br />
=Display=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=Audio=<br />
<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E: rz_linux-cip/sound/soc/sh/'''rcar/*.c'''<br />
* RZ/G2L, G2LC, G2UL, V2L: rz_linux-cip/sound/soc/sh/'''rz-ssi.c'''<br />
<br />
'''Device Tree Examples'''<br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| Example of MAX9867 codec with MAX98390 Amplifier for RZ/G2L &emsp;<br />
|-<br />
|<br />
Here is an example of a MAX9867 on SSI channel 3, using I2C-3. MAX98390 Amplifier on I2C-2.<br />
<br />
This is for the Linux-5.10 kernel. For the older Linux-4.19 kernel, there are some differences.<br />
<br />
'''Pin Setup'''<br />
<pre><br />
&pinctrl {<br />
<br />
/* MAX98390 Amplifier */<br />
i2c2_pins: i2c2 {<br />
pinmux = <RZG2L_PORT_PINMUX(42, 3, 1)>, /* SDA */<br />
<RZG2L_PORT_PINMUX(42, 4, 1)>; /* SCL */<br />
};<br />
<br />
/* MAX9867 Codec */<br />
i2c3_pins: i2c3 {<br />
pinmux = <RZG2L_PORT_PINMUX(18, 0, 3)>, /* SDA */<br />
<RZG2L_PORT_PINMUX(18, 1, 3)>; /* SCL */<br />
};<br />
<br />
ssi3_pins: ssi3 {<br />
pinmux = <RZG2L_PORT_PINMUX(31, 0, 5)>, /* BCK */<br />
<RZG2L_PORT_PINMUX(31, 1, 5)>, /* RCK */<br />
<RZG2L_PORT_PINMUX(32, 0, 5)>, /* TXD */<br />
<RZG2L_PORT_PINMUX(32, 1, 5)>; /* RXD */<br />
};<br />
};<br />
</pre><br />
<br />
'''Enable SSI channel'''<br />
<pre><br />
&ssi3 {<br />
pinctrl-0 = <&ssi3_pins>;<br />
pinctrl-names = "default";<br />
<br />
#sound-dai-cells = <1>;<br />
status = "okay";<br />
};<br />
</pre><br />
<br />
'''Create a node for the MAX9867'''<br />
<pre><br />
my_snd: sound {<br />
compatible = "simple-audio-card";<br />
simple-audio-card,widgets = "Speaker", "Ext Spk";<br />
<br />
simple-audio-card,routing =<br />
"Ext Spk", "BE_OUT";<br />
"Ext Spk", "LOUT",<br />
"Ext Spk", "ROUT";<br />
<br />
/* MAX98390 Amplifier */<br />
simple-audio-card,dai-link@0{<br />
format = "i2s";<br />
bitclock-master = <&cpu_dai3>;<br />
frame-master = <&cpu_dai3>;<br />
mclk-fs = <256>;<br />
cpu_dai3: cpu {<br />
sound-dai = <&ssi3>;<br />
};<br />
<br />
codec_dai3: codec {<br />
sound-dai = <&max98390>;<br />
clocks = <&mclk>;<br />
};<br />
};<br />
<br />
/* MAX9867 Codec */<br />
simple-audio-card,dai-link@1{<br />
format = "i2s";<br />
bitclock-master = <&cpu_dai0>;<br />
frame-master = <&cpu_dai0>;<br />
mclk-fs = <256>;<br />
cpu_dai0: cpu {<br />
sound-dai = <&ssi0>;<br />
};<br />
<br />
codec_dai0: codec {<br />
sound-dai = <&max9867>;<br />
clocks = <&mclk>;<br />
};<br />
};<br />
};<br />
</pre><br />
<br />
<br />
'''I2C node for the Codec and Amp'''<br />
<pre><br />
&i2c2 {<br />
pinctrl-0 = <&i2c2_pins>;<br />
pinctrl-names = "default";<br />
<br />
status = "okay";<br />
clock-frequency = <400000>;<br />
<br />
/* MAX98390 Amplifier */<br />
max98390: codec@3d {<br />
status = "okay";<br />
compatible = "maxim,max98390";<br />
#sound-dai-cells = <0>;<br />
reg = <0x3d>;<br />
};<br />
};<br />
<br />
&i2c3 {<br />
pinctrl-0 = <&i2c3_pins>;<br />
pinctrl-names = "default";<br />
<br />
status = "okay";<br />
clock-frequency = <400000>;<br />
<br />
/* MAX9867 Codec */<br />
max9867: codec@18 {<br />
status = "okay";<br />
compatible = "maxim,max9867";<br />
#sound-dai-cells = <0>;<br />
reg = <0x18>;<br />
};<br />
};<br />
</pre><br />
<br />
<br />
|}<br />
<br />
=Camera=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
<br />
=Ethernet=<br />
<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E, G2L, G2LC, G2UL, V2L:<br />
** rz_linux-cip/drivers/net/ethernet/renesas/ (ravb_main.c, ravb_ptp.c)<br />
** CONFIG_NET_VENDOR_RENESAS=y<br />
** # CONFIG_SH_ETH is not set<br />
** CONFIG_RAVB=y<br />
<br />
'''Notes'''<br />
* The Link Status input pin ('''LINKSTA''') is not used. The driver instead relies on the PHY to inform it that the link is up by using in-band status messages on the RGMII lines.<br />
* Do not forget to set the '''correct voltage levels''' for the pins (3.3v, 1.5v, etc..) in the device tree in the '''pinctrl node'''.<br />
** You use the syntax "power-source = <3300>;" when you declare the pins for Ethernet.<br />
** Refer to the '''pinctrl documentation''' in the kernel for more info.<br />
** Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml<br />
** Documentation/devicetree/bindings/pinctrl/renesas,pcf.yaml<br />
<br />
<br />
'''Device Tree Examples'''<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| Example of enabling MII mode for RZ/G2L &emsp;<br />
|-<br />
|<br />
<br />
'''Ethernet node for MII mode'''<br />
<pre><br />
&eth0 {<br />
pinctrl-0 = <&eth0_mii_pins>;<br />
pinctrl-names = "default";<br />
phy-handle = <&phy0>;<br />
phy-mode = "mii";<br />
status = "okay";<br />
<br />
phy0: ethernet-phy@7 {<br />
compatible = "ethernet-phy-id0022.1640",<br />
"ethernet-phy-ieee802.3-c22";<br />
reg = <7>;<br />
rxc-skew-psec = <2400>;<br />
txc-skew-psec = <2400>;<br />
rxdv-skew-psec = <0>;<br />
txdv-skew-psec = <0>;<br />
rxd0-skew-psec = <0>;<br />
rxd1-skew-psec = <0>;<br />
rxd2-skew-psec = <0>;<br />
rxd3-skew-psec = <0>;<br />
txd0-skew-psec = <0>;<br />
txd1-skew-psec = <0>;<br />
txd2-skew-psec = <0>;<br />
txd3-skew-psec = <0>;<br />
<br />
interrupt-parent = <&pinctrl>;<br />
interrupts = <RZG2L_GPIO(1, 0) IRQ_TYPE_LEVEL_LOW>;<br />
};<br />
};<br />
<br />
&eth1 {<br />
pinctrl-0 = <&eth1_mii_pins>;<br />
pinctrl-names = "default";<br />
phy-handle = <&phy1>;<br />
phy-mode = "mii";<br />
status = "okay";<br />
<br />
phy1: ethernet-phy@7 {<br />
compatible = "ethernet-phy-id0022.1640",<br />
"ethernet-phy-ieee802.3-c22";<br />
reg = <7>;<br />
rxc-skew-psec = <2400>;<br />
txc-skew-psec = <2400>;<br />
rxdv-skew-psec = <0>;<br />
txdv-skew-psec = <0>;<br />
rxd0-skew-psec = <0>;<br />
rxd1-skew-psec = <0>;<br />
rxd2-skew-psec = <0>;<br />
rxd3-skew-psec = <0>;<br />
txd0-skew-psec = <0>;<br />
txd1-skew-psec = <0>;<br />
txd2-skew-psec = <0>;<br />
txd3-skew-psec = <0>;<br />
<br />
interrupt-parent = <&pinctrl>;<br />
interrupts = <RZG2L_GPIO(1, 1) IRQ_TYPE_LEVEL_LOW>;<br />
};<br />
};<br />
</pre><br />
<br />
<br />
'''Pin Setup'''<br />
<br />
<pre><br />
&pinctrl {<br />
<br />
eth0_mii_pins: eth0 {<br />
pinmux = <RZG2L_PORT_PINMUX(28, 1, 1)>, /* ET0_LINKSTA */<br />
<RZG2L_PORT_PINMUX(27, 1, 1)>, /* ET0_MDC */<br />
<RZG2L_PORT_PINMUX(28, 0, 1)>, /* ET0_MDIO */<br />
<RZG2L_PORT_PINMUX(20, 0, 1)>, /* ET0_TXC */<br />
<RZG2L_PORT_PINMUX(20, 1, 1)>, /* ET0_TX_CTL */<br />
<RZG2L_PORT_PINMUX(20, 2, 1)>, /* ET0_TXD0 */<br />
<RZG2L_PORT_PINMUX(21, 0, 1)>, /* ET0_TXD1 */<br />
<RZG2L_PORT_PINMUX(21, 1, 1)>, /* ET0_TXD2 */<br />
<RZG2L_PORT_PINMUX(22, 0, 1)>, /* ET0_TXD3 */<br />
<RZG2L_PORT_PINMUX(22, 1, 1)>, /* ETH0_TX_ERR */<br />
<RZG2L_PORT_PINMUX(23, 0, 1)>, /* ETH0_TX_COL */<br />
<RZG2L_PORT_PINMUX(23, 1, 1)>, /* ETH0_TX_CRS */<br />
<RZG2L_PORT_PINMUX(24, 0, 1)>, /* ET0_RXC */<br />
<RZG2L_PORT_PINMUX(24, 1, 1)>, /* ET0_RX_CTL */<br />
<RZG2L_PORT_PINMUX(25, 0, 1)>, /* ET0_RXD0 */<br />
<RZG2L_PORT_PINMUX(25, 1, 1)>, /* ET0_RXD1 */<br />
<RZG2L_PORT_PINMUX(26, 0, 1)>, /* ET0_RXD2 */<br />
<RZG2L_PORT_PINMUX(26, 1, 1)>, /* ET0_RXD3 */<br />
<RZG2L_PORT_PINMUX(27, 0, 1)>; /* ETH0_RX_ERR */<br />
};<br />
<br />
eth1_mii_pins: eth1 {<br />
pinmux = <RZG2L_PORT_PINMUX(37, 2, 1)>, /* ET1_LINKSTA */<br />
<RZG2L_PORT_PINMUX(37, 0, 1)>, /* ET1_MDC */<br />
<RZG2L_PORT_PINMUX(37, 1, 1)>, /* ET1_MDIO */<br />
<RZG2L_PORT_PINMUX(29, 0, 1)>, /* ET1_TXC */<br />
<RZG2L_PORT_PINMUX(29, 1, 1)>, /* ET1_TX_CTL */<br />
<RZG2L_PORT_PINMUX(30, 0, 1)>, /* ET1_TXD0 */<br />
<RZG2L_PORT_PINMUX(30, 1, 1)>, /* ET1_TXD1 */<br />
<RZG2L_PORT_PINMUX(31, 0, 1)>, /* ET1_TXD2 */<br />
<RZG2L_PORT_PINMUX(31, 1, 1)>, /* ET1_TXD3 */<br />
<RZG2L_PORT_PINMUX(32, 0, 1)>, /* ETH1_TX_ERR */<br />
<RZG2L_PORT_PINMUX(32, 1, 1)>, /* ETH1_TX_COL */<br />
<RZG2L_PORT_PINMUX(33, 0, 1)>, /* ETH1_TX_CRS */<br />
<RZG2L_PORT_PINMUX(33, 1, 1)>, /* ET1_RXC */<br />
<RZG2L_PORT_PINMUX(34, 0, 1)>, /* ET1_RX_CTL */<br />
<RZG2L_PORT_PINMUX(34, 1, 1)>, /* ET1_RXD0 */<br />
<RZG2L_PORT_PINMUX(35, 0, 1)>, /* ET1_RXD1 */<br />
<RZG2L_PORT_PINMUX(35, 1, 1)>, /* ET1_RXD2 */<br />
<RZG2L_PORT_PINMUX(36, 0, 1)>, /* ET1_RXD3 */<br />
<RZG2L_PORT_PINMUX(36, 1, 1)>; /* ETH1_RX_ERR */<br />
};<br />
}; <br />
<br />
|}<br />
<br />
=USB=<br />
<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=SD Card=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=eMMC=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=I2C=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=SPI=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=QSPI Flash=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=UART=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=CAN=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
<br />
=ADC=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=Watchdog Timer(WDT)=<br />
<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** rz_linux-cip/drivers/watchdog/'''renesas_wdt.c'''<br />
** CONFIG_RENESAS_WDT<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** rz_linux-cip/drivers/watchdog/'''rzg2l_wdt.c'''<br />
** CONFIG_RENESAS_RZG2LWDT<br />
<br />
'''Notes'''<br />
* When rebooting the system, the watchdog timer is used. Simply type the command line "reboot" in the console.<br />
* To test a watch dog timeout/reboot, enter this command in the console "cat >> /dev/watchdog", then press ENTER again, then wait 1 minutes, and the board should reboot.<br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
=PWM=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
<br />
=Timer=<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** <br />
** CONFIG_xxx=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** <br />
** CONFIG_xxx=y<br />
<br />
'''Notes'''<br />
* <br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)<br />
<br />
= Thermal =<br />
'''Linux Drivers'''<br />
* RZ/G2H, G2M, G2N, G2E:<br />
** drivers/thermal/rcar_gen3__thermal.c<br />
** CONFIG_RCAR_GEN3_THERMAL=y<br />
* RZ/G2L, G2LC, G2UL, V2L:<br />
** drivers/thermal/rzg2l_thermal.c<br />
** CONFIG_RZG2L_THERMAL=y<br />
<br />
'''Notes'''<br />
* The Linux driver reads the registers and applies the formula in the hardware manual<br />
* You can read the current value running the command:<br />
** $ cat /sys/class/thermal/thermal_zone0/temp<br />
* The output value is in millicelsius<br />
<br />
'''Device Tree Examples'''<br />
* (see device tree for evaluation board)</div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZ-G2L_SMARC&diff=1146RZ-G/RZ-G2L SMARC2022-03-09T18:51:04Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G2L SMARC Board by Renesas}}<br />
<img height="200" style="float:right" src=http://linuxgizmos.com/files/renesas_rzg2l_carrier.jpg><br />
← [[RZ-G]]<br />
<br />
<big>📌'''This page is for both the RZ/G2L and RZ/G2LC boards.'''</big><br />
<br />
= General Information =<br />
* '''[https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rzg2l-general-purpose-microprocessors-dual-core-arm-cortex-a55-12-ghz-cpus-3d-graphics-and-video-codec Official RZ/G2L Device Website ]'''<br />
* '''[https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rtk9744l23s01000be-rzg2l-evaluation-board-kit Official RZ/G2L Evaluation Board Kit Website]'''<br />
* '''[https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rtk9744c22s01000be-rzg2lc-evaluation-board-kit Official RZ/G2LC Evaluation Board Kit Website]'''<br />
** Please review the '''Documentation''' and '''Downloads''' sections<br />
* Linux Board Support Package Download<br />
** '''[https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rzg2l-board-support-package-419-cip Official BSP Download Page]'''<br />
** Please refer to the '''[https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rzg2l-board-support-package-419-cip Linux BSP page]''' on this wiki site for guidance on '''what to download'''.<br />
** Please read the '''Release Note''' document for the BSP build instructions.<br />
* Additional Help<br />
** A script for '''programming the boot loaders into SPI Flash''' can be found here: https://github.com/renesas-rz/rzg2_bsp_scripts/tree/master/flash_writer_tool<br />
** Information regarding '''[[RZ-G/RZ-G2L_Flash_Programming | RZ/G2L Programming]]''' of onboard Flash devices with bootloaders and root file systems<br />
* Articles<br />
** [http://linuxgizmos.com/renesas-adds-to-rz-g2-line-with-three-cortex-a55-socs Renesas adds to RZ/G2 line with three Cortex-A55 SoCs]<br />
<br />
= Board Version Identification (RZ/G2L only) =<br />
<br />
There are currently multiple versions of RZ/G2L boards with different components. (There is only 1 version of RZ/G2LC board). Please make note of what board you have. <br><br />
Some boards require different '''software patches''' to be applied before building.<br />
<br />
[[File:RZG2L_Discrete_vs_PMIC.png|thumb|right]]<br />
<br />
'''RZ/G2L Silicon version WS1 vs WS2:'''<br />
* The '''WS1''' Silicon version has the specific date code "2050KC002" written on top of the device<br />
* The '''WS2''' Silicon version has the text "RZ/G2L" written on top of the device<br />
<br />
'''Discrete Power Design vs New Renesas PMIC Solution:'''<br />
* The '''Discrete Power''' design has the words "Renesas" written in white silk screen on the '''top edge''' of the board.<br />
* The '''PMIC Power''' design has the words "Renesas" written in white silk screen in the '''center''' the board. Also, the PMIC has the words Renesas on the top of the device.<br />
<br />
'''Board Combinations:'''<br />
<br />
Here are the only release of these boards:<br />
* 1st Release: WS1 Silicon + Discrete Power<br />
* 2nd Release: WS2 Silicon + Discrete Power<br />
* 3rd Release: WS2 Silicon + PMIC Power<br />
<br />
'''Power Button on PMIC Boards:'''<br />
* On the PMIC boards, please '''press and hold''' the <span style="color:red">red</span> power button for 2 seconds to turn ON and OFF.<br />
* If the "Carrier PWR On" LED does not turn green, please try again and hold the button longer.<br />
<br />
= Getting Started =<br />
'''1. Download the Linux BSP'''<br />
* Download the RZ/G2L Board Support Package from renesas.com.<br />
* Links to all the downloads can be found on '''[https://renesas.info/wiki/RZ-G/RZ-G2_BSP#Downloads this page here]'''. Please refer to the RZ/G2L table.<br />
* ⚠️ You also need to download the "RZ/G2L Mali Graphic Library" package to enable graphics.<br />
* ⚠️ You also need to download the "RZ/G2L Codec Library" package to enable video encode/decode.<br />
<br />
<br />
'''2. Build Environment'''<br />
* To build the BSP, you will need a Linux PC running '''Ubuntu 20.04'''. Only this Host OS version was tested.<br />
* You can use a Linux PC (recommended) or a Virtual Machine.<br />
<br />
'''3. Build the BSP'''<br />
* 🚦 The instructions for building the BSP are located in the '''Release Note''' document (<B>r01us<font color=blue>0471</font>ej0xxx-rz-g.pdf</B>) that is included in the ZIP file download from [https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rzg2l-board-support-package-419-cip renesas.com].<br />
* ⚠️ There are currently '''3 versions of RZ/G2L boards''' (WS1-Discrete, WS2-Discrete, WS2-PMIC). Please review section [[RZ-G/RZ-G2L_SMARC#Board_Version_Identification|Board Version Identification]] above. There is only '''1 version of RZ/G2LC board'''. There is only '''1 version of RZ/G2UL board'''.<br />
* ⚠️ If you are building core-image-weston or core-image-qt, you need to add '''Mali Graphics library''' mentioned in step 1.<br />
* If you have a '''RZ/G2L WS1 board''' (very rare), please review section 6 in the 'Release Note' of the BSP in detail before following the instructions in section 3.<br />
* ✨ To make the build '''faster''', you can copy the '''downloads''' directory from an older BSP (rzg2l_bsp_v1.3/build/downloads -> rzg2l_bsp_v1.4/build/downloads) to skip downloading the same open source packages again.<br />
<br />
'''4. Prepare an SD Card'''<br />
* The evaluation boards can be booted from SD Cards. The SD card must be formatted and loaded using a Linux PC. A helpful script has been created '''([https://github.com/renesas-rz/rzg2_bsp_scripts/tree/master/usb_sd_partition usb_sd_partition])''' that you can run on your Linux PC.<br />
<br />
* Insert your micro SD card into a '''USB-SD-Card reader''' and then plug into a Linux PC.<br />
<br />
* Use the commands below to download the formatting script and run. Please select your card and choose the default settings.<br />
<br />
<pre><br />
$ wget https://raw.githubusercontent.com/renesas-rz/rzg2_bsp_scripts/master/usb_sd_partition/usb_sd_partition.sh<br />
$ chmod +x usb_sd_partition.sh<br />
$ ./usb_sd_partition.sh<br />
</pre><br />
* Use the commands below to copy the files you build with the BSP to the SD card. '''Start in the base of your Yocto BSP'''.<br />
<pre><br />
# Change to the Yocto output directory that contains the files<br />
# Replace "smarc-rzg2l" to "smarc-rzg2lc" where needed<br />
$ cd build/tmp/deploy/images/smarc-rzg2l<br />
<br />
# Copy the Linux kernel and Device Tree to partition 1<br />
$ sudo cp -v Image /media/$USER/RZ_FAT<br />
$ sudo cp -v r9a07g044l2-smarc.dtb /media/$USER/RZ_FAT # RZ/G2L<br />
$ sudo cp -v r9a07g044c2-smarc.dtb /media/$USER/RZ_FAT # RZ/G2LC<br />
<br />
# Copy and expand the Root File System to partition 2<br />
$ sudo tar -xvf core-image-minimal-smarc-rzg2l.tar.gz -C /media/$USER/RZ_ext<br />
(or if using graphics)<br />
$ sudo tar -xvf core-image-weston-smarc-rzg2l.tar.gz -C /media/$USER/RZ_ext<br />
<br />
# Make sure all files are finished writing before removing the USB card reader from the PC<br />
$ sync<br />
</pre><br />
<br />
* Safely remove your USB card reader by right clicking on the drive icon (either RZ_FAT or RZ_ext) in Ubuntu and selecting "Eject"<br />
<br />
'''5. Power the Board and Connect to the Serial Port '''<br />
* Supply power the board using the '''USB-C connection''' on the carrier board labeled "Power Input"<br />
* On the carrier board, press the '''red button''' in order to turn on power to the board. The green LED labeled "Carrier PWR On" will be lit when power is on.<br />
* Now that the board is powered, plug a USB micro cable into the carrier board to the USB connector labeled '''"SER 3 UART"'''. Use a '''serial terminal program''' to interact as you board. With a Linux PC, we recommend using "putty" (connects to /dev/USB0), and with a Windows PC we recommend "TeraTerm" that connects to COMx. The baud rate of the Serial connection is '''115200 bps'''.<br />
* Press the '''blue reset button''', and then "u-boot" will start. Within 3 seconds, '''press the space bar''' on your keyboard in order to stop the auto-boot sequence.<br />
<br />
'''6. Switch settings for the CPU SOM board.'''<br />
* The SOM board contains a eMMC Flash device and a Micro SD Card socket. On the SOM board, you can only use one or the other because they are both connected to the same peripheral channel on the RZ/G2L.<br />
* Set the switches on the SOM board to what you want to use.<br />
* ⚠️ u-boot environment variables are always stored in eMMC Flash (not SPI flash). This means if you change switch SW1-2 to ON on the SOM board, you cannot access saved u-boot environments variables and you will always get the message "*** Warning - MMC init failed, using default environment"<br />
* Note that the SD Card slot on the Carrier board will always work regardless of the setting of SW1-2 because it uses a separate peripheral channel on the RZ/G2L.<br />
* On the SOM (CPU) board, there is a little switch (SW1) near the SD card socket.<br />
<pre><br />
SOM board uses SD Card socket SOM board uses eMMC Flash<br />
SW1-1 = ON/OFF(JTAG) SW1-1 = ON/OFF(JTAG)<br />
SW1-2 = ON SW1-2 = OFF<br />
+-----+ +-----+<br />
| ON | | ON |<br />
| = = | | = |<br />
| | | = |<br />
| 1 2 | | 1 2 |<br />
+-----+ +-----+<br />
</pre><br />
<br />
'''7-1. Boot the Board using SD Card on Carrier Board (Recommended)'''<br />
* Insert the '''SD card''' into the socket on '''Carrier Board'''.<br />
<pre style="background-color:#FFFFFF; border:0px"><br />
┌─────┬─────┬─────┐<br />
│ │ SOM │ │<br />
│ └─────┘ │<br />
│ Carrier Board │<br />
│ ┌─┐ │<br />
└─────┴─┴─────────┘<br />
↑<br />
SD Card Socket<br />
</pre><br />
* Press the '''blue reset button''', and then "u-boot" will start. Within 3 seconds, '''press the space bar''' on your keyboard in order to stop the auto-boot sequence.<br />
* At the u-boot prompt ( => ), enter the following commands to boot the board.<br />
* ⚠️ If you get an failure when saving with "saveenv", remove power to the board and try again.<br />
'''RZ/G2L EVK:'''<br />
<pre><br />
# Create command macros and save them:<br />
=> setenv sd_boot1 'mmc dev 1 ; fatload mmc 1:1 0x48080000 Image ; fatload mmc 1:1 0x48000000 /r9a07g044l2-smarc.dtb'<br />
=> setenv sd_boot2 'setenv bootargs 'root=/dev/mmcblk1p2 rootwait' ; booti 0x48080000 - 0x48000000'<br />
=> setenv bootcmd 'run sd_boot1 sd_boot2'<br />
=> saveenv<br />
</pre><br />
<br />
'''RZ/G2LC EVK:'''<br />
<pre><br />
# Create command macros and save them:<br />
=> setenv sd_boot1 'mmc dev 1 ; fatload mmc 1:1 0x48080000 Image ; fatload mmc 1:1 0x48000000 /r9a07g044c2-smarc.dtb'<br />
=> setenv sd_boot2 'setenv bootargs 'root=/dev/mmcblk1p2 rootwait' ; booti 0x48080000 - 0x48000000'<br />
=> setenv bootcmd 'run sd_boot1 sd_boot2'<br />
=> saveenv<br />
</pre><br />
Reset the board and it will automatically boot<br />
<br />
'''7-2. Boot the Board using eMMC Flash on SOM Board'''<br />
* Set switch SW1-2 = OFF<br />
* The boot loader (u-boot) by default will try to boot from<br />
<br />
= Sample and Demo Code =<br />
<br />
(coming soon)<br />
<br />
= Board Setup Information =<br />
{| class="toccolours" width="100%" style="border-style: none ; text-align: center; background-color:white;"<br />
|-<br />
| [[File:board_configuration.png|frameless]]<br>'''RZ/G2L Evaluation Board Kit Configuration'''<br />
| [[File:smarc_module_board_top.png|frameless|]] <br>'''RZ/G2L SMARC Module Board (TOP)'''<br />
| [[File:smarc_module_board_bottom.png|frameless|]]<br>'''RZ/G2L SMARC Module Board (Bottom)'''<br />
| [[File:smarc_series_carrier_board.png|frameless|]]<br>'''RZ SMARC Series Carrier Board'''<br />
|-<br />
| &nbsp;<br />
|-<br />
| colspan="2" style="text-align:left;" | [[File:power_supply.png|frameless|]]<br>'''Power Supply'''<br>The following power supply environment is used in the evaluation of Renesas:<br>● USB Type-C cable CB-CD23BK (manufactured by Aukey) <br> ● USB PD Charger Anker PowerPort III 65W Pod (manufactured by Anker) <br />
| colspan="2" style="text-align:left;" |[[File:JTAG_connection_ice_debug.png|frameless|]]<br>'''JTAG Cable Connection for ICE Debugging'''<br>When connecting JTAG debugger, please set the DIP SW1 settings as shown.<br>The JTAG connector is 10pin.<br />
|-<br />
|-<br />
| &nbsp;<br />
|-<br />
| [[File:boot_mode.png|frameless|]]<br>'''How to set Boot Modes'''<br />
|-<br />
| &nbsp;<br />
|-<br />
| colspan="2" style="text-align:left;" | [[File:RZG2UL_SW1_setting.png|frameless|]]<br>'''Smarc RZ/G2UL DIP Switch(SW1) Settings'''<br />
| colspan="2" style="text-align:left;" |[[File:RZG2LC_SW1_setting.png|frameless|]]<br>'''Smarc RZ/G2LC DIP Switch(SW1) Settings'''<br />
|}<br />
<br />
= Board Operation Information =<br />
{| class="toccolours" width="100%" style="border-style: none ; text-align: center; background-color:white;"<br />
|-<br />
| style="text-align:left;" | [[File:power_on.png|frameless|]]<br>'''Power ON'''<br>● Connect USB-PD Power Charger to USB Type-C Connector. Then LED1(VBUS PWR On) and LED3(Module PWR On) lights up.<br>● Press SW9 to turn on the power. Then LED4(Carrier PWR On) lights up.<br />
| style="text-align:left;" | [[File:debug_serial.png|frameless|]]<br>'''Debug Serial (Console Output)'''<br>● Debug serial uses CN14. The baud rate is 115200bps.<br>● Since the serial-USB conversion IC is not always powered, the Windows PC will recognize it after the power switch is turned on.<br>● If it is not recognized by your Windows PC, please install the driver�https://www.ftdichip.com/Drivers/VCP.htm<br />
<br />
|}<br />
<br />
= LCD Monitors =<br />
The following LCD monitor were tested with this board.<br />
<br />
* Ingcool 7 inch HDMI LCD 1024x600 Resolution Capacitive Touch Screen<br />
** 🛒 Amazon link : https://www.amazon.com/Ingcool-Resolution-Capacitive-Compatible-Raspberry/dp/B08H8HZRLQ<br />
** If you attach the 'Touch' USB connection on the LCD to the RZ/G2L board, it will both power the LCD board as well as enable touch support.<br />
* ELECROW Raspberry Pi Touchscreen Monitor 5 inch HDMI Screen Display 800x480 Compatible<br />
** 🛒 Amazon link : https://www.amazon.com/Elecrow-Capacitive-interface-Supports-Raspberry/dp/B07FDYXPT7<br />
<br />
= Using the Coral MIPI Camera =<br />
As of the RZ/G2L BSP v1.3 release, the Coral Camera module (OV5645) is supported and enabled.<br />
<br />
'''MIPI CSI Configuration and Resolution Selection'''<br><br />
Before you can use the camera, you must first configure the MIPI CSI module to capture image.<br><br />
MIPI CSI configuration is done by using media-ctl utility from v4l-utils package.<br><br />
The first 2 commands below enable the camera.<br><br />
Below that are commands you use to select the camera resolution you want to capture.<br />
<pre><br />
[ Camera Setup ]<br />
media-ctl -d /dev/media0 -r<br />
media-ctl -d /dev/media0 -l "'rzg2l_csi2 10830400.csi2':1 -> 'CRU output':0 [1]"<br />
<br />
[Select resolution 1280x960 ]<br />
media-ctl -d /dev/media0 -V "'rzg2l_csi2 10830400.csi2':1 [fmt:UYVY8_2X8/1280x960 field:none]"<br />
media-ctl -d /dev/media0 -V "'ov5645 0-003c':0 [fmt:UYVY8_2X8/1280x960 field:none]"<br />
<br />
[Select resolution 1920x1080 ]<br />
media-ctl -d /dev/media0 -V "'rzg2l_csi2 10830400.csi2':1 [fmt:UYVY8_2X8/1920x1080 field:none]"<br />
media-ctl -d /dev/media0 -V "'ov5645 0-003c':0 [fmt:UYVY8_2X8/1920x1080 field:none]"<br />
<br />
[Select resolution 2592x1944 ]<br />
media-ctl -d /dev/media0 -V "'rzg2l_csi2 10830400.csi2':1 [fmt:UYVY8_2X8/2592x1944 field:none]"<br />
media-ctl -d /dev/media0 -V "'ov5645 0-003c':0 [fmt:UYVY8_2X8/2592x1944 field:none]"<br />
</pre><br />
<br />
'''Capture Images using GStreamer'''<br><br />
This command can be used capture images and display them on the screen in weston.<br><br />
<pre><br />
gst-launch-1.0 v4l2src device=/dev/video0 ! videoconvert ! waylandsink<br />
</pre><br />
<br />
= Build Qt in BSP V1.3 =<br />
BSP V1.3 already supports to build core-image-qt. Please follow these instructions to add Qt to the build.<br><br />
Start in the base of the Yocto BSP directory.<br />
<pre><br />
$ git clone https://github.com/meta-qt5/meta-qt5<br />
$ cd meta-qt5<br />
$ git checkout c1b0c9f546289b1592d7a895640de103723a0305<br />
$ cd ..<br />
</pre><br />
<br />
It also comes with Qt demoes. If you want to build the demos, enable QT_DEMO = "1" in conf/local.conf.<br />
* Edit file /build/conf/local.conf<br />
* Remove the comment marker # to set QT_DEMO = "1"<br />
<pre><br />
# Adding qt demonstration to core-image-qt or not<br />
QT_DEMO = "1"<br />
</pre><br />
There is an issue in BSP V1.3 to play the multimedia file by gstreamer or gst-launch-1.0. This issue is fixed in BSP V1.3_update1.<br />
<br />
In BSP V1.3 it can be fixed by editing the file:<br />
<br />
* rzg2l_bsp_v1.3/meta-rzg2/dynamic-layers/qt5-layer/images/core-image-qt.bb<br />
<br />
and adding the following lines to the file:<br />
require recipes-multimedia/image/core-image-weston.inc<br />
Now you can build core-image-qt.<br />
<pre><br />
$ bitbake core-image-qt<br />
</pre><br />
After the build is complete, copy the new root file system to your SD Card<br />
<pre><br />
$ cd build/tmp/deploy/images/smarc-rzg2l<br />
$ sudo tar -xvf core-image-qt-smarc-rzg2l.tar.gz -C /media/$USER/RZ_ext<br />
$ cd -<br />
$ sync<br />
</pre><br />
After the board boots, on the Weston desktop you will see icons that will start the demos.<br />
<br />
= Enable eMMC Boot =<br />
eMMC Boot refers to the SoC booting directly from eMMC flash after RESET. This means SPI Flash is not used.<br />
<br />
eMMC boot support was added after BSP v1.3 was released.<br />
<br />
The follow commands (copy/paste) and instructions will allow you to manually download, build and program your board. <br />
<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| Instructions &nbsp; &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &emsp; &emsp;<br />
|-<br />
|<br />
<pre><br />
# Download and install a toolchain<br />
# Linaro Toolchain, Version 7.5.0-2019.12<br />
sudo mkdir -p /opt/linaro<br />
cd /opt/linaro<br />
sudo wget https://releases.linaro.org/components/toolchain/binaries/7.5-2019.12/aarch64-linux-gnu/gcc-linaro-7.5.0-2019.12-x86_64_aarch64-linux-gnu.tar.xz<br />
sudo tar xvf gcc-linaro-7.5.0-2019.12-x86_64_aarch64-linux-gnu.tar.xz<br />
cd - # this command puts you back to your original directory :)<br />
<br />
# Make sure you have all the build utilities you need<br />
sudo apt-get install git make gcc g++ libncurses5-dev libncursesw5-dev python bison flex libssl-dev<br />
<br />
# Allow non-root access to tty<br />
sudo usermod -a -G dialout $USER<br />
<br />
# Create a new Directory<br />
mkdir rzg2l_emmc_boot<br />
cd rzg2l_emmc_boot<br />
<br />
#---------------------------------------------------<br />
# Download FlashWriter<br />
#---------------------------------------------------<br />
git clone https://github.com/renesas-rz/rzg2_flash_writer<br />
cd rzg2_flash_writer ; git checkout rz_g2l ; cd .. # NOTE: Only for RZG2L<br />
cd rzg2_flash_writer ; git checkout rz_v2l ; cd .. # NOTE: Only for RZV2L<br />
<br />
<br />
#---------------------------------------------------<br />
# Download TrustedFirmware-A<br />
#---------------------------------------------------<br />
git clone https://github.com/renesas-rz/rzg_trusted-firmware-a<br />
cd rzg_trusted-firmware-a ; git checkout v2.5/rzg2l ; cd .. # It building RZG2L<br />
cd rzg_trusted-firmware-a ; git checkout v2.5/rzv2l ; cd .. # It building RZV2L<br />
<br />
<br />
#---------------------------------------------------<br />
# Download mbed<br />
# mbed code is needed to build Trusted Firmware-A<br />
#---------------------------------------------------<br />
git clone git://github.com/ARMmbed/mbedtls.git<br />
cd mbedtls ; git checkout mbedtls-2.16.3 ; cd .. # NOTE: For RZG2L and RZV2L<br />
<br />
<br />
#---------------------------------------------------<br />
# Download u-boot<br />
#---------------------------------------------------<br />
git clone https://github.com/renesas-rz/renesas-u-boot-cip<br />
cd renesas-u-boot-cip ; git checkout v2020.10/rzg2l ; cd .. # NOTE: Only for RZG2L<br />
cd renesas-u-boot-cip ; git checkout v2020.10/rzv2l ; cd .. # NOTE: Only for RZV2L<br />
<br />
<br />
#---------------------------------------------------<br />
# Download build scripts<br />
#---------------------------------------------------<br />
wget https://raw.githubusercontent.com/renesas-rz/rzg2_bsp_scripts/master/build_scripts/build_common.sh<br />
wget https://raw.githubusercontent.com/renesas-rz/rzg2_bsp_scripts/master/build_scripts/build_flashwriter.sh<br />
wget https://raw.githubusercontent.com/renesas-rz/rzg2_bsp_scripts/master/build_scripts/build_tfa.sh<br />
wget https://raw.githubusercontent.com/renesas-rz/rzg2_bsp_scripts/master/build_scripts/build_uboot.sh<br />
wget https://raw.githubusercontent.com/renesas-rz/rzg2_bsp_scripts/master/build_scripts/build.sh<br />
chmod +x *.sh<br />
<br />
<br />
#---------------------------------------------------<br />
# Configure build system<br />
#<br />
# - Select "smarc-rzg2l" or "smarc-rzg2l"<br />
# - All output files will be in directory "output_smarc-rzg2l" or "output_smarc-rzv2l"<br />
#---------------------------------------------------<br />
./build.sh s<br />
<br />
#---------------------------------------------------<br />
# build Flash Writer<br />
#<br />
# - Select toolchain "Linaro gcc-linaro-7.5.0-2019.12 " that you installed<br />
# - Change "eMMC Flash programming support" from "(default)" to "ENABLE"<br />
# - Select 'Build'<br />
#---------------------------------------------------<br />
./build.sh f<br />
<br />
#---------------------------------------------------<br />
# build u-boot<br />
#---------------------------------------------------<br />
# * Select toolchain "Linaro gcc-linaro-7.5.0-2019.12" that you installed<br />
./build.sh u<br />
<br />
#---------------------------------------------------<br />
# build TF-A<br />
#<br />
# - Select toolchain "Linaro gcc-linaro-7.5.0-2019.12" that you installed<br />
# - Change "Boot Device" to "eMMC Flash"<br />
# - Select 'Build'<br />
#---------------------------------------------------<br />
./build.sh t<br />
<br />
#---------------------------------------------------<br />
# Download 'Flash Writer Tool'<br />
# - Configure for our output directory <br />
# - Configure for board "smarc-rzg2l" or for RZV2L "smarc-rzv2l"<br />
# - Configure for eMMC Flash boot<br />
#---------------------------------------------------<br />
git clone https://github.com/renesas-rz/rzg2_bsp_scripts<br />
cd rzg2_bsp_scripts/flash_writer_tool<br />
echo "CONFIG_FILE=config.ini" > settings.txt<br />
<br />
echo "FILES_DIR=../../output_smarc-rzg2l" > config.ini # NOTE: Only for RZG2L<br />
echo "FILES_DIR=../../output_smarc-rzv2l" > config.ini # NOTE: Only for RZV2L<br />
<br />
echo "FLASH=1" >> config.ini<br />
echo "BOARD=smarc-rzg2l" >> config.ini<br />
echo "BOARD_VERSION=PMIC" >> config.ini # NOTE: Only if you have a board with PMIC Power Supply<br />
echo "BOARD_VERSION=DISCRETE" >> config.ini # NOTE: Only if you have a board with Discrete Power Supply<br />
<br />
#---------------------------------------------------<br />
# Run 'Flash Writer Tool'<br />
#---------------------------------------------------<br />
./flash_writer_tool.sh<br />
<br />
Step 1. Select "Show Switches" to show how to put board into SCIF Download mode<br />
Step 2. Select "Download F.W."<br />
Step 3. Select "eMMC boot setup"<br />
Step 4. Select "Program BL2"<br />
Step 5. Select "Program FIP"<br />
Step 6. Select "Show Switches" to show how to put board into eMMC Boot mode<br />
Step 7. Select "<SAVE-and-EXIT>"<br />
</pre><br />
|}<br />
<br />
= Program On-Board eMMC Flash =<br />
<br />
* To program the eMMC Flash device on the SOM board, you can follow the instructions below.<br />
* You will need to boot with SD card first and partition eMMC Flash device. Then you can load the files from SD card to eMMC Flash.<br />
<br />
1. Copy listed files to “/home/root” of the SD Card that you use to boot the system.<br />
<br />
RZG2L : '''core-image-weston-smarc-rzg2l.tar.gz''', '''Image''' and '''r9a07g044l2-smarc.dtb'''<br />
<br />
RZV2L : '''core-image-weston-smarc-rzv2l.tar.gz''', '''Image''' and '''r9a07g044l2-smarc.dtb'''<br />
<br />
2. Boot the board with the SD card and log into Linux.<br />
<br />
3. Partition the eMMC Flash using fdisk.<br />
* In fdisk, use the commands 'n' to make a new partition, and 'w' to write the partition (will automatically exit fdisk)<br />
* In fdisk, you can just press the Enter Key to select the default value (you do not have to type the default value)<br />
<pre><br />
root@smarc-rzg2l:~# fdisk /dev/mmcblk0<br />
Command (m for help): n<br />
Partition number (1-128, default 1): 1 <<<< just press ENTER for default value<br />
First sector (34-124321758, default 2048): 2048 <<<< just press ENTER for default value<br />
Last sector, +/-sectors or +/-size{K,M,G,T,P} (2048-124321758, default 124321758): 124321758 <<<< just press ENTER for default value<br />
Created a new partition 1 of type 'Linux filesystem' and of size 59.3 GiB.<br />
<br />
Command (m for help): w<br />
The partition table has been altered.<br />
</pre><br />
4. Format the partition as ext4<br />
<pre><br />
root@smarc-rzg2l:~# mkfs.ext4 -L rootfs /dev/mmcblk0p1<br />
</pre><br />
5. Mount the ext4 partition to "/mnt".<br />
<pre><br />
root@smarc-rzg2l:~# mount /dev/mmcblk0p1 /mnt<br />
</pre><br />
<br />
6. Extract the file system to the ext4 partition<br />
<br />
'''RZG2L''' <br />
<pre><br />
root@smarc-rzg2l:~# cd /home/root<br />
root@smarc-rzg2l:~# tar -zxvf core-image-weston-smarc-rzg2l.tar.gz -C /mnt<br />
root@smarc-rzg2l:~# cp Image /mnt/boot<br />
root@smarc-rzg2l:~# cp r9a07g044l2-smarc.dtb /mnt/boot<br />
root@smarc-rzg2l:~# sync<br />
</pre><br />
'''RZV2L'''<br />
<pre><br />
root@smarc-rzg2l:~# cd /home/root<br />
root@smarc-rzg2l:~# tar -zxvf core-image-weston-smarc-rzv2l.tar.gz -C /mnt<br />
root@smarc-rzg2l:~# cp Image /mnt/boot<br />
root@smarc-rzg2l:~# cp r9a07g044l2-smarc.dtb /mnt/boot<br />
root@smarc-rzg2l:~# sync<br />
</pre><br />
7. Unmount “/mnt”<br />
<pre><br />
root@smarc-rzg2l:~# umount /mnt<br />
</pre><br />
8. Reboot and change the boot parameter in u-boot to boot from eMMC<br />
<pre><br />
=> setenv bootargs 'rw rootwait earlycon root=/dev/mmcblk0p1'<br />
=> setenv bootcmd 'ext4load mmc 0:1 0x48080000 boot/Image; ext4load mmc 0:1 0x48000000 boot/r9a07g044l2-smarc.dtb; booti 0x48080000 - 0x48000000'<br />
=> saveenv<br />
=> boot<br />
</pre><br />
<br />
= Fix qmake missing in BSP v1.1 and BSP v1.3 =<br />
To created an SDK package that can build Qt applications, you use this command:<br />
<pre><br />
bitbake core-image-qt -c populate_sdk<br />
</pre><br />
However, there is an issue where when the Qt SDK is created, the '''qmake''' utility is not added to the SDK toolchain. This means you will not be able to build Qt user applications.<br />
<br />
This can be fixed by editing the file:<br />
* rzg2l_bsp_v1.3/meta-rzg2/dynamic-layers/qt5-layer/images/core-image-qt.bb<br />
and adding the following lines to the file:<br />
<pre><br />
inherit populate_sdk_qt5<br />
TOOLCHAIN_HOST_TASK_append = " nativesdk-qtwayland-tools " <br />
FEATURE_PACKAGES_tools-sdk += " packagegroup-qt5-toolchain-target kernel-devsrc " <br />
</pre><br />
This will be fixed for BSP v1.4<br />
<br />
= RZG2L Cortex-M33 Multi-OS Package=<br />
The RZG2L includes a ARM CM33 MCU. This section describes how to build applications and communication between the CV55 and the CM33.<br />
<br />
'''[https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rzg2l-multi-os-package Official RZG2L Cortex-M33 Multi-OS Package]'''<br />
*Please review the downloads and documents [[RZ-V2L_SMARC#CM33_e2studio_GDB_Debug|here]]<br />
'''The Cortex-M33 supports the the Reness FSP ( Flexible Software Package )'''.<br />
*Documentation for the FSP can be found on the Official RZG2L Cortex-M33 Multi-OS Package<br />
*Release Note for RZG2L Flexible Software Package PDF<br />
*RZG2L FSP Documentation V1.00 PDF<br />
'''Renesas e2studio IDE supports application development and debugging for the Cortex-CM33'''<br />
*Please review the RZG2L Getting Started Guide. This document includes information about setting up the IDE for RZG2L/CM33 Development, loading, and running Cortex-CM33 Applications<br />
'''Information on how to Debug on the CM33 is''' [[RZ-V/RZ-V2L SMARC#CM33_e2studio_GDB_Debug|here]]</div>Padhikarihttps://renesas.info/w/index.php?title=File:RZG2UL_SW1_setting.png&diff=1145File:RZG2UL SW1 setting.png2022-03-09T18:38:52Z<p>Padhikari: </p>
<hr />
<div></div>Padhikarihttps://renesas.info/w/index.php?title=File:RZG2LC_SW1_setting.png&diff=1144File:RZG2LC SW1 setting.png2022-03-09T18:38:32Z<p>Padhikari: </p>
<hr />
<div></div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_kernel&diff=1070RZ-G/RZG kernel2022-02-24T02:12:10Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G kernel Information}}<br />
← [[RZ-G]]<br />
<br />
= CPU Hotplug =<br />
You can enable and disable CPU cores by writing to a sysfs value.<br />
<br><br />
This is helpful for when you want to experiment with the performance of your application if you were to use a processor with less CPU cores.<br />
<br />
For example, this command will disable the 2nd core.<br />
<br />
<code>$ echo 0 > /sys/devices/system/cpu/cpu1/online</code><br />
<br />
More detailed information can be found here: https://www.cyberciti.biz/faq/debian-rhel-centos-redhat-suse-hotplug-cpu<br />
<br />
<br />
= Power Saving =<br />
* In Linux, this is a mechanism that is generally supported by all kernels.(it may depend on the version) <br />
* The Renesas kernel has support them. <br />
<br />
About power consumption in RZ/G2 series, we have some supported features to save power cost in default environment: <br />
* CPUHotplug: Turn on/off CPU in runtime. <br />
* CPUIdle: Support 2 modes to turn off clock or power domain of CPU when CPU is idle (nothing to do). <br />
** Sleep mode: put in sleep state. <br />
** Core standby mode: put in shutdown state. It is described in devicetree of each SoC => It has deeper state than sleep mode so that save more power. <br />
* CPUFreq: there are 6 governors to support "Dynamic Frequency Scaling": <br />
** '''Performance''': The frequency is always set maximum => It is using as default in our current environment. <br />
** '''Powersave''': The frequency is always set minimum. <br />
** '''Ondemand''': If CPU load is bigger than 95%, the frequency is set max. If CPU load is equal to or less than 95%, the frequency is set based on CPU load. <br />
** Conservative: If CPU load is bigger than 80%, the frequency is set one level higher than current frequency. If CPU load is equal to or less than 20%, the frequency is set one level lower than current frequency. <br />
** '''Userspace''': It sets frequency which is defined by user in runtime. <br />
** '''Schedutil''': Schedutil governor is driven by scheduler. It uses scheduler-provided CPU utilization information as input for making its decisions by formula: freq_next= 1.25 * freq_max* util_of_CPU. <br />
* Power Domain: it is supported as default by Linux Power Management Framework. If a module is not use, system will disable its clock and power domain automatically. <br />
<br />
Therefore, select proper method will be based on user's purpose. Here are my examples: <br />
* Want to use with best performance: disable CPUIdle + use performance frequency governor. <br />
* Want to use less power: enable CPUIdle + use powersave frequency governor. <br />
* Want to balance performance and power: we can use schedutil. <br />
* Want to modify frequency as user's purpose: use userspance frequency governor. <br />
* If user is running realtime environment, I suggest using performance governor to ensure the minimum latency. <br />
Here are some commands to check frequency value and frequency governor in linux: <br />
* Check available CPU frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_frequencies </code><br />
* Check available CPU frequency governor:<br />
: <code>cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_governors </code><br />
* Change to other governor:<br />
: <code>echo performance > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor (performance/userspace/schedutil/...) </code><br />
* Check current frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq</code><br />
<br />
= PMIC Access from Linux =<br />
The easiest way to access the PMIC registers from command line would would be to use i2ctools. Add the following line to your local.conf.<br />
: <code>IMAGE_INSTALL_append = " i2c-tools"</code><br />
<br />
However the PMICs are connected to a I2C (IIC for PMIC or I2C_DVFS) that is not enabled in the default kernel device tree.<br />
For the HiHope boards, you can edit the file <code>arch/arm64/boot/dts/renesas/hihope-common.dtsi</code> and add the following lines at the very bottom of the file.<br />
<pre><br />
&i2c_dvfs {<br />
status = "okay";<br />
};<br />
</pre><br />
<br />
Once booted in Linux, the corresponding device should be /dev/i2c-7 <br />
<br />
You can query the connected slaves by giving the following command: <br />
: <code> i2cdetect -y -r 7 </code><br />
that on the RZ/G2E board produces the output: <br />
<pre>0 1 2 3 4 5 6 7 8 9 a b c d e f <br />
00: -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1e 1f <br />
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
70: -- -- -- -- -- -- -- -- </pre><br />
So two slaves, at address 0x1e and 0x1f. <br />
Finally you can read registers by simply using the i2cget command, for example: <br />
<pre><br />
i2cget -y 7 0x1e 0x1 <br />
0x02 <br />
i2cget -y 7 0x1e 0x16 <br />
0x00 <br />
i2cget -y 7 0x1e 0x17 <br />
0xc4 <br />
</pre><br />
<br />
If you don't want (or can't) update the device tree blob, you could use u-boot to do it temporarily.<br />
The procedure below is valid for RZ/G2M but it works also with RZ/G2E-N-H by simply modifying the device tree blob and/or kernel image names. <br />
<br />
1) Interrupt the normal kernel boot<br />
<br />
2) Once in u-boot, enter the follow commands (after each RESET)<br />
<pre>=> fatload mmc 0:1 0x48080000 Image; fatload mmc 0:1 0x48000000 Image-r8a774a1-hihope-rzg2m-ex.dtb; <br />
=> fdt addr 0x48000000 <br />
=> fdt set /soc/i2c@e60b0000 status "okay"</pre><br />
and finally boot the kernel: <br />
<pre>=> booti 0x48080000 - 0x48000000 </pre><br />
<br />
= Create a uImage =<br />
In the kernel, there is no make target to make a uImage for the 64-bit ARM architecture like there is for 32-bit ARM.<br />
However, you can manually make one from the file Image.gz that is created by the kernel build system by using the following command on your host machine.<br />
<pre><br />
$ cd arch/arm64/boot<br />
$ mkimage -A arm64 -O linux -T kernel -C gzip -a 0x48080000 -e 0x48080000 -n "Linux Kernel Image" -d Image.gz uImage<br />
</pre><br />
<br />
Below is an example of booting this image on a RZ/G2 HiHiope board from u-boot.<br />
<pre><br />
=> fatload mmc 0:1 0x88000000 uImage<br />
=> fatload mmc 0:1 0x48000000 Image-r8a774e1-hihope-rzg2h-ex.dtb<br />
=> bootm 0x88000000 - 0x48000000<br />
</pre><br />
<br />
= Building mainline / LTS Linux kernel for RZ/G2E-N-M-H =<br />
The Verified Linux Package (VLP) includes the CIP kernel (v4.19.x) and this is the only official way to build a kernel that has all the features in. However it is possible to build a working kernel directly from mainline. The kernel built in this way does not provide most of the multimedia functionalities (e.g. GPU, codec, etc). <br />
<br />
A recent [https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads Linaro toolchain] is needed to build the kernel. The instructions below are for v5.10.x, newer kernel versions can be built as well in a similar way.<br />
git clone <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/</nowiki><br />
<br />
git checkout tags/v5.10.42<br />
or anyway the latest minor revision including bug fixes.<br />
<br />
Copy Renesas default kernel build into .out/.config:<br />
cp arch/arm64/configs/renesas_defconfig .out/.config<br />
or, if not present, get from the repository:<br />
wget -O .out/.config <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/plain/arch/arm64/configs/renesas_defconfig</nowiki><br />
If you want to be able to build modules:<br />
echo CONFIG_MODULES=y >> .out/.config<br />
<br />
echo CONFIG_MODULE_UNLOAD=y >> .out/.config<br />
Run kernel configuration:<br />
make O=.out menuconfig<br />
Exit and save. Then launch the build:<br />
make O=.out all -j$(nproc)<br />
<br />
= Renesas RZ/G2 PCIe Endpoint Driver =<br />
* [[RZ-G/RZG2_pcie_ep | Click Here]]<br />
<br />
= GPIO Pin Usage =<br />
Since linux-4.8 the GPIO sysfs interface is [https://www.kernel.org/doc/Documentation/gpio/sysfs.txt deprecated]. User space should use the character device instead. The libgpiod library encapsulates the ioctl calls and data structures behind a straightforward API.<br />
<br />
Also, the kernel source code contains a GPIO utility for user space. Please see directory tools/gpio/ in the kernel source code.<br />
<br />
== GPIO Programming ==<br />
=== Character device – user API (linux/gpio.h) : ===<br />
The linux kernel is distributed with three basic user-mode tools written for testing the GPIO interface. The source can be found in linux/tools/gpio/.<br />
The three tools are: <br><br />
1) lsgpio – example on how to list the GPIO lines on a system<br><br />
2) gpio-event-mon – monitor GPIO line events from userspace<br><br />
3) gpio-hammer - example to shake GPIO lines on a system<br><br />
* Note:These are useful for debugging GPIO lines, but none of these tools will allow the user to configure, set and clear GPIO lines.<br><br />
However, you can use user API (chip info, line info, line request for values, reading values, setting values, line request for events, polling for events annd reading events) from linux/gpio.h to program GPIO. <br><br />
* GPIO pin number for RZ/G2M/H/N/E is determined by using lsgpio:<br />
<pre><br />
GPIO chip: gpiochip6, "e6055400.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
GPIO chip: gpiochip5, "e6055000.gpio", 20 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 19: unnamed unused [output]<br />
GPIO chip: gpiochip4, "e6054000.gpio", 11 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 10: unnamed unused<br />
GPIO chip: gpiochip3, "e6053000.gpio", 16 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 15: unnamed unused<br />
GPIO chip: gpiochip2, "e6052000.gpio", 26 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 25: unnamed "wlan-en-regulator" [kernel output]<br />
GPIO chip: gpiochip1, "e6051000.gpio", 23 GPIO lines<br />
line 0: unnamed "interrupt" [kernel]<br />
....<br />
....<br />
line 22: unnamed unused<br />
GPIO chip: gpiochip0, "e6050000.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
</pre><br />
To access LED0, which is defined as GPIO5-19, you will use gpiochip5 chip and line 19.<br><br />
* RZ/G2L: Check board schematic to know the index of a pin (example P0_0, P43_0, ...). Then you will know the index of GPIO under Px_y (x: port number, y: pin number) is (8*x + y). Example P0_0 is 0, P5_1 is 41(8*5+1).<br><br />
<pre><br />
GPIO chip: gpiochip0, "11030000.pin-controller", 392 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 390: unnamed unused<br />
line 391: unnamed unused<br />
</pre><br />
* Example: To access, P43_1, you need to use, gpiochip0 and line 345 (43*8 + 1)<br><br />
* [[Media:gpio_led_linux.zip| Sample Code]] to blink LED0(GPIO5-19) RZG2E RevC using linux/gpio.h API<br />
* Note: To run, download the source code. You also need to install the yocto SDK for RZG2E Rev C<br><br />
<pre><br />
$ source /opt/poky/2.4.3/environment-setup-aarch64-poky-linux<br />
$ make<br />
</pre><br />
=== libgpiod – C library & tools for GPIO chardev : ===<br />
C library and tools for interacting the linux GPIO character device. <br><br />
* Build: To use libgpiod in RZ-G, in yocto, add the recipe to image, this can be done in local.conf with <br />
<pre>IMAGE_INSTALL_append = “ libgpiod libgpiod-tools” </pre><br />
* Command Line Tools:<br><br />
1) gpiodetect: to find out which GPIO banks and how many GPIO lines are available on the hardware<br><br />
*Ex: for RZG2E:<br />
<pre><br />
root@ek874:~# gpiodetect<br />
gpiochip6 [e6055400.gpio] (18 lines)<br />
gpiochip5 [e6055000.gpio] (20 lines)<br />
gpiochip4 [e6054000.gpio] (11 lines)<br />
gpiochip3 [e6053000.gpio] (16 lines)<br />
gpiochip2 [e6052000.gpio] (26 lines)<br />
gpiochip1 [e6051000.gpio] (23 lines)<br />
gpiochip0 [e6050000.gpio] (18 lines)<br />
</pre><br />
* In case of RZG2E, you have 7 char devices, seven GPIO banks<br />
2) gpioinfo: list all lines of specified gpiochips, their names, direction, active state and additional flags<br><br />
<pre><br />
gpiochip1 - 23 lines:<br />
line 0: unnamed "interrupt" input active-high [kernel]<br />
line 1: unnamed "interrupt" input active-high [kernel]<br />
....<br />
.... <br />
line 22: unnamed unused input active-high <br />
gpiochip0 - 18 lines:<br />
line 0: unnamed unused input active-high <br />
line 1: unnamed unused input active-high <br />
....<br />
....<br />
line 17: unnamed unused input active-high<br />
</pre><br />
3) gpiofind: find the gpiochip name and line offset given the line name. For RZ/G, we do not have pin name export in driver, so we can not use pin name to find the pin line. <br><br />
4) gpioset: set the values of specified GPIO lines. gpioset expects the bank, gpiochip, GPIO line and the value to be set, 1 for HIGH and 0 for LOW active-high standard<br><br />
*Ex: To set the line 3 of gpiochip5 to 1<br />
<pre>root@ek874:~# gpioset gpiochip5 3=1</pre><br />
*Note: gpioset (and all libgpiod apps) will revert the state of a GPIO line back to its original value when it exits. For this reason if you want the state to persist you need to instruct gpioset to wait for a signal and optionally detach and run in the background.<br><br />
<pre>root@ek874:~# gpioset --mode=signal --background gpiochip5 19=1</pre><br />
5) gpioget: read values of specified GPIO lines<br><br />
*Ex: read line 10 of gpiochip6<br />
<pre>root@ek874:~# gpioget gpiochip6 10</pre><br />
* [[Media:gpio_led_libgpiod_rzg2l.zip| Sample Code]] using PMOD Module(https://store.digilentinc.com/pmod-led-four-high-brightness-leds/) and RZG2L<br />
* Note: To run, download the source code. You also need to install the yocto SDK for RZG2L <br><br />
* [[Media:gpio_led_libgpiod.zip| Sample Code]] to blink LED0(GPIO5-19) RZG2E RevC using libgpiod API<br />
* Note: To run, download the source code. You also need to install the yocto SDK for RZG2E Rev C<br><br />
<pre><br />
$ source /opt/poky/2.4.3/environment-setup-aarch64-poky-linux<br />
$ make<br />
</pre><br />
=== Using sysfs interface : ===<br />
GPIO pin number for RZ/G2M/H/N/E is determined by:<br />
* GPIO_ID = GPIO Bank Address + Pin Number <br />
<pre><br />
RZ/G2E RZ/G2M/N/H<br />
GPIO Bank Address GPIO Bank Address<br />
GPIO 0 494 GPIO 0 496 <br />
GPIO 1 471 GPIO 1 467<br />
GPIO 2 445 GPIO 2 452 <br />
GPIO 3 429 GPIO 3 436<br />
GPIO 4 418 GPIO 4 418<br />
GPIO 5 398 GPIO 5 392<br />
GPIO 6 380 GPIO 6 360<br />
GPIO 7 356<br />
</pre><br />
Example:<br><br />
*For RZ/G2E, GPIO number of GP5_19 is 398 + 19 = 417<br />
*Example: Turn on/off LED0 GP5_19 => gpio417 on RZ/G2E (Rev C) board<br><br />
NOTE: GP5_19 is defined as a GPIO LED0 in Device Tree. So you<br />
need to either remove that from the Device Tree and reprogram the board, or <br><br />
you can remove it from device tree in uboot using fdt command. Below is the example using fdt<br />
<pre><br />
=> setenv gpioLED_1=fatload mmc 0:1 0x48080000 Image-ek874.bin; fatload mmc 0:1 0x48000000 Image-r8a774c0-ek874-revc-mipi-2.1.dtb<br />
=> setenv gpioLED_2=fdt addr 0x48000000 ; fdt rm /leds<br />
=> setenv gpioLED_3=booti 0x48080000 - 0x48000000<br />
=> setenv gpioLED_boot=run gpioLED_1 gpioLED_2 gpioLED_3<br />
=> setenv<br />
Then run the command to boot<br />
=> run gpioLED_boot<br />
</pre><br />
Now, lets turn on/off switch using sysfs:<br />
<pre><br />
root@ek874:~# echo 417 > /sys/class/gpio/export # request gpio417<br />
root@ek874:~# echo out > /sys/class/gpio/gpio417/direction # set gpio417 (GP5_19) output<br />
root@ek874:~# echo 1 > /sys/class/gpio/gpio417/value # turn ON LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
1<br />
root@ek874:~# echo 0 > /sys/class/gpio/gpio417/value # turn OFF LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
0<br />
</pre><br />
RZ/G2L Pin Decode :<br />
GPIO pin number is determined by formula:<br />
* GPIO_ID = GPIO_port * 8 + GPIO_pin + 120<br />
Example:<br />
P42_4 has its id 460 with above formula (42 * 8 + 4 + 120).<br />
* Example GPIO input function by using PMOD slide switch https://digilent.com/shop/pmod-swt-4-user-slide-switches/<br />
<pre><br />
root@smarc-rzg2l:~# echo 460 > /sys/class/gpio/export<br />
root@smarc-rzg2l:~# echo in > /sys/class/gpio/gpio460/direction <br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value <br />
1<br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value # after switch off<br />
0<br />
</pre></div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_kernel&diff=1069RZ-G/RZG kernel2022-02-24T02:10:54Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G kernel Information}}<br />
← [[RZ-G]]<br />
<br />
= CPU Hotplug =<br />
You can enable and disable CPU cores by writing to a sysfs value.<br />
<br><br />
This is helpful for when you want to experiment with the performance of your application if you were to use a processor with less CPU cores.<br />
<br />
For example, this command will disable the 2nd core.<br />
<br />
<code>$ echo 0 > /sys/devices/system/cpu/cpu1/online</code><br />
<br />
More detailed information can be found here: https://www.cyberciti.biz/faq/debian-rhel-centos-redhat-suse-hotplug-cpu<br />
<br />
<br />
= Power Saving =<br />
* In Linux, this is a mechanism that is generally supported by all kernels.(it may depend on the version) <br />
* The Renesas kernel has support them. <br />
<br />
About power consumption in RZ/G2 series, we have some supported features to save power cost in default environment: <br />
* CPUHotplug: Turn on/off CPU in runtime. <br />
* CPUIdle: Support 2 modes to turn off clock or power domain of CPU when CPU is idle (nothing to do). <br />
** Sleep mode: put in sleep state. <br />
** Core standby mode: put in shutdown state. It is described in devicetree of each SoC => It has deeper state than sleep mode so that save more power. <br />
* CPUFreq: there are 6 governors to support "Dynamic Frequency Scaling": <br />
** '''Performance''': The frequency is always set maximum => It is using as default in our current environment. <br />
** '''Powersave''': The frequency is always set minimum. <br />
** '''Ondemand''': If CPU load is bigger than 95%, the frequency is set max. If CPU load is equal to or less than 95%, the frequency is set based on CPU load. <br />
** Conservative: If CPU load is bigger than 80%, the frequency is set one level higher than current frequency. If CPU load is equal to or less than 20%, the frequency is set one level lower than current frequency. <br />
** '''Userspace''': It sets frequency which is defined by user in runtime. <br />
** '''Schedutil''': Schedutil governor is driven by scheduler. It uses scheduler-provided CPU utilization information as input for making its decisions by formula: freq_next= 1.25 * freq_max* util_of_CPU. <br />
* Power Domain: it is supported as default by Linux Power Management Framework. If a module is not use, system will disable its clock and power domain automatically. <br />
<br />
Therefore, select proper method will be based on user's purpose. Here are my examples: <br />
* Want to use with best performance: disable CPUIdle + use performance frequency governor. <br />
* Want to use less power: enable CPUIdle + use powersave frequency governor. <br />
* Want to balance performance and power: we can use schedutil. <br />
* Want to modify frequency as user's purpose: use userspance frequency governor. <br />
* If user is running realtime environment, I suggest using performance governor to ensure the minimum latency. <br />
Here are some commands to check frequency value and frequency governor in linux: <br />
* Check available CPU frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_frequencies </code><br />
* Check available CPU frequency governor:<br />
: <code>cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_governors </code><br />
* Change to other governor:<br />
: <code>echo performance > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor (performance/userspace/schedutil/...) </code><br />
* Check current frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq</code><br />
<br />
= PMIC Access from Linux =<br />
The easiest way to access the PMIC registers from command line would would be to use i2ctools. Add the following line to your local.conf.<br />
: <code>IMAGE_INSTALL_append = " i2c-tools"</code><br />
<br />
However the PMICs are connected to a I2C (IIC for PMIC or I2C_DVFS) that is not enabled in the default kernel device tree.<br />
For the HiHope boards, you can edit the file <code>arch/arm64/boot/dts/renesas/hihope-common.dtsi</code> and add the following lines at the very bottom of the file.<br />
<pre><br />
&i2c_dvfs {<br />
status = "okay";<br />
};<br />
</pre><br />
<br />
Once booted in Linux, the corresponding device should be /dev/i2c-7 <br />
<br />
You can query the connected slaves by giving the following command: <br />
: <code> i2cdetect -y -r 7 </code><br />
that on the RZ/G2E board produces the output: <br />
<pre>0 1 2 3 4 5 6 7 8 9 a b c d e f <br />
00: -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1e 1f <br />
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
70: -- -- -- -- -- -- -- -- </pre><br />
So two slaves, at address 0x1e and 0x1f. <br />
Finally you can read registers by simply using the i2cget command, for example: <br />
<pre><br />
i2cget -y 7 0x1e 0x1 <br />
0x02 <br />
i2cget -y 7 0x1e 0x16 <br />
0x00 <br />
i2cget -y 7 0x1e 0x17 <br />
0xc4 <br />
</pre><br />
<br />
If you don't want (or can't) update the device tree blob, you could use u-boot to do it temporarily.<br />
The procedure below is valid for RZ/G2M but it works also with RZ/G2E-N-H by simply modifying the device tree blob and/or kernel image names. <br />
<br />
1) Interrupt the normal kernel boot<br />
<br />
2) Once in u-boot, enter the follow commands (after each RESET)<br />
<pre>=> fatload mmc 0:1 0x48080000 Image; fatload mmc 0:1 0x48000000 Image-r8a774a1-hihope-rzg2m-ex.dtb; <br />
=> fdt addr 0x48000000 <br />
=> fdt set /soc/i2c@e60b0000 status "okay"</pre><br />
and finally boot the kernel: <br />
<pre>=> booti 0x48080000 - 0x48000000 </pre><br />
<br />
= Create a uImage =<br />
In the kernel, there is no make target to make a uImage for the 64-bit ARM architecture like there is for 32-bit ARM.<br />
However, you can manually make one from the file Image.gz that is created by the kernel build system by using the following command on your host machine.<br />
<pre><br />
$ cd arch/arm64/boot<br />
$ mkimage -A arm64 -O linux -T kernel -C gzip -a 0x48080000 -e 0x48080000 -n "Linux Kernel Image" -d Image.gz uImage<br />
</pre><br />
<br />
Below is an example of booting this image on a RZ/G2 HiHiope board from u-boot.<br />
<pre><br />
=> fatload mmc 0:1 0x88000000 uImage<br />
=> fatload mmc 0:1 0x48000000 Image-r8a774e1-hihope-rzg2h-ex.dtb<br />
=> bootm 0x88000000 - 0x48000000<br />
</pre><br />
<br />
= Building mainline / LTS Linux kernel for RZ/G2E-N-M-H =<br />
The Verified Linux Package (VLP) includes the CIP kernel (v4.19.x) and this is the only official way to build a kernel that has all the features in. However it is possible to build a working kernel directly from mainline. The kernel built in this way does not provide most of the multimedia functionalities (e.g. GPU, codec, etc). <br />
<br />
A recent [https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads Linaro toolchain] is needed to build the kernel. The instructions below are for v5.10.x, newer kernel versions can be built as well in a similar way.<br />
git clone <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/</nowiki><br />
<br />
git checkout tags/v5.10.42<br />
or anyway the latest minor revision including bug fixes.<br />
<br />
Copy Renesas default kernel build into .out/.config:<br />
cp arch/arm64/configs/renesas_defconfig .out/.config<br />
or, if not present, get from the repository:<br />
wget -O .out/.config <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/plain/arch/arm64/configs/renesas_defconfig</nowiki><br />
If you want to be able to build modules:<br />
echo CONFIG_MODULES=y >> .out/.config<br />
<br />
echo CONFIG_MODULE_UNLOAD=y >> .out/.config<br />
Run kernel configuration:<br />
make O=.out menuconfig<br />
Exit and save. Then launch the build:<br />
make O=.out all -j$(nproc)<br />
<br />
= Renesas RZ/G2 PCIe Endpoint Driver =<br />
* [[RZ-G/RZG2_pcie_ep | Click Here]]<br />
<br />
= GPIO Pin Usage =<br />
Since linux-4.8 the GPIO sysfs interface is [https://www.kernel.org/doc/Documentation/gpio/sysfs.txt deprecated]. User space should use the character device instead. The libgpiod library encapsulates the ioctl calls and data structures behind a straightforward API.<br />
<br />
Also, the kernel source code contains a GPIO utility for user space. Please see directory tools/gpio/ in the kernel source code.<br />
<br />
== GPIO Programming ==<br />
=== Character device – user API (linux/gpio.h) : ===<br />
The linux kernel is distributed with three basic user-mode tools written for testing the GPIO interface. The source can be found in linux/tools/gpio/.<br />
The three tools are: <br><br />
1) lsgpio – example on how to list the GPIO lines on a system<br><br />
2) gpio-event-mon – monitor GPIO line events from userspace<br><br />
3) gpio-hammer - example to shake GPIO lines on a system<br><br />
* Note:These are useful for debugging GPIO lines, but none of these tools will allow the user to configure, set and clear GPIO lines.<br><br />
However, you can use user API (chip info, line info, line request for values, reading values, setting values, line request for events, polling for events annd reading events) from linux/gpio.h to program GPIO. <br><br />
* GPIO pin number for RZ/G2M/H/N/E is determined by using lsgpio:<br />
<pre><br />
GPIO chip: gpiochip6, "e6055400.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
GPIO chip: gpiochip5, "e6055000.gpio", 20 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 19: unnamed unused [output]<br />
GPIO chip: gpiochip4, "e6054000.gpio", 11 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 10: unnamed unused<br />
GPIO chip: gpiochip3, "e6053000.gpio", 16 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 15: unnamed unused<br />
GPIO chip: gpiochip2, "e6052000.gpio", 26 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 25: unnamed "wlan-en-regulator" [kernel output]<br />
GPIO chip: gpiochip1, "e6051000.gpio", 23 GPIO lines<br />
line 0: unnamed "interrupt" [kernel]<br />
....<br />
....<br />
line 22: unnamed unused<br />
GPIO chip: gpiochip0, "e6050000.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
</pre><br />
To access LED0, which is defined as GPIO5-19, you will use gpiochip5 chip and line 19.<br><br />
* RZ/G2L: Check board schematic to know the index of a pin (example P0_0, P43_0, ...). Then you will know the index of GPIO under Px_y (x: port number, y: pin number) is (8*x + y). Example P0_0 is 0, P5_1 is 41(8*5+1).<br><br />
<pre><br />
GPIO chip: gpiochip0, "11030000.pin-controller", 392 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 390: unnamed unused<br />
line 391: unnamed unused<br />
</pre><br />
* Example: To access, P43_1, you need to use, gpiochip0 and line 345 (43*8 + 1)<br><br />
* [[Media:gpio_led_linux.zip| Sample Code]] to blink LED0(GPIO5-19) RZG2E RevC using linux/gpio.h API<br />
* Note: To run, download the source code. You also need to install the yocto SDK for RZG2E Rev C<br><br />
<pre><br />
$ source /opt/poky/2.4.3/environment-setup-aarch64-poky-linux<br />
$ make<br />
</pre><br />
=== libgpiod – C library & tools for GPIO chardev : ===<br />
C library and tools for interacting the linux GPIO character device. <br><br />
* Build: To use libgpiod in RZ-G, in yocto, add the recipe to image, this can be done in local.conf with <br />
<pre>IMAGE_INSTALL_append = “ libgpiod libgpiod-tools” </pre><br />
* Command Line Tools:<br><br />
1) gpiodetect: to find out which GPIO banks and how many GPIO lines are available on the hardware<br><br />
*Ex: for RZG2E:<br />
<pre><br />
root@ek874:~# gpiodetect<br />
gpiochip6 [e6055400.gpio] (18 lines)<br />
gpiochip5 [e6055000.gpio] (20 lines)<br />
gpiochip4 [e6054000.gpio] (11 lines)<br />
gpiochip3 [e6053000.gpio] (16 lines)<br />
gpiochip2 [e6052000.gpio] (26 lines)<br />
gpiochip1 [e6051000.gpio] (23 lines)<br />
gpiochip0 [e6050000.gpio] (18 lines)<br />
</pre><br />
* In case of RZG2E, you have 7 char devices, seven GPIO banks<br />
2) gpioinfo: list all lines of specified gpiochips, their names, direction, active state and additional flags<br><br />
<pre><br />
gpiochip1 - 23 lines:<br />
line 0: unnamed "interrupt" input active-high [kernel]<br />
line 1: unnamed "interrupt" input active-high [kernel]<br />
....<br />
.... <br />
line 22: unnamed unused input active-high <br />
gpiochip0 - 18 lines:<br />
line 0: unnamed unused input active-high <br />
line 1: unnamed unused input active-high <br />
....<br />
....<br />
line 17: unnamed unused input active-high<br />
</pre><br />
3) gpiofind: find the gpiochip name and line offset given the line name. For RZ/G, we do not have pin name export in driver, so we can not use pin name to find the pin line. <br><br />
4) gpioset: set the values of specified GPIO lines. gpioset expects the bank, gpiochip, GPIO line and the value to be set, 1 for HIGH and 0 for LOW active-high standard<br><br />
*Ex: To set the line 3 of gpiochip5 to 1<br />
<pre>root@ek874:~# gpioset gpiochip5 3=1</pre><br />
*Note: gpioset (and all libgpiod apps) will revert the state of a GPIO line back to its original value when it exits. For this reason if you want the state to persist you need to instruct gpioset to wait for a signal and optionally detach and run in the background.<br><br />
<pre>root@ek874:~# gpioset --mode=signal --background gpiochip5 19=1</pre><br />
5) gpioget: read values of specified GPIO lines<br><br />
*Ex: read line 10 of gpiochip6<br />
<pre>root@ek874:~# gpioget gpiochip6 10</pre><br />
* [[Media:gpio_led_libgpiod.zip| Sample Code]] using PMOD Module(https://store.digilentinc.com/pmod-led-four-high-brightness-leds/) and RZG2L<br />
* Note: To run, download the source code. You also need to install the yocto SDK for RZG2L <br><br />
* [[Media:gpio_led_libgpiod.zip| Sample Code]] to blink LED0(GPIO5-19) RZG2E RevC using libgpiod API<br />
* Note: To run, download the source code. You also need to install the yocto SDK for RZG2E Rev C<br><br />
<pre><br />
$ source /opt/poky/2.4.3/environment-setup-aarch64-poky-linux<br />
$ make<br />
</pre><br />
=== Using sysfs interface : ===<br />
GPIO pin number for RZ/G2M/H/N/E is determined by:<br />
* GPIO_ID = GPIO Bank Address + Pin Number <br />
<pre><br />
RZ/G2E RZ/G2M/N/H<br />
GPIO Bank Address GPIO Bank Address<br />
GPIO 0 494 GPIO 0 496 <br />
GPIO 1 471 GPIO 1 467<br />
GPIO 2 445 GPIO 2 452 <br />
GPIO 3 429 GPIO 3 436<br />
GPIO 4 418 GPIO 4 418<br />
GPIO 5 398 GPIO 5 392<br />
GPIO 6 380 GPIO 6 360<br />
GPIO 7 356<br />
</pre><br />
Example:<br><br />
*For RZ/G2E, GPIO number of GP5_19 is 398 + 19 = 417<br />
*Example: Turn on/off LED0 GP5_19 => gpio417 on RZ/G2E (Rev C) board<br><br />
NOTE: GP5_19 is defined as a GPIO LED0 in Device Tree. So you<br />
need to either remove that from the Device Tree and reprogram the board, or <br><br />
you can remove it from device tree in uboot using fdt command. Below is the example using fdt<br />
<pre><br />
=> setenv gpioLED_1=fatload mmc 0:1 0x48080000 Image-ek874.bin; fatload mmc 0:1 0x48000000 Image-r8a774c0-ek874-revc-mipi-2.1.dtb<br />
=> setenv gpioLED_2=fdt addr 0x48000000 ; fdt rm /leds<br />
=> setenv gpioLED_3=booti 0x48080000 - 0x48000000<br />
=> setenv gpioLED_boot=run gpioLED_1 gpioLED_2 gpioLED_3<br />
=> setenv<br />
Then run the command to boot<br />
=> run gpioLED_boot<br />
</pre><br />
Now, lets turn on/off switch using sysfs:<br />
<pre><br />
root@ek874:~# echo 417 > /sys/class/gpio/export # request gpio417<br />
root@ek874:~# echo out > /sys/class/gpio/gpio417/direction # set gpio417 (GP5_19) output<br />
root@ek874:~# echo 1 > /sys/class/gpio/gpio417/value # turn ON LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
1<br />
root@ek874:~# echo 0 > /sys/class/gpio/gpio417/value # turn OFF LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
0<br />
</pre><br />
RZ/G2L Pin Decode :<br />
GPIO pin number is determined by formula:<br />
* GPIO_ID = GPIO_port * 8 + GPIO_pin + 120<br />
Example:<br />
P42_4 has its id 460 with above formula (42 * 8 + 4 + 120).<br />
* Example GPIO input function by using PMOD slide switch https://digilent.com/shop/pmod-swt-4-user-slide-switches/<br />
<pre><br />
root@smarc-rzg2l:~# echo 460 > /sys/class/gpio/export<br />
root@smarc-rzg2l:~# echo in > /sys/class/gpio/gpio460/direction <br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value <br />
1<br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value # after switch off<br />
0<br />
</pre></div>Padhikarihttps://renesas.info/w/index.php?title=File:gpio_led_libgpiod_rzg2l.zip&diff=1068File:gpio led libgpiod rzg2l.zip2022-02-24T02:09:35Z<p>Padhikari: </p>
<hr />
<div></div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_kernel&diff=1019RZ-G/RZG kernel2022-02-03T20:46:12Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G kernel Information}}<br />
← [[RZ-G]]<br />
<br />
= CPU Hotplug =<br />
You can enable and disable CPU cores by writing to a sysfs value.<br />
<br><br />
This is helpful for when you want to experiment with the performance of your application if you were to use a processor with less CPU cores.<br />
<br />
For example, this command will disable the 2nd core.<br />
<br />
<code>$ echo 0 > /sys/devices/system/cpu/cpu1/online</code><br />
<br />
More detailed information can be found here: https://www.cyberciti.biz/faq/debian-rhel-centos-redhat-suse-hotplug-cpu<br />
<br />
<br />
= Power Saving =<br />
* In Linux, this is a mechanism that is generally supported by all kernels.(it may depend on the version) <br />
* The Renesas kernel has support them. <br />
<br />
About power consumption in RZ/G2 series, we have some supported features to save power cost in default environment: <br />
* CPUHotplug: Turn on/off CPU in runtime. <br />
* CPUIdle: Support 2 modes to turn off clock or power domain of CPU when CPU is idle (nothing to do). <br />
** Sleep mode: put in sleep state. <br />
** Core standby mode: put in shutdown state. It is described in devicetree of each SoC => It has deeper state than sleep mode so that save more power. <br />
* CPUFreq: there are 6 governors to support "Dynamic Frequency Scaling": <br />
** '''Performance''': The frequency is always set maximum => It is using as default in our current environment. <br />
** '''Powersave''': The frequency is always set minimum. <br />
** '''Ondemand''': If CPU load is bigger than 95%, the frequency is set max. If CPU load is equal to or less than 95%, the frequency is set based on CPU load. <br />
** Conservative: If CPU load is bigger than 80%, the frequency is set one level higher than current frequency. If CPU load is equal to or less than 20%, the frequency is set one level lower than current frequency. <br />
** '''Userspace''': It sets frequency which is defined by user in runtime. <br />
** '''Schedutil''': Schedutil governor is driven by scheduler. It uses scheduler-provided CPU utilization information as input for making its decisions by formula: freq_next= 1.25 * freq_max* util_of_CPU. <br />
* Power Domain: it is supported as default by Linux Power Management Framework. If a module is not use, system will disable its clock and power domain automatically. <br />
<br />
Therefore, select proper method will be based on user's purpose. Here are my examples: <br />
* Want to use with best performance: disable CPUIdle + use performance frequency governor. <br />
* Want to use less power: enable CPUIdle + use powersave frequency governor. <br />
* Want to balance performance and power: we can use schedutil. <br />
* Want to modify frequency as user's purpose: use userspance frequency governor. <br />
* If user is running realtime environment, I suggest using performance governor to ensure the minimum latency. <br />
Here are some commands to check frequency value and frequency governor in linux: <br />
* Check available CPU frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_frequencies </code><br />
* Check available CPU frequency governor:<br />
: <code>cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_governors </code><br />
* Change to other governor:<br />
: <code>echo performance > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor (performance/userspace/schedutil/...) </code><br />
* Check current frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq</code><br />
<br />
= PMIC Access from Linux =<br />
The easiest way to access the PMIC registers from command line would would be to use i2ctools. Add the following line to your local.conf.<br />
: <code>IMAGE_INSTALL_append = " i2c-tools"</code><br />
<br />
However the PMICs are connected to a I2C (IIC for PMIC or I2C_DVFS) that is not enabled in the default kernel device tree.<br />
For the HiHope boards, you can edit the file <code>arch/arm64/boot/dts/renesas/hihope-common.dtsi</code> and add the following lines at the very bottom of the file.<br />
<pre><br />
&i2c_dvfs {<br />
status = "okay";<br />
};<br />
</pre><br />
<br />
Once booted in Linux, the corresponding device should be /dev/i2c-7 <br />
<br />
You can query the connected slaves by giving the following command: <br />
: <code> i2cdetect -y -r 7 </code><br />
that on the RZ/G2E board produces the output: <br />
<pre>0 1 2 3 4 5 6 7 8 9 a b c d e f <br />
00: -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1e 1f <br />
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
70: -- -- -- -- -- -- -- -- </pre><br />
So two slaves, at address 0x1e and 0x1f. <br />
Finally you can read registers by simply using the i2cget command, for example: <br />
<pre><br />
i2cget -y 7 0x1e 0x1 <br />
0x02 <br />
i2cget -y 7 0x1e 0x16 <br />
0x00 <br />
i2cget -y 7 0x1e 0x17 <br />
0xc4 <br />
</pre><br />
<br />
If you don't want (or can't) update the device tree blob, you could use u-boot to do it temporarily.<br />
The procedure below is valid for RZ/G2M but it works also with RZ/G2E-N-H by simply modifying the device tree blob and/or kernel image names. <br />
<br />
1) Interrupt the normal kernel boot<br />
<br />
2) Once in u-boot, enter the follow commands (after each RESET)<br />
<pre>=> fatload mmc 0:1 0x48080000 Image; fatload mmc 0:1 0x48000000 Image-r8a774a1-hihope-rzg2m-ex.dtb; <br />
=> fdt addr 0x48000000 <br />
=> fdt set /soc/i2c@e60b0000 status "okay"</pre><br />
and finally boot the kernel: <br />
<pre>=> booti 0x48080000 - 0x48000000 </pre><br />
<br />
= Create a uImage =<br />
In the kernel, there is no make target to make a uImage for the 64-bit ARM architecture like there is for 32-bit ARM.<br />
However, you can manually make one from the file Image.gz that is created by the kernel build system by using the following command on your host machine.<br />
<pre><br />
$ cd arch/arm64/boot<br />
$ mkimage -A arm64 -O linux -T kernel -C gzip -a 0x48080000 -e 0x48080000 -n "Linux Kernel Image" -d Image.gz uImage<br />
</pre><br />
<br />
Below is an example of booting this image on a RZ/G2 HiHiope board from u-boot.<br />
<pre><br />
=> fatload mmc 0:1 0x88000000 uImage<br />
=> fatload mmc 0:1 0x48000000 Image-r8a774e1-hihope-rzg2h-ex.dtb<br />
=> bootm 0x88000000 - 0x48000000<br />
</pre><br />
<br />
= Building mainline / LTS Linux kernel for RZ/G2E-N-M-H =<br />
The Verified Linux Package (VLP) includes the CIP kernel (v4.19.x) and this is the only official way to build a kernel that has all the features in. However it is possible to build a working kernel directly from mainline. The kernel built in this way does not provide most of the multimedia functionalities (e.g. GPU, codec, etc). <br />
<br />
A recent [https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads Linaro toolchain] is needed to build the kernel. The instructions below are for v5.10.x, newer kernel versions can be built as well in a similar way.<br />
git clone <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/</nowiki><br />
<br />
git checkout tags/v5.10.42<br />
or anyway the latest minor revision including bug fixes.<br />
<br />
Copy Renesas default kernel build into .out/.config:<br />
cp arch/arm64/configs/renesas_defconfig .out/.config<br />
or, if not present, get from the repository:<br />
wget -O .out/.config <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/plain/arch/arm64/configs/renesas_defconfig</nowiki><br />
If you want to be able to build modules:<br />
echo CONFIG_MODULES=y >> .out/.config<br />
<br />
echo CONFIG_MODULE_UNLOAD=y >> .out/.config<br />
Run kernel configuration:<br />
make O=.out menuconfig<br />
Exit and save. Then launch the build:<br />
make O=.out all -j$(nproc)<br />
<br />
= Renesas RZ/G2 PCIe Endpoint Driver =<br />
* [[RZ-G/RZG2_pcie_ep | Click Here]]<br />
<br />
= GPIO Pin Usage =<br />
Since linux-4.8 the GPIO sysfs interface is [https://www.kernel.org/doc/Documentation/gpio/sysfs.txt deprecated]. User space should use the character device instead. The libgpiod library encapsulates the ioctl calls and data structures behind a straightforward API.<br />
<br />
Also, the kernel source code contains a GPIO utility for user space. Please see directory tools/gpio/ in the kernel source code.<br />
<br />
== GPIO Programming ==<br />
=== Character device – user API (linux/gpio.h) : ===<br />
The linux kernel is distributed with three basic user-mode tools written for testing the GPIO interface. The source can be found in linux/tools/gpio/.<br />
The three tools are: <br><br />
1) lsgpio – example on how to list the GPIO lines on a system<br><br />
2) gpio-event-mon – monitor GPIO line events from userspace<br><br />
3) gpio-hammer - example to shake GPIO lines on a system<br><br />
* Note:These are useful for debugging GPIO lines, but none of these tools will allow the user to configure, set and clear GPIO lines.<br><br />
However, you can use user API (chip info, line info, line request for values, reading values, setting values, line request for events, polling for events annd reading events) from linux/gpio.h to program GPIO. <br><br />
* GPIO pin number for RZ/G2M/H/N/E is determined by using lsgpio:<br />
<pre><br />
GPIO chip: gpiochip6, "e6055400.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
GPIO chip: gpiochip5, "e6055000.gpio", 20 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 19: unnamed unused [output]<br />
GPIO chip: gpiochip4, "e6054000.gpio", 11 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 10: unnamed unused<br />
GPIO chip: gpiochip3, "e6053000.gpio", 16 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 15: unnamed unused<br />
GPIO chip: gpiochip2, "e6052000.gpio", 26 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 25: unnamed "wlan-en-regulator" [kernel output]<br />
GPIO chip: gpiochip1, "e6051000.gpio", 23 GPIO lines<br />
line 0: unnamed "interrupt" [kernel]<br />
....<br />
....<br />
line 22: unnamed unused<br />
GPIO chip: gpiochip0, "e6050000.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
</pre><br />
To access LED0, which is defined as GPIO5-19, you will use gpiochip5 chip and line 19.<br><br />
* RZ/G2L: Check board schematic to know the index of a pin (example P0_0, P43_0, ...). Then you will know the index of GPIO under Px_y (x: port number, y: pin number) is (8*x + y). Example P0_0 is 0, P5_1 is 41(8*5+1).<br><br />
<pre><br />
GPIO chip: gpiochip0, "11030000.pin-controller", 392 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 390: unnamed unused<br />
line 391: unnamed unused<br />
</pre><br />
* Example: To access, P43_1, you need to use, gpiochip0 and line 345 (43*8 + 1)<br><br />
* [[Media:gpio_led_linux.zip| Sample Code]] to blink LED0(GPIO5-19) RZG2E RevC using linux/gpio.h API<br />
* Note: To run, download the source code. You also need to install the yocto SDK for RZG2E Rev C<br><br />
<pre><br />
$ source /opt/poky/2.4.3/environment-setup-aarch64-poky-linux<br />
$ make<br />
</pre><br />
=== libgpiod – C library & tools for GPIO chardev : ===<br />
C library and tools for interacting the linux GPIO character device. <br><br />
* Build: To use libgpiod in RZ-G, in yocto, add the recipe to image, this can be done in local.conf with <br />
<pre>IMAGE_INSTALL_append = “ libgpiod libgpiod-tools” </pre><br />
* Command Line Tools:<br><br />
1) gpiodetect: to find out which GPIO banks and how many GPIO lines are available on the hardware<br><br />
*Ex: for RZG2E:<br />
<pre><br />
root@ek874:~# gpiodetect<br />
gpiochip6 [e6055400.gpio] (18 lines)<br />
gpiochip5 [e6055000.gpio] (20 lines)<br />
gpiochip4 [e6054000.gpio] (11 lines)<br />
gpiochip3 [e6053000.gpio] (16 lines)<br />
gpiochip2 [e6052000.gpio] (26 lines)<br />
gpiochip1 [e6051000.gpio] (23 lines)<br />
gpiochip0 [e6050000.gpio] (18 lines)<br />
</pre><br />
* In case of RZG2E, you have 7 char devices, seven GPIO banks<br />
2) gpioinfo: list all lines of specified gpiochips, their names, direction, active state and additional flags<br><br />
<pre><br />
gpiochip1 - 23 lines:<br />
line 0: unnamed "interrupt" input active-high [kernel]<br />
line 1: unnamed "interrupt" input active-high [kernel]<br />
....<br />
.... <br />
line 22: unnamed unused input active-high <br />
gpiochip0 - 18 lines:<br />
line 0: unnamed unused input active-high <br />
line 1: unnamed unused input active-high <br />
....<br />
....<br />
line 17: unnamed unused input active-high<br />
</pre><br />
3) gpiofind: find the gpiochip name and line offset given the line name. For RZ/G, we do not have pin name export in driver, so we can not use pin name to find the pin line. <br><br />
4) gpioset: set the values of specified GPIO lines. gpioset expects the bank, gpiochip, GPIO line and the value to be set, 1 for HIGH and 0 for LOW active-high standard<br><br />
*Ex: To set the line 3 of gpiochip5 to 1<br />
<pre>root@ek874:~# gpioset gpiochip5 3=1</pre><br />
*Note: gpioset (and all libgpiod apps) will revert the state of a GPIO line back to its original value when it exits. For this reason if you want the state to persist you need to instruct gpioset to wait for a signal and optionally detach and run in the background.<br><br />
<pre>root@ek874:~# gpioset --mode=signal --background gpiochip5 19=1</pre><br />
5) gpioget: read values of specified GPIO lines<br><br />
*Ex: read line 10 of gpiochip6<br />
<pre>root@ek874:~# gpioget gpiochip6 10</pre><br />
* [[Media:gpio_led_libgpiod.zip| Sample Code]] to blink LED0(GPIO5-19) RZG2E RevC using libgpiod API<br />
* Note: To run, download the source code. You also need to install the yocto SDK for RZG2E Rev C<br><br />
<pre><br />
$ source /opt/poky/2.4.3/environment-setup-aarch64-poky-linux<br />
$ make<br />
</pre><br />
=== Using sysfs interface : ===<br />
GPIO pin number for RZ/G2M/H/N/E is determined by:<br />
* GPIO_ID = GPIO Bank Address + Pin Number <br />
<pre><br />
RZ/G2E RZ/G2M/N/H<br />
GPIO Bank Address GPIO Bank Address<br />
GPIO 0 494 GPIO 0 496 <br />
GPIO 1 471 GPIO 1 467<br />
GPIO 2 445 GPIO 2 452 <br />
GPIO 3 429 GPIO 3 436<br />
GPIO 4 418 GPIO 4 418<br />
GPIO 5 398 GPIO 5 392<br />
GPIO 6 380 GPIO 6 360<br />
GPIO 7 356<br />
</pre><br />
Example:<br><br />
*For RZ/G2E, GPIO number of GP5_19 is 398 + 19 = 417<br />
*Example: Turn on/off LED0 GP5_19 => gpio417 on RZ/G2E (Rev C) board<br><br />
NOTE: GP5_19 is defined as a GPIO LED0 in Device Tree. So you<br />
need to either remove that from the Device Tree and reprogram the board, or <br><br />
you can remove it from device tree in uboot using fdt command. Below is the example using fdt<br />
<pre><br />
=> setenv gpioLED_1=fatload mmc 0:1 0x48080000 Image-ek874.bin; fatload mmc 0:1 0x48000000 Image-r8a774c0-ek874-revc-mipi-2.1.dtb<br />
=> setenv gpioLED_2=fdt addr 0x48000000 ; fdt rm /leds<br />
=> setenv gpioLED_3=booti 0x48080000 - 0x48000000<br />
=> setenv gpioLED_boot=run gpioLED_1 gpioLED_2 gpioLED_3<br />
=> setenv<br />
Then run the command to boot<br />
=> run gpioLED_boot<br />
</pre><br />
Now, lets turn on/off switch using sysfs:<br />
<pre><br />
root@ek874:~# echo 417 > /sys/class/gpio/export # request gpio417<br />
root@ek874:~# echo out > /sys/class/gpio/gpio417/direction # set gpio417 (GP5_19) output<br />
root@ek874:~# echo 1 > /sys/class/gpio/gpio417/value # turn ON LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
1<br />
root@ek874:~# echo 0 > /sys/class/gpio/gpio417/value # turn OFF LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
0<br />
</pre><br />
RZ/G2L Pin Decode :<br />
GPIO pin number is determined by formula:<br />
* GPIO_ID = GPIO_port * 8 + GPIO_pin + 120<br />
Example:<br />
P42_4 has its id 460 with above formula (42 * 8 + 4 + 120).<br />
* Example GPIO input function by using PMOD slide switch https://digilent.com/shop/pmod-swt-4-user-slide-switches/<br />
<pre><br />
root@smarc-rzg2l:~# echo 460 > /sys/class/gpio/export<br />
root@smarc-rzg2l:~# echo in > /sys/class/gpio/gpio460/direction <br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value <br />
1<br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value # after switch off<br />
0<br />
</pre></div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_kernel&diff=1018RZ-G/RZG kernel2022-02-03T20:44:25Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G kernel Information}}<br />
← [[RZ-G]]<br />
<br />
= CPU Hotplug =<br />
You can enable and disable CPU cores by writing to a sysfs value.<br />
<br><br />
This is helpful for when you want to experiment with the performance of your application if you were to use a processor with less CPU cores.<br />
<br />
For example, this command will disable the 2nd core.<br />
<br />
<code>$ echo 0 > /sys/devices/system/cpu/cpu1/online</code><br />
<br />
More detailed information can be found here: https://www.cyberciti.biz/faq/debian-rhel-centos-redhat-suse-hotplug-cpu<br />
<br />
<br />
= Power Saving =<br />
* In Linux, this is a mechanism that is generally supported by all kernels.(it may depend on the version) <br />
* The Renesas kernel has support them. <br />
<br />
About power consumption in RZ/G2 series, we have some supported features to save power cost in default environment: <br />
* CPUHotplug: Turn on/off CPU in runtime. <br />
* CPUIdle: Support 2 modes to turn off clock or power domain of CPU when CPU is idle (nothing to do). <br />
** Sleep mode: put in sleep state. <br />
** Core standby mode: put in shutdown state. It is described in devicetree of each SoC => It has deeper state than sleep mode so that save more power. <br />
* CPUFreq: there are 6 governors to support "Dynamic Frequency Scaling": <br />
** '''Performance''': The frequency is always set maximum => It is using as default in our current environment. <br />
** '''Powersave''': The frequency is always set minimum. <br />
** '''Ondemand''': If CPU load is bigger than 95%, the frequency is set max. If CPU load is equal to or less than 95%, the frequency is set based on CPU load. <br />
** Conservative: If CPU load is bigger than 80%, the frequency is set one level higher than current frequency. If CPU load is equal to or less than 20%, the frequency is set one level lower than current frequency. <br />
** '''Userspace''': It sets frequency which is defined by user in runtime. <br />
** '''Schedutil''': Schedutil governor is driven by scheduler. It uses scheduler-provided CPU utilization information as input for making its decisions by formula: freq_next= 1.25 * freq_max* util_of_CPU. <br />
* Power Domain: it is supported as default by Linux Power Management Framework. If a module is not use, system will disable its clock and power domain automatically. <br />
<br />
Therefore, select proper method will be based on user's purpose. Here are my examples: <br />
* Want to use with best performance: disable CPUIdle + use performance frequency governor. <br />
* Want to use less power: enable CPUIdle + use powersave frequency governor. <br />
* Want to balance performance and power: we can use schedutil. <br />
* Want to modify frequency as user's purpose: use userspance frequency governor. <br />
* If user is running realtime environment, I suggest using performance governor to ensure the minimum latency. <br />
Here are some commands to check frequency value and frequency governor in linux: <br />
* Check available CPU frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_frequencies </code><br />
* Check available CPU frequency governor:<br />
: <code>cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_governors </code><br />
* Change to other governor:<br />
: <code>echo performance > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor (performance/userspace/schedutil/...) </code><br />
* Check current frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq</code><br />
<br />
= PMIC Access from Linux =<br />
The easiest way to access the PMIC registers from command line would would be to use i2ctools. Add the following line to your local.conf.<br />
: <code>IMAGE_INSTALL_append = " i2c-tools"</code><br />
<br />
However the PMICs are connected to a I2C (IIC for PMIC or I2C_DVFS) that is not enabled in the default kernel device tree.<br />
For the HiHope boards, you can edit the file <code>arch/arm64/boot/dts/renesas/hihope-common.dtsi</code> and add the following lines at the very bottom of the file.<br />
<pre><br />
&i2c_dvfs {<br />
status = "okay";<br />
};<br />
</pre><br />
<br />
Once booted in Linux, the corresponding device should be /dev/i2c-7 <br />
<br />
You can query the connected slaves by giving the following command: <br />
: <code> i2cdetect -y -r 7 </code><br />
that on the RZ/G2E board produces the output: <br />
<pre>0 1 2 3 4 5 6 7 8 9 a b c d e f <br />
00: -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1e 1f <br />
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
70: -- -- -- -- -- -- -- -- </pre><br />
So two slaves, at address 0x1e and 0x1f. <br />
Finally you can read registers by simply using the i2cget command, for example: <br />
<pre><br />
i2cget -y 7 0x1e 0x1 <br />
0x02 <br />
i2cget -y 7 0x1e 0x16 <br />
0x00 <br />
i2cget -y 7 0x1e 0x17 <br />
0xc4 <br />
</pre><br />
<br />
If you don't want (or can't) update the device tree blob, you could use u-boot to do it temporarily.<br />
The procedure below is valid for RZ/G2M but it works also with RZ/G2E-N-H by simply modifying the device tree blob and/or kernel image names. <br />
<br />
1) Interrupt the normal kernel boot<br />
<br />
2) Once in u-boot, enter the follow commands (after each RESET)<br />
<pre>=> fatload mmc 0:1 0x48080000 Image; fatload mmc 0:1 0x48000000 Image-r8a774a1-hihope-rzg2m-ex.dtb; <br />
=> fdt addr 0x48000000 <br />
=> fdt set /soc/i2c@e60b0000 status "okay"</pre><br />
and finally boot the kernel: <br />
<pre>=> booti 0x48080000 - 0x48000000 </pre><br />
<br />
= Create a uImage =<br />
In the kernel, there is no make target to make a uImage for the 64-bit ARM architecture like there is for 32-bit ARM.<br />
However, you can manually make one from the file Image.gz that is created by the kernel build system by using the following command on your host machine.<br />
<pre><br />
$ cd arch/arm64/boot<br />
$ mkimage -A arm64 -O linux -T kernel -C gzip -a 0x48080000 -e 0x48080000 -n "Linux Kernel Image" -d Image.gz uImage<br />
</pre><br />
<br />
Below is an example of booting this image on a RZ/G2 HiHiope board from u-boot.<br />
<pre><br />
=> fatload mmc 0:1 0x88000000 uImage<br />
=> fatload mmc 0:1 0x48000000 Image-r8a774e1-hihope-rzg2h-ex.dtb<br />
=> bootm 0x88000000 - 0x48000000<br />
</pre><br />
<br />
= Building mainline / LTS Linux kernel for RZ/G2E-N-M-H =<br />
The Verified Linux Package (VLP) includes the CIP kernel (v4.19.x) and this is the only official way to build a kernel that has all the features in. However it is possible to build a working kernel directly from mainline. The kernel built in this way does not provide most of the multimedia functionalities (e.g. GPU, codec, etc). <br />
<br />
A recent [https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads Linaro toolchain] is needed to build the kernel. The instructions below are for v5.10.x, newer kernel versions can be built as well in a similar way.<br />
git clone <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/</nowiki><br />
<br />
git checkout tags/v5.10.42<br />
or anyway the latest minor revision including bug fixes.<br />
<br />
Copy Renesas default kernel build into .out/.config:<br />
cp arch/arm64/configs/renesas_defconfig .out/.config<br />
or, if not present, get from the repository:<br />
wget -O .out/.config <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/plain/arch/arm64/configs/renesas_defconfig</nowiki><br />
If you want to be able to build modules:<br />
echo CONFIG_MODULES=y >> .out/.config<br />
<br />
echo CONFIG_MODULE_UNLOAD=y >> .out/.config<br />
Run kernel configuration:<br />
make O=.out menuconfig<br />
Exit and save. Then launch the build:<br />
make O=.out all -j$(nproc)<br />
<br />
= Renesas RZ/G2 PCIe Endpoint Driver =<br />
* [[RZ-G/RZG2_pcie_ep | Click Here]]<br />
<br />
= GPIO Pin Usage =<br />
Since linux-4.8 the GPIO sysfs interface is [https://www.kernel.org/doc/Documentation/gpio/sysfs.txt deprecated]. User space should use the character device instead. The libgpiod library encapsulates the ioctl calls and data structures behind a straightforward API.<br />
<br />
Also, the kernel source code contains a GPIO utility for user space. Please see directory tools/gpio/ in the kernel source code.<br />
<br />
== GPIO Programming ==<br />
=== Character device – user API (linux/gpio.h) : ===<br />
The linux kernel is distributed with three basic user-mode tools written for testing the GPIO interface. The source can be found in linux/tools/gpio/.<br />
The three tools are: <br><br />
1) lsgpio – example on how to list the GPIO lines on a system<br><br />
2) gpio-event-mon – monitor GPIO line events from userspace<br><br />
3) gpio-hammer- example to shake GPIO lines on a system<br><br />
* Note:These are useful for debugging GPIO lines, but none of these tools will allow the user to configure, set and clear GPIO lines.<br><br />
However, you can use user API (chip info, line info, line request for values, reading values, setting values, line request for events, polling for events annd reading events) from linux/gpio.h to program GPIO. <br><br />
* GPIO pin number for RZ/G2M/H/N/E is determined by using lsgpio:<br />
<pre><br />
GPIO chip: gpiochip6, "e6055400.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
GPIO chip: gpiochip5, "e6055000.gpio", 20 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 19: unnamed unused [output]<br />
GPIO chip: gpiochip4, "e6054000.gpio", 11 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 10: unnamed unused<br />
GPIO chip: gpiochip3, "e6053000.gpio", 16 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 15: unnamed unused<br />
GPIO chip: gpiochip2, "e6052000.gpio", 26 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 25: unnamed "wlan-en-regulator" [kernel output]<br />
GPIO chip: gpiochip1, "e6051000.gpio", 23 GPIO lines<br />
line 0: unnamed "interrupt" [kernel]<br />
....<br />
....<br />
line 22: unnamed unused<br />
GPIO chip: gpiochip0, "e6050000.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
</pre><br />
To access LED0, which is defined as GPIO5-19, you will use gpiochip5 chip and line 19.<br><br />
* RZ/G2L: Check board schematic to know the index of a pin (example P0_0, P43_0, ...). Then you will know the index of GPIO under Px_y (x: port number, y: pin number) is (8*x + y). Example P0_0 is 0, P5_1 is 41(8*5+1).<br><br />
<pre><br />
GPIO chip: gpiochip0, "11030000.pin-controller", 392 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 390: unnamed unused<br />
line 391: unnamed unused<br />
</pre><br />
* Example: To access, P43_1, you need to use, gpiochip0 and line 345 (43*8 + 1)<br><br />
* [[Media:gpio_led_linux.zip| Sample Code]] to blink LED0(GPIO5-19) RZG2E RevC using linux/gpio.h API<br />
* Note: To run, download the source code. You also need to install the yocto SDK for RZG2E Rev C<br><br />
<pre><br />
$ source /opt/poky/2.4.3/environment-setup-aarch64-poky-linux<br />
$ make<br />
</pre><br />
=== libgpiod – C library & tools for GPIO chardev : ===<br />
C library and tools for interacting the linux GPIO character device. <br><br />
* Build: To use libgpiod in RZ-G, in yocto, add the recipe to image, this can be done in local.conf with <br />
<pre>IMAGE_INSTALL_append = “ libgpiod libgpiod-tools” </pre><br />
* Command Line Tools:<br><br />
1) gpiodetect: to find out which GPIO banks and how many GPIO lines are available on the hardware<br><br />
*Ex: for RZG2E:<br />
<pre><br />
root@ek874:~# gpiodetect<br />
gpiochip6 [e6055400.gpio] (18 lines)<br />
gpiochip5 [e6055000.gpio] (20 lines)<br />
gpiochip4 [e6054000.gpio] (11 lines)<br />
gpiochip3 [e6053000.gpio] (16 lines)<br />
gpiochip2 [e6052000.gpio] (26 lines)<br />
gpiochip1 [e6051000.gpio] (23 lines)<br />
gpiochip0 [e6050000.gpio] (18 lines)<br />
</pre><br />
* In case of RZG2E, you have 7 char devices, seven GPIO banks<br />
2) gpioinfo:list all lines of specified gpiochips, their names, direction, active state and additional flags<br><br />
<pre><br />
gpiochip1 - 23 lines:<br />
line 0: unnamed "interrupt" input active-high [kernel]<br />
line 1: unnamed "interrupt" input active-high [kernel]<br />
....<br />
.... <br />
line 22: unnamed unused input active-high <br />
gpiochip0 - 18 lines:<br />
line 0: unnamed unused input active-high <br />
line 1: unnamed unused input active-high <br />
....<br />
....<br />
line 17: unnamed unused input active-high<br />
</pre><br />
3) gpiofind: find the gpiochip name and line offset given the line name. For RZ/G, we do not have pin name export in driver, so we can not use pin name to find the pin line. <br><br />
4) gpioset: set the values of specified GPIO lines. gpioset expects the bank, gpiochip, GPIO line and the value to be set, 1 for HIGH and 0 for LOW active-high standard<br><br />
*Ex: To set the line 3 of gpiochip5 to 1<br />
<pre>root@ek874:~# gpioset gpiochip5 3=1</pre><br />
*Note: gpioset (and all libgpiod apps) will revert the state of a GPIO line back to its original value when it exits. For this reason if you want the state to persist you need to instruct gpioset to wait for a signal and optionally detach and run in the background.<br><br />
<pre>root@ek874:~# gpioset --mode=signal --background gpiochip5 19=1</pre><br />
5)gpioget: read values of specified GPIO lines<br><br />
*Ex: read line 10 of gpiochip6<br />
<pre>root@ek874:~# gpioget gpiochip6 10</pre><br />
* [[Media:gpio_led_libgpiod.zip| Sample Code]] to blink LED0(GPIO5-19) RZG2E RevC using libgpiod API<br />
* Note: To run, download the source code. You also need to install the yocto SDK for RZG2E Rev C<br><br />
<pre><br />
$ source /opt/poky/2.4.3/environment-setup-aarch64-poky-linux<br />
$ make<br />
</pre><br />
=== Using sysfs interface : ===<br />
GPIO pin number for RZ/G2M/H/N/E is determined by:<br />
* GPIO_ID = GPIO Bank Address + Pin Number <br />
<pre><br />
RZ/G2E RZ/G2M/N/H<br />
GPIO Bank Address GPIO Bank Address<br />
GPIO 0 494 GPIO 0 496 <br />
GPIO 1 471 GPIO 1 467<br />
GPIO 2 445 GPIO 2 452 <br />
GPIO 3 429 GPIO 3 436<br />
GPIO 4 418 GPIO 4 418<br />
GPIO 5 398 GPIO 5 392<br />
GPIO 6 380 GPIO 6 360<br />
GPIO 7 356<br />
</pre><br />
Example:<br><br />
*For RZ/G2E, GPIO number of GP5_19 is 398 + 19 = 417<br />
*Example: Turn on/off LED0 GP5_19 => gpio417 on RZ/G2E (Rev C) board<br><br />
NOTE: GP5_19 is defined as a GPIO LED0 in Device Tree. So you<br />
need to either remove that from the Device Tree and reprogram the board, or <br><br />
you can remove it from device tree in uboot using fdt command. Below is the example using fdt<br />
<pre><br />
=> setenv gpioLED_1=fatload mmc 0:1 0x48080000 Image-ek874.bin; fatload mmc 0:1 0x48000000 Image-r8a774c0-ek874-revc-mipi-2.1.dtb<br />
=> setenv gpioLED_2=fdt addr 0x48000000 ; fdt rm /leds<br />
=> setenv gpioLED_3=booti 0x48080000 - 0x48000000<br />
=> setenv gpioLED_boot=run gpioLED_1 gpioLED_2 gpioLED_3<br />
=> setenv<br />
Then run the command to boot<br />
=> run gpioLED_boot<br />
</pre><br />
Now, lets turn on/off switch using sysfs:<br />
<pre><br />
root@ek874:~# echo 417 > /sys/class/gpio/export # request gpio417<br />
root@ek874:~# echo out > /sys/class/gpio/gpio417/direction # set gpio417 (GP5_19) output<br />
root@ek874:~# echo 1 > /sys/class/gpio/gpio417/value # turn ON LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
1<br />
root@ek874:~# echo 0 > /sys/class/gpio/gpio417/value # turn OFF LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
0<br />
</pre><br />
RZ/G2L Pin Decode :<br />
GPIO pin number is determined by formula:<br />
* GPIO_ID = GPIO_port * 8 + GPIO_pin + 120<br />
Example:<br />
P42_4 has its id 460 with above formula (42 * 8 + 4 + 120).<br />
* Example GPIO input function by using PMOD slide switch https://digilent.com/shop/pmod-swt-4-user-slide-switches/<br />
<pre><br />
root@smarc-rzg2l:~# echo 460 > /sys/class/gpio/export<br />
root@smarc-rzg2l:~# echo in > /sys/class/gpio/gpio460/direction <br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value <br />
1<br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value # after switch off<br />
0<br />
</pre></div>Padhikarihttps://renesas.info/w/index.php?title=File:gpio_led_libgpiod.zip&diff=1017File:gpio led libgpiod.zip2022-02-03T20:43:56Z<p>Padhikari: </p>
<hr />
<div></div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_kernel&diff=1016RZ-G/RZG kernel2022-02-03T20:17:30Z<p>Padhikari: /* Using libgpiod : */</p>
<hr />
<div>{{DISPLAYTITLE:RZ/G kernel Information}}<br />
← [[RZ-G]]<br />
<br />
= CPU Hotplug =<br />
You can enable and disable CPU cores by writing to a sysfs value.<br />
<br><br />
This is helpful for when you want to experiment with the performance of your application if you were to use a processor with less CPU cores.<br />
<br />
For example, this command will disable the 2nd core.<br />
<br />
<code>$ echo 0 > /sys/devices/system/cpu/cpu1/online</code><br />
<br />
More detailed information can be found here: https://www.cyberciti.biz/faq/debian-rhel-centos-redhat-suse-hotplug-cpu<br />
<br />
<br />
= Power Saving =<br />
* In Linux, this is a mechanism that is generally supported by all kernels.(it may depend on the version) <br />
* The Renesas kernel has support them. <br />
<br />
About power consumption in RZ/G2 series, we have some supported features to save power cost in default environment: <br />
* CPUHotplug: Turn on/off CPU in runtime. <br />
* CPUIdle: Support 2 modes to turn off clock or power domain of CPU when CPU is idle (nothing to do). <br />
** Sleep mode: put in sleep state. <br />
** Core standby mode: put in shutdown state. It is described in devicetree of each SoC => It has deeper state than sleep mode so that save more power. <br />
* CPUFreq: there are 6 governors to support "Dynamic Frequency Scaling": <br />
** '''Performance''': The frequency is always set maximum => It is using as default in our current environment. <br />
** '''Powersave''': The frequency is always set minimum. <br />
** '''Ondemand''': If CPU load is bigger than 95%, the frequency is set max. If CPU load is equal to or less than 95%, the frequency is set based on CPU load. <br />
** Conservative: If CPU load is bigger than 80%, the frequency is set one level higher than current frequency. If CPU load is equal to or less than 20%, the frequency is set one level lower than current frequency. <br />
** '''Userspace''': It sets frequency which is defined by user in runtime. <br />
** '''Schedutil''': Schedutil governor is driven by scheduler. It uses scheduler-provided CPU utilization information as input for making its decisions by formula: freq_next= 1.25 * freq_max* util_of_CPU. <br />
* Power Domain: it is supported as default by Linux Power Management Framework. If a module is not use, system will disable its clock and power domain automatically. <br />
<br />
Therefore, select proper method will be based on user's purpose. Here are my examples: <br />
* Want to use with best performance: disable CPUIdle + use performance frequency governor. <br />
* Want to use less power: enable CPUIdle + use powersave frequency governor. <br />
* Want to balance performance and power: we can use schedutil. <br />
* Want to modify frequency as user's purpose: use userspance frequency governor. <br />
* If user is running realtime environment, I suggest using performance governor to ensure the minimum latency. <br />
Here are some commands to check frequency value and frequency governor in linux: <br />
* Check available CPU frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_frequencies </code><br />
* Check available CPU frequency governor:<br />
: <code>cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_governors </code><br />
* Change to other governor:<br />
: <code>echo performance > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor (performance/userspace/schedutil/...) </code><br />
* Check current frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq</code><br />
<br />
= PMIC Access from Linux =<br />
The easiest way to access the PMIC registers from command line would would be to use i2ctools. Add the following line to your local.conf.<br />
: <code>IMAGE_INSTALL_append = " i2c-tools"</code><br />
<br />
However the PMICs are connected to a I2C (IIC for PMIC or I2C_DVFS) that is not enabled in the default kernel device tree.<br />
For the HiHope boards, you can edit the file <code>arch/arm64/boot/dts/renesas/hihope-common.dtsi</code> and add the following lines at the very bottom of the file.<br />
<pre><br />
&i2c_dvfs {<br />
status = "okay";<br />
};<br />
</pre><br />
<br />
Once booted in Linux, the corresponding device should be /dev/i2c-7 <br />
<br />
You can query the connected slaves by giving the following command: <br />
: <code> i2cdetect -y -r 7 </code><br />
that on the RZ/G2E board produces the output: <br />
<pre>0 1 2 3 4 5 6 7 8 9 a b c d e f <br />
00: -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1e 1f <br />
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
70: -- -- -- -- -- -- -- -- </pre><br />
So two slaves, at address 0x1e and 0x1f. <br />
Finally you can read registers by simply using the i2cget command, for example: <br />
<pre><br />
i2cget -y 7 0x1e 0x1 <br />
0x02 <br />
i2cget -y 7 0x1e 0x16 <br />
0x00 <br />
i2cget -y 7 0x1e 0x17 <br />
0xc4 <br />
</pre><br />
<br />
If you don't want (or can't) update the device tree blob, you could use u-boot to do it temporarily.<br />
The procedure below is valid for RZ/G2M but it works also with RZ/G2E-N-H by simply modifying the device tree blob and/or kernel image names. <br />
<br />
1) Interrupt the normal kernel boot<br />
<br />
2) Once in u-boot, enter the follow commands (after each RESET)<br />
<pre>=> fatload mmc 0:1 0x48080000 Image; fatload mmc 0:1 0x48000000 Image-r8a774a1-hihope-rzg2m-ex.dtb; <br />
=> fdt addr 0x48000000 <br />
=> fdt set /soc/i2c@e60b0000 status "okay"</pre><br />
and finally boot the kernel: <br />
<pre>=> booti 0x48080000 - 0x48000000 </pre><br />
<br />
= Create a uImage =<br />
In the kernel, there is no make target to make a uImage for the 64-bit ARM architecture like there is for 32-bit ARM.<br />
However, you can manually make one from the file Image.gz that is created by the kernel build system by using the following command on your host machine.<br />
<pre><br />
$ cd arch/arm64/boot<br />
$ mkimage -A arm64 -O linux -T kernel -C gzip -a 0x48080000 -e 0x48080000 -n "Linux Kernel Image" -d Image.gz uImage<br />
</pre><br />
<br />
Below is an example of booting this image on a RZ/G2 HiHiope board from u-boot.<br />
<pre><br />
=> fatload mmc 0:1 0x88000000 uImage<br />
=> fatload mmc 0:1 0x48000000 Image-r8a774e1-hihope-rzg2h-ex.dtb<br />
=> bootm 0x88000000 - 0x48000000<br />
</pre><br />
<br />
= Building mainline / LTS Linux kernel for RZ/G2E-N-M-H =<br />
The Verified Linux Package (VLP) includes the CIP kernel (v4.19.x) and this is the only official way to build a kernel that has all the features in. However it is possible to build a working kernel directly from mainline. The kernel built in this way does not provide most of the multimedia functionalities (e.g. GPU, codec, etc). <br />
<br />
A recent [https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads Linaro toolchain] is needed to build the kernel. The instructions below are for v5.10.x, newer kernel versions can be built as well in a similar way.<br />
git clone <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/</nowiki><br />
<br />
git checkout tags/v5.10.42<br />
or anyway the latest minor revision including bug fixes.<br />
<br />
Copy Renesas default kernel build into .out/.config:<br />
cp arch/arm64/configs/renesas_defconfig .out/.config<br />
or, if not present, get from the repository:<br />
wget -O .out/.config <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/plain/arch/arm64/configs/renesas_defconfig</nowiki><br />
If you want to be able to build modules:<br />
echo CONFIG_MODULES=y >> .out/.config<br />
<br />
echo CONFIG_MODULE_UNLOAD=y >> .out/.config<br />
Run kernel configuration:<br />
make O=.out menuconfig<br />
Exit and save. Then launch the build:<br />
make O=.out all -j$(nproc)<br />
<br />
= Renesas RZ/G2 PCIe Endpoint Driver =<br />
* [[RZ-G/RZG2_pcie_ep | Click Here]]<br />
<br />
= GPIO Pin Usage =<br />
Since linux-4.8 the GPIO sysfs interface is [https://www.kernel.org/doc/Documentation/gpio/sysfs.txt deprecated]. User space should use the character device instead. The libgpiod library encapsulates the ioctl calls and data structures behind a straightforward API.<br />
<br />
Also, the kernel source code contains a GPIO utility for user space. Please see directory tools/gpio/ in the kernel source code.<br />
<br />
== GPIO Programming ==<br />
=== Character device – user API (linux/gpio.h) : ===<br />
The linux kernel is distributed with three basic user-mode tools written for testing the GPIO interface. The source can be found in linux/tools/gpio/.<br />
The three tools are: <br><br />
a) lsgpio – example on how to list the GPIO lines on a system<br><br />
b) gpio-event-mon – monitor GPIO line events from userspace<br><br />
c) gpio-hammer- example to shake GPIO lines on a system<br><br />
* Note:These are useful for debugging GPIO lines, but none of these tools will allow the user to configure, set and clear GPIO lines.<br><br />
However, you can use user API (chip info, line info, line request for values, reading values, setting values, line request for events, polling for events annd reading events) from linux/gpio.h to program GPIO. <br><br />
* GPIO pin number for RZ/G2M/H/N/E is determined by using lsgpio:<br />
<pre><br />
GPIO chip: gpiochip6, "e6055400.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
GPIO chip: gpiochip5, "e6055000.gpio", 20 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 19: unnamed unused [output]<br />
GPIO chip: gpiochip4, "e6054000.gpio", 11 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 10: unnamed unused<br />
GPIO chip: gpiochip3, "e6053000.gpio", 16 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 15: unnamed unused<br />
GPIO chip: gpiochip2, "e6052000.gpio", 26 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 25: unnamed "wlan-en-regulator" [kernel output]<br />
GPIO chip: gpiochip1, "e6051000.gpio", 23 GPIO lines<br />
line 0: unnamed "interrupt" [kernel]<br />
....<br />
....<br />
line 22: unnamed unused<br />
GPIO chip: gpiochip0, "e6050000.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
</pre><br />
To access LED0, which is defined as GPIO5-19, you will use gpiochip5 chip and line 19.<br><br />
* RZ/G2L: Check board schematic to know the index of a pin (example P0_0, P43_0, ...). Then you will know the index of GPIO under Px_y (x: port number, y: pin number) is (8*x + y). Example P0_0 is 0, P5_1 is 41(8*5+1).<br><br />
<pre><br />
GPIO chip: gpiochip0, "11030000.pin-controller", 392 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 390: unnamed unused<br />
line 391: unnamed unused<br />
</pre><br />
* Example: To access, P43_1, you need to use, gpiochip0 and line 345 (43*8 + 1)<br><br />
* [[Media:gpio_led_linux.zip| Sample Code]] to blink LED0(GPIO5-19) RZG2E RevC using linux/gpio.h API<br />
Note: To run, download the source code. You also need to install the yocto SDK for RZG2E Rev C<br><br />
<pre><br />
$ source /opt/poky/2.4.3/environment-setup-aarch64-poky-linux<br />
$ make<br />
</pre><br />
=== libgpiod – C library & tools for GPIO chardev : ===<br />
Currently, in RZ/G GPIO driver, pin names are not exported so finding pin ID for a specific port name using gpiofind is not possible.<br><br />
Also currently, the line number outputed from gpioinfo does not work as global pin ID.<br />
<br />
=== Using sysfs interface : ===<br />
GPIO pin number for RZ/G2M/H/N/E is determined by:<br />
* GPIO_ID = GPIO Bank Address + Pin Number <br />
<pre><br />
RZ/G2E RZ/G2M/N/H<br />
GPIO Bank Address GPIO Bank Address<br />
GPIO 0 494 GPIO 0 496 <br />
GPIO 1 471 GPIO 1 467<br />
GPIO 2 445 GPIO 2 452 <br />
GPIO 3 429 GPIO 3 436<br />
GPIO 4 418 GPIO 4 418<br />
GPIO 5 398 GPIO 5 392<br />
GPIO 6 380 GPIO 6 360<br />
GPIO 7 356<br />
</pre><br />
Example:<br><br />
*For RZ/G2E, GPIO number of GP5_19 is 398 + 19 = 417<br />
*Example: Turn on/off LED0 GP5_19 => gpio417 on RZ/G2E (Rev C) board<br><br />
NOTE: GP5_19 is defined as a GPIO LED0 in Device Tree. So you<br />
need to either remove that from the Device Tree and reprogram the board, or <br><br />
you can remove it from device tree in uboot using fdt command. Below is the example using fdt<br />
<pre><br />
=> setenv gpioLED_1=fatload mmc 0:1 0x48080000 Image-ek874.bin; fatload mmc 0:1 0x48000000 Image-r8a774c0-ek874-revc-mipi-2.1.dtb<br />
=> setenv gpioLED_2=fdt addr 0x48000000 ; fdt rm /leds<br />
=> setenv gpioLED_3=booti 0x48080000 - 0x48000000<br />
=> setenv gpioLED_boot=run gpioLED_1 gpioLED_2 gpioLED_3<br />
=> setenv<br />
Then run the command to boot<br />
=> run gpioLED_boot<br />
</pre><br />
Now, lets turn on/off switch using sysfs:<br />
<pre><br />
root@ek874:~# echo 417 > /sys/class/gpio/export # request gpio417<br />
root@ek874:~# echo out > /sys/class/gpio/gpio417/direction # set gpio417 (GP5_19) output<br />
root@ek874:~# echo 1 > /sys/class/gpio/gpio417/value # turn ON LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
1<br />
root@ek874:~# echo 0 > /sys/class/gpio/gpio417/value # turn OFF LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
0<br />
</pre><br />
RZ/G2L Pin Decode :<br />
GPIO pin number is determined by formula:<br />
* GPIO_ID = GPIO_port * 8 + GPIO_pin + 120<br />
Example:<br />
P42_4 has its id 460 with above formula (42 * 8 + 4 + 120).<br />
* Example GPIO input function by using PMOD slide switch https://digilent.com/shop/pmod-swt-4-user-slide-switches/<br />
<pre><br />
root@smarc-rzg2l:~# echo 460 > /sys/class/gpio/export<br />
root@smarc-rzg2l:~# echo in > /sys/class/gpio/gpio460/direction <br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value <br />
1<br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value # after switch off<br />
0<br />
</pre></div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_kernel&diff=1015RZ-G/RZG kernel2022-02-03T20:16:14Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G kernel Information}}<br />
← [[RZ-G]]<br />
<br />
= CPU Hotplug =<br />
You can enable and disable CPU cores by writing to a sysfs value.<br />
<br><br />
This is helpful for when you want to experiment with the performance of your application if you were to use a processor with less CPU cores.<br />
<br />
For example, this command will disable the 2nd core.<br />
<br />
<code>$ echo 0 > /sys/devices/system/cpu/cpu1/online</code><br />
<br />
More detailed information can be found here: https://www.cyberciti.biz/faq/debian-rhel-centos-redhat-suse-hotplug-cpu<br />
<br />
<br />
= Power Saving =<br />
* In Linux, this is a mechanism that is generally supported by all kernels.(it may depend on the version) <br />
* The Renesas kernel has support them. <br />
<br />
About power consumption in RZ/G2 series, we have some supported features to save power cost in default environment: <br />
* CPUHotplug: Turn on/off CPU in runtime. <br />
* CPUIdle: Support 2 modes to turn off clock or power domain of CPU when CPU is idle (nothing to do). <br />
** Sleep mode: put in sleep state. <br />
** Core standby mode: put in shutdown state. It is described in devicetree of each SoC => It has deeper state than sleep mode so that save more power. <br />
* CPUFreq: there are 6 governors to support "Dynamic Frequency Scaling": <br />
** '''Performance''': The frequency is always set maximum => It is using as default in our current environment. <br />
** '''Powersave''': The frequency is always set minimum. <br />
** '''Ondemand''': If CPU load is bigger than 95%, the frequency is set max. If CPU load is equal to or less than 95%, the frequency is set based on CPU load. <br />
** Conservative: If CPU load is bigger than 80%, the frequency is set one level higher than current frequency. If CPU load is equal to or less than 20%, the frequency is set one level lower than current frequency. <br />
** '''Userspace''': It sets frequency which is defined by user in runtime. <br />
** '''Schedutil''': Schedutil governor is driven by scheduler. It uses scheduler-provided CPU utilization information as input for making its decisions by formula: freq_next= 1.25 * freq_max* util_of_CPU. <br />
* Power Domain: it is supported as default by Linux Power Management Framework. If a module is not use, system will disable its clock and power domain automatically. <br />
<br />
Therefore, select proper method will be based on user's purpose. Here are my examples: <br />
* Want to use with best performance: disable CPUIdle + use performance frequency governor. <br />
* Want to use less power: enable CPUIdle + use powersave frequency governor. <br />
* Want to balance performance and power: we can use schedutil. <br />
* Want to modify frequency as user's purpose: use userspance frequency governor. <br />
* If user is running realtime environment, I suggest using performance governor to ensure the minimum latency. <br />
Here are some commands to check frequency value and frequency governor in linux: <br />
* Check available CPU frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_frequencies </code><br />
* Check available CPU frequency governor:<br />
: <code>cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_governors </code><br />
* Change to other governor:<br />
: <code>echo performance > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor (performance/userspace/schedutil/...) </code><br />
* Check current frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq</code><br />
<br />
= PMIC Access from Linux =<br />
The easiest way to access the PMIC registers from command line would would be to use i2ctools. Add the following line to your local.conf.<br />
: <code>IMAGE_INSTALL_append = " i2c-tools"</code><br />
<br />
However the PMICs are connected to a I2C (IIC for PMIC or I2C_DVFS) that is not enabled in the default kernel device tree.<br />
For the HiHope boards, you can edit the file <code>arch/arm64/boot/dts/renesas/hihope-common.dtsi</code> and add the following lines at the very bottom of the file.<br />
<pre><br />
&i2c_dvfs {<br />
status = "okay";<br />
};<br />
</pre><br />
<br />
Once booted in Linux, the corresponding device should be /dev/i2c-7 <br />
<br />
You can query the connected slaves by giving the following command: <br />
: <code> i2cdetect -y -r 7 </code><br />
that on the RZ/G2E board produces the output: <br />
<pre>0 1 2 3 4 5 6 7 8 9 a b c d e f <br />
00: -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1e 1f <br />
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
70: -- -- -- -- -- -- -- -- </pre><br />
So two slaves, at address 0x1e and 0x1f. <br />
Finally you can read registers by simply using the i2cget command, for example: <br />
<pre><br />
i2cget -y 7 0x1e 0x1 <br />
0x02 <br />
i2cget -y 7 0x1e 0x16 <br />
0x00 <br />
i2cget -y 7 0x1e 0x17 <br />
0xc4 <br />
</pre><br />
<br />
If you don't want (or can't) update the device tree blob, you could use u-boot to do it temporarily.<br />
The procedure below is valid for RZ/G2M but it works also with RZ/G2E-N-H by simply modifying the device tree blob and/or kernel image names. <br />
<br />
1) Interrupt the normal kernel boot<br />
<br />
2) Once in u-boot, enter the follow commands (after each RESET)<br />
<pre>=> fatload mmc 0:1 0x48080000 Image; fatload mmc 0:1 0x48000000 Image-r8a774a1-hihope-rzg2m-ex.dtb; <br />
=> fdt addr 0x48000000 <br />
=> fdt set /soc/i2c@e60b0000 status "okay"</pre><br />
and finally boot the kernel: <br />
<pre>=> booti 0x48080000 - 0x48000000 </pre><br />
<br />
= Create a uImage =<br />
In the kernel, there is no make target to make a uImage for the 64-bit ARM architecture like there is for 32-bit ARM.<br />
However, you can manually make one from the file Image.gz that is created by the kernel build system by using the following command on your host machine.<br />
<pre><br />
$ cd arch/arm64/boot<br />
$ mkimage -A arm64 -O linux -T kernel -C gzip -a 0x48080000 -e 0x48080000 -n "Linux Kernel Image" -d Image.gz uImage<br />
</pre><br />
<br />
Below is an example of booting this image on a RZ/G2 HiHiope board from u-boot.<br />
<pre><br />
=> fatload mmc 0:1 0x88000000 uImage<br />
=> fatload mmc 0:1 0x48000000 Image-r8a774e1-hihope-rzg2h-ex.dtb<br />
=> bootm 0x88000000 - 0x48000000<br />
</pre><br />
<br />
= Building mainline / LTS Linux kernel for RZ/G2E-N-M-H =<br />
The Verified Linux Package (VLP) includes the CIP kernel (v4.19.x) and this is the only official way to build a kernel that has all the features in. However it is possible to build a working kernel directly from mainline. The kernel built in this way does not provide most of the multimedia functionalities (e.g. GPU, codec, etc). <br />
<br />
A recent [https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads Linaro toolchain] is needed to build the kernel. The instructions below are for v5.10.x, newer kernel versions can be built as well in a similar way.<br />
git clone <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/</nowiki><br />
<br />
git checkout tags/v5.10.42<br />
or anyway the latest minor revision including bug fixes.<br />
<br />
Copy Renesas default kernel build into .out/.config:<br />
cp arch/arm64/configs/renesas_defconfig .out/.config<br />
or, if not present, get from the repository:<br />
wget -O .out/.config <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/plain/arch/arm64/configs/renesas_defconfig</nowiki><br />
If you want to be able to build modules:<br />
echo CONFIG_MODULES=y >> .out/.config<br />
<br />
echo CONFIG_MODULE_UNLOAD=y >> .out/.config<br />
Run kernel configuration:<br />
make O=.out menuconfig<br />
Exit and save. Then launch the build:<br />
make O=.out all -j$(nproc)<br />
<br />
= Renesas RZ/G2 PCIe Endpoint Driver =<br />
* [[RZ-G/RZG2_pcie_ep | Click Here]]<br />
<br />
= GPIO Pin Usage =<br />
Since linux-4.8 the GPIO sysfs interface is [https://www.kernel.org/doc/Documentation/gpio/sysfs.txt deprecated]. User space should use the character device instead. The libgpiod library encapsulates the ioctl calls and data structures behind a straightforward API.<br />
<br />
Also, the kernel source code contains a GPIO utility for user space. Please see directory tools/gpio/ in the kernel source code.<br />
<br />
== GPIO Programming ==<br />
=== Character device – user API (linux/gpio.h) : ===<br />
The linux kernel is distributed with three basic user-mode tools written for testing the GPIO interface. The source can be found in linux/tools/gpio/.<br />
The three tools are: <br><br />
a) lsgpio – example on how to list the GPIO lines on a system<br><br />
b) gpio-event-mon – monitor GPIO line events from userspace<br><br />
c) gpio-hammer- example to shake GPIO lines on a system<br><br />
* Note:These are useful for debugging GPIO lines, but none of these tools will allow the user to configure, set and clear GPIO lines.<br><br />
However, you can use user API (chip info, line info, line request for values, reading values, setting values, line request for events, polling for events annd reading events) from linux/gpio.h to program GPIO. <br><br />
* GPIO pin number for RZ/G2M/H/N/E is determined by using lsgpio:<br />
<pre><br />
GPIO chip: gpiochip6, "e6055400.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
GPIO chip: gpiochip5, "e6055000.gpio", 20 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 19: unnamed unused [output]<br />
GPIO chip: gpiochip4, "e6054000.gpio", 11 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 10: unnamed unused<br />
GPIO chip: gpiochip3, "e6053000.gpio", 16 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 15: unnamed unused<br />
GPIO chip: gpiochip2, "e6052000.gpio", 26 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 25: unnamed "wlan-en-regulator" [kernel output]<br />
GPIO chip: gpiochip1, "e6051000.gpio", 23 GPIO lines<br />
line 0: unnamed "interrupt" [kernel]<br />
....<br />
....<br />
line 22: unnamed unused<br />
GPIO chip: gpiochip0, "e6050000.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
</pre><br />
To access LED0, which is defined as GPIO5-19, you will use gpiochip5 chip and line 19.<br><br />
* RZ/G2L: Check board schematic to know the index of a pin (example P0_0, P43_0, ...). Then you will know the index of GPIO under Px_y (x: port number, y: pin number) is (8*x + y). Example P0_0 is 0, P5_1 is 41(8*5+1).<br><br />
<pre><br />
GPIO chip: gpiochip0, "11030000.pin-controller", 392 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 390: unnamed unused<br />
line 391: unnamed unused<br />
</pre><br />
* Example: To access, P43_1, you need to use, gpiochip0 and line 345 (43*8 + 1)<br><br />
* [[Media:gpio_led_linux.zip| Sample Code]] to blink LED0(GPIO5-19) RZG2E RevC using linux/gpio.h API<br />
Note: To run, download the source code. You also need to install the yocto SDK for RZG2E Rev C<br><br />
<pre><br />
$ source /opt/poky/2.4.3/environment-setup-aarch64-poky-linux<br />
$ make<br />
</pre><br />
=== Using libgpiod : ===<br />
Currently, in RZ/G GPIO driver, pin names are not exported so finding pin ID for a specific port name using gpiofind is not possible.<br><br />
Also currently, the line number outputed from gpioinfo does not work as global pin ID.<br />
=== Using sysfs interface : ===<br />
GPIO pin number for RZ/G2M/H/N/E is determined by:<br />
* GPIO_ID = GPIO Bank Address + Pin Number <br />
<pre><br />
RZ/G2E RZ/G2M/N/H<br />
GPIO Bank Address GPIO Bank Address<br />
GPIO 0 494 GPIO 0 496 <br />
GPIO 1 471 GPIO 1 467<br />
GPIO 2 445 GPIO 2 452 <br />
GPIO 3 429 GPIO 3 436<br />
GPIO 4 418 GPIO 4 418<br />
GPIO 5 398 GPIO 5 392<br />
GPIO 6 380 GPIO 6 360<br />
GPIO 7 356<br />
</pre><br />
Example:<br><br />
*For RZ/G2E, GPIO number of GP5_19 is 398 + 19 = 417<br />
*Example: Turn on/off LED0 GP5_19 => gpio417 on RZ/G2E (Rev C) board<br><br />
NOTE: GP5_19 is defined as a GPIO LED0 in Device Tree. So you<br />
need to either remove that from the Device Tree and reprogram the board, or <br><br />
you can remove it from device tree in uboot using fdt command. Below is the example using fdt<br />
<pre><br />
=> setenv gpioLED_1=fatload mmc 0:1 0x48080000 Image-ek874.bin; fatload mmc 0:1 0x48000000 Image-r8a774c0-ek874-revc-mipi-2.1.dtb<br />
=> setenv gpioLED_2=fdt addr 0x48000000 ; fdt rm /leds<br />
=> setenv gpioLED_3=booti 0x48080000 - 0x48000000<br />
=> setenv gpioLED_boot=run gpioLED_1 gpioLED_2 gpioLED_3<br />
=> setenv<br />
Then run the command to boot<br />
=> run gpioLED_boot<br />
</pre><br />
Now, lets turn on/off switch using sysfs:<br />
<pre><br />
root@ek874:~# echo 417 > /sys/class/gpio/export # request gpio417<br />
root@ek874:~# echo out > /sys/class/gpio/gpio417/direction # set gpio417 (GP5_19) output<br />
root@ek874:~# echo 1 > /sys/class/gpio/gpio417/value # turn ON LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
1<br />
root@ek874:~# echo 0 > /sys/class/gpio/gpio417/value # turn OFF LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
0<br />
</pre><br />
RZ/G2L Pin Decode :<br />
GPIO pin number is determined by formula:<br />
* GPIO_ID = GPIO_port * 8 + GPIO_pin + 120<br />
Example:<br />
P42_4 has its id 460 with above formula (42 * 8 + 4 + 120).<br />
* Example GPIO input function by using PMOD slide switch https://digilent.com/shop/pmod-swt-4-user-slide-switches/<br />
<pre><br />
root@smarc-rzg2l:~# echo 460 > /sys/class/gpio/export<br />
root@smarc-rzg2l:~# echo in > /sys/class/gpio/gpio460/direction <br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value <br />
1<br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value # after switch off<br />
0<br />
</pre></div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_kernel&diff=1014RZ-G/RZG kernel2022-02-03T20:12:36Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G kernel Information}}<br />
← [[RZ-G]]<br />
<br />
= CPU Hotplug =<br />
You can enable and disable CPU cores by writing to a sysfs value.<br />
<br><br />
This is helpful for when you want to experiment with the performance of your application if you were to use a processor with less CPU cores.<br />
<br />
For example, this command will disable the 2nd core.<br />
<br />
<code>$ echo 0 > /sys/devices/system/cpu/cpu1/online</code><br />
<br />
More detailed information can be found here: https://www.cyberciti.biz/faq/debian-rhel-centos-redhat-suse-hotplug-cpu<br />
<br />
<br />
= Power Saving =<br />
* In Linux, this is a mechanism that is generally supported by all kernels.(it may depend on the version) <br />
* The Renesas kernel has support them. <br />
<br />
About power consumption in RZ/G2 series, we have some supported features to save power cost in default environment: <br />
* CPUHotplug: Turn on/off CPU in runtime. <br />
* CPUIdle: Support 2 modes to turn off clock or power domain of CPU when CPU is idle (nothing to do). <br />
** Sleep mode: put in sleep state. <br />
** Core standby mode: put in shutdown state. It is described in devicetree of each SoC => It has deeper state than sleep mode so that save more power. <br />
* CPUFreq: there are 6 governors to support "Dynamic Frequency Scaling": <br />
** '''Performance''': The frequency is always set maximum => It is using as default in our current environment. <br />
** '''Powersave''': The frequency is always set minimum. <br />
** '''Ondemand''': If CPU load is bigger than 95%, the frequency is set max. If CPU load is equal to or less than 95%, the frequency is set based on CPU load. <br />
** Conservative: If CPU load is bigger than 80%, the frequency is set one level higher than current frequency. If CPU load is equal to or less than 20%, the frequency is set one level lower than current frequency. <br />
** '''Userspace''': It sets frequency which is defined by user in runtime. <br />
** '''Schedutil''': Schedutil governor is driven by scheduler. It uses scheduler-provided CPU utilization information as input for making its decisions by formula: freq_next= 1.25 * freq_max* util_of_CPU. <br />
* Power Domain: it is supported as default by Linux Power Management Framework. If a module is not use, system will disable its clock and power domain automatically. <br />
<br />
Therefore, select proper method will be based on user's purpose. Here are my examples: <br />
* Want to use with best performance: disable CPUIdle + use performance frequency governor. <br />
* Want to use less power: enable CPUIdle + use powersave frequency governor. <br />
* Want to balance performance and power: we can use schedutil. <br />
* Want to modify frequency as user's purpose: use userspance frequency governor. <br />
* If user is running realtime environment, I suggest using performance governor to ensure the minimum latency. <br />
Here are some commands to check frequency value and frequency governor in linux: <br />
* Check available CPU frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_frequencies </code><br />
* Check available CPU frequency governor:<br />
: <code>cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_governors </code><br />
* Change to other governor:<br />
: <code>echo performance > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor (performance/userspace/schedutil/...) </code><br />
* Check current frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq</code><br />
<br />
= PMIC Access from Linux =<br />
The easiest way to access the PMIC registers from command line would would be to use i2ctools. Add the following line to your local.conf.<br />
: <code>IMAGE_INSTALL_append = " i2c-tools"</code><br />
<br />
However the PMICs are connected to a I2C (IIC for PMIC or I2C_DVFS) that is not enabled in the default kernel device tree.<br />
For the HiHope boards, you can edit the file <code>arch/arm64/boot/dts/renesas/hihope-common.dtsi</code> and add the following lines at the very bottom of the file.<br />
<pre><br />
&i2c_dvfs {<br />
status = "okay";<br />
};<br />
</pre><br />
<br />
Once booted in Linux, the corresponding device should be /dev/i2c-7 <br />
<br />
You can query the connected slaves by giving the following command: <br />
: <code> i2cdetect -y -r 7 </code><br />
that on the RZ/G2E board produces the output: <br />
<pre>0 1 2 3 4 5 6 7 8 9 a b c d e f <br />
00: -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1e 1f <br />
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
70: -- -- -- -- -- -- -- -- </pre><br />
So two slaves, at address 0x1e and 0x1f. <br />
Finally you can read registers by simply using the i2cget command, for example: <br />
<pre><br />
i2cget -y 7 0x1e 0x1 <br />
0x02 <br />
i2cget -y 7 0x1e 0x16 <br />
0x00 <br />
i2cget -y 7 0x1e 0x17 <br />
0xc4 <br />
</pre><br />
<br />
If you don't want (or can't) update the device tree blob, you could use u-boot to do it temporarily.<br />
The procedure below is valid for RZ/G2M but it works also with RZ/G2E-N-H by simply modifying the device tree blob and/or kernel image names. <br />
<br />
1) Interrupt the normal kernel boot<br />
<br />
2) Once in u-boot, enter the follow commands (after each RESET)<br />
<pre>=> fatload mmc 0:1 0x48080000 Image; fatload mmc 0:1 0x48000000 Image-r8a774a1-hihope-rzg2m-ex.dtb; <br />
=> fdt addr 0x48000000 <br />
=> fdt set /soc/i2c@e60b0000 status "okay"</pre><br />
and finally boot the kernel: <br />
<pre>=> booti 0x48080000 - 0x48000000 </pre><br />
<br />
= Create a uImage =<br />
In the kernel, there is no make target to make a uImage for the 64-bit ARM architecture like there is for 32-bit ARM.<br />
However, you can manually make one from the file Image.gz that is created by the kernel build system by using the following command on your host machine.<br />
<pre><br />
$ cd arch/arm64/boot<br />
$ mkimage -A arm64 -O linux -T kernel -C gzip -a 0x48080000 -e 0x48080000 -n "Linux Kernel Image" -d Image.gz uImage<br />
</pre><br />
<br />
Below is an example of booting this image on a RZ/G2 HiHiope board from u-boot.<br />
<pre><br />
=> fatload mmc 0:1 0x88000000 uImage<br />
=> fatload mmc 0:1 0x48000000 Image-r8a774e1-hihope-rzg2h-ex.dtb<br />
=> bootm 0x88000000 - 0x48000000<br />
</pre><br />
<br />
= Building mainline / LTS Linux kernel for RZ/G2E-N-M-H =<br />
The Verified Linux Package (VLP) includes the CIP kernel (v4.19.x) and this is the only official way to build a kernel that has all the features in. However it is possible to build a working kernel directly from mainline. The kernel built in this way does not provide most of the multimedia functionalities (e.g. GPU, codec, etc). <br />
<br />
A recent [https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads Linaro toolchain] is needed to build the kernel. The instructions below are for v5.10.x, newer kernel versions can be built as well in a similar way.<br />
git clone <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/</nowiki><br />
<br />
git checkout tags/v5.10.42<br />
or anyway the latest minor revision including bug fixes.<br />
<br />
Copy Renesas default kernel build into .out/.config:<br />
cp arch/arm64/configs/renesas_defconfig .out/.config<br />
or, if not present, get from the repository:<br />
wget -O .out/.config <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/plain/arch/arm64/configs/renesas_defconfig</nowiki><br />
If you want to be able to build modules:<br />
echo CONFIG_MODULES=y >> .out/.config<br />
<br />
echo CONFIG_MODULE_UNLOAD=y >> .out/.config<br />
Run kernel configuration:<br />
make O=.out menuconfig<br />
Exit and save. Then launch the build:<br />
make O=.out all -j$(nproc)<br />
<br />
= Renesas RZ/G2 PCIe Endpoint Driver =<br />
* [[RZ-G/RZG2_pcie_ep | Click Here]]<br />
<br />
= GPIO Pin Usage =<br />
Since linux-4.8 the GPIO sysfs interface is [https://www.kernel.org/doc/Documentation/gpio/sysfs.txt deprecated]. User space should use the character device instead. The libgpiod library encapsulates the ioctl calls and data structures behind a straightforward API.<br />
<br />
Also, the kernel source code contains a GPIO utility for user space. Please see directory tools/gpio/ in the kernel source code.<br />
<br />
== GPIO Programming ==<br />
=== Character device – user API (linux/gpio.h) : ===<br />
The linux kernel is distributed with three basic user-mode tools written for testing the GPIO interface. The source can be found in linux/tools/gpio/.<br />
The three tools are: <br><br />
a) lsgpio – example on how to list the GPIO lines on a system<br><br />
b) gpio-event-mon – monitor GPIO line events from userspace<br><br />
c) gpio-hammer- example to shake GPIO lines on a system<br><br />
*Note:These are useful for debugging GPIO lines, but none of these tools will allow the user to configure, set and clear GPIO lines.<br><br />
However, you can use user API (chip info, line info, line request for values, reading values, setting values, line request for events, polling for events annd reading events) from linux/gpio.h to program GPIO. <br><br />
GPIO pin number for RZ/G2M/H/N/E is determined by using lsgpio:<br />
<pre><br />
* GPIO chip: gpiochip6, "e6055400.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
GPIO chip: gpiochip5, "e6055000.gpio", 20 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 19: unnamed unused [output]<br />
GPIO chip: gpiochip4, "e6054000.gpio", 11 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 10: unnamed unused<br />
GPIO chip: gpiochip3, "e6053000.gpio", 16 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 15: unnamed unused<br />
GPIO chip: gpiochip2, "e6052000.gpio", 26 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 25: unnamed "wlan-en-regulator" [kernel output]<br />
GPIO chip: gpiochip1, "e6051000.gpio", 23 GPIO lines<br />
line 0: unnamed "interrupt" [kernel]<br />
....<br />
....<br />
line 22: unnamed unused<br />
GPIO chip: gpiochip0, "e6050000.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
</pre><br />
To access LED0, which is defined as GPIO5-19, you will use gpiochip5 chip and line 19.<br><br />
* RZ/G2L: Check board schematic to know the index of a pin (example P0_0, P43_0, ...). Then you will know the index of GPIO under Px_y (x: port number, y: pin number) is (8*x + y). Example P0_0 is 0, P5_1 is 41(8*5+1).<br><br />
<pre><br />
GPIO chip: gpiochip0, "11030000.pin-controller", 392 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 390: unnamed unused<br />
line 391: unnamed unused<br />
</pre><br />
* Example: To access, P43_1, you need to use, gpiochip0 and line 345 (43*8 + 1)<br><br />
* [[Media:gpio_led_linux.zip| Sample Code]] to blink LED0(GPIO5-19) RZG2E RevC using linux/gpio.h API<br />
Note: To run, download the yocto SDK for RZG2E Rev C<br><br />
<pre><br />
$ source /opt/poky/2.4.3/environment-setup-aarch64-poky-linux<br />
$ make<br />
</pre><br />
=== Using libgpiod : ===<br />
Currently, in RZ/G GPIO driver, pin names are not exported so finding pin ID for a specific port name using gpiofind is not possible.<br><br />
Also currently, the line number outputed from gpioinfo does not work as global pin ID.<br />
=== Using sysfs interface : ===<br />
GPIO pin number for RZ/G2M/H/N/E is determined by:<br />
* GPIO_ID = GPIO Bank Address + Pin Number <br />
<pre><br />
RZ/G2E RZ/G2M/N/H<br />
GPIO Bank Address GPIO Bank Address<br />
GPIO 0 494 GPIO 0 496 <br />
GPIO 1 471 GPIO 1 467<br />
GPIO 2 445 GPIO 2 452 <br />
GPIO 3 429 GPIO 3 436<br />
GPIO 4 418 GPIO 4 418<br />
GPIO 5 398 GPIO 5 392<br />
GPIO 6 380 GPIO 6 360<br />
GPIO 7 356<br />
</pre><br />
Example:<br><br />
*For RZ/G2E, GPIO number of GP5_19 is 398 + 19 = 417<br />
*Example: Turn on/off LED0 GP5_19 => gpio417 on RZ/G2E (Rev C) board<br><br />
NOTE: GP5_19 is defined as a GPIO LED0 in Device Tree. So you<br />
need to either remove that from the Device Tree and reprogram the board, or <br><br />
you can remove it from device tree in uboot using fdt command. Below is the example using fdt<br />
<pre><br />
=> setenv gpioLED_1=fatload mmc 0:1 0x48080000 Image-ek874.bin; fatload mmc 0:1 0x48000000 Image-r8a774c0-ek874-revc-mipi-2.1.dtb<br />
=> setenv gpioLED_2=fdt addr 0x48000000 ; fdt rm /leds<br />
=> setenv gpioLED_3=booti 0x48080000 - 0x48000000<br />
=> setenv gpioLED_boot=run gpioLED_1 gpioLED_2 gpioLED_3<br />
=> setenv<br />
Then run the command to boot<br />
=> run gpioLED_boot<br />
</pre><br />
Now, lets turn on/off switch using sysfs:<br />
<pre><br />
root@ek874:~# echo 417 > /sys/class/gpio/export # request gpio417<br />
root@ek874:~# echo out > /sys/class/gpio/gpio417/direction # set gpio417 (GP5_19) output<br />
root@ek874:~# echo 1 > /sys/class/gpio/gpio417/value # turn ON LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
1<br />
root@ek874:~# echo 0 > /sys/class/gpio/gpio417/value # turn OFF LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
0<br />
</pre><br />
RZ/G2L Pin Decode :<br />
GPIO pin number is determined by formula:<br />
* GPIO_ID = GPIO_port * 8 + GPIO_pin + 120<br />
Example:<br />
P42_4 has its id 460 with above formula (42 * 8 + 4 + 120).<br />
* Example GPIO input function by using PMOD slide switch https://digilent.com/shop/pmod-swt-4-user-slide-switches/<br />
<pre><br />
root@smarc-rzg2l:~# echo 460 > /sys/class/gpio/export<br />
root@smarc-rzg2l:~# echo in > /sys/class/gpio/gpio460/direction <br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value <br />
1<br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value # after switch off<br />
0<br />
</pre></div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_kernel&diff=1013RZ-G/RZG kernel2022-02-03T20:10:25Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G kernel Information}}<br />
← [[RZ-G]]<br />
<br />
= CPU Hotplug =<br />
You can enable and disable CPU cores by writing to a sysfs value.<br />
<br><br />
This is helpful for when you want to experiment with the performance of your application if you were to use a processor with less CPU cores.<br />
<br />
For example, this command will disable the 2nd core.<br />
<br />
<code>$ echo 0 > /sys/devices/system/cpu/cpu1/online</code><br />
<br />
More detailed information can be found here: https://www.cyberciti.biz/faq/debian-rhel-centos-redhat-suse-hotplug-cpu<br />
<br />
<br />
= Power Saving =<br />
* In Linux, this is a mechanism that is generally supported by all kernels.(it may depend on the version) <br />
* The Renesas kernel has support them. <br />
<br />
About power consumption in RZ/G2 series, we have some supported features to save power cost in default environment: <br />
* CPUHotplug: Turn on/off CPU in runtime. <br />
* CPUIdle: Support 2 modes to turn off clock or power domain of CPU when CPU is idle (nothing to do). <br />
** Sleep mode: put in sleep state. <br />
** Core standby mode: put in shutdown state. It is described in devicetree of each SoC => It has deeper state than sleep mode so that save more power. <br />
* CPUFreq: there are 6 governors to support "Dynamic Frequency Scaling": <br />
** '''Performance''': The frequency is always set maximum => It is using as default in our current environment. <br />
** '''Powersave''': The frequency is always set minimum. <br />
** '''Ondemand''': If CPU load is bigger than 95%, the frequency is set max. If CPU load is equal to or less than 95%, the frequency is set based on CPU load. <br />
** Conservative: If CPU load is bigger than 80%, the frequency is set one level higher than current frequency. If CPU load is equal to or less than 20%, the frequency is set one level lower than current frequency. <br />
** '''Userspace''': It sets frequency which is defined by user in runtime. <br />
** '''Schedutil''': Schedutil governor is driven by scheduler. It uses scheduler-provided CPU utilization information as input for making its decisions by formula: freq_next= 1.25 * freq_max* util_of_CPU. <br />
* Power Domain: it is supported as default by Linux Power Management Framework. If a module is not use, system will disable its clock and power domain automatically. <br />
<br />
Therefore, select proper method will be based on user's purpose. Here are my examples: <br />
* Want to use with best performance: disable CPUIdle + use performance frequency governor. <br />
* Want to use less power: enable CPUIdle + use powersave frequency governor. <br />
* Want to balance performance and power: we can use schedutil. <br />
* Want to modify frequency as user's purpose: use userspance frequency governor. <br />
* If user is running realtime environment, I suggest using performance governor to ensure the minimum latency. <br />
Here are some commands to check frequency value and frequency governor in linux: <br />
* Check available CPU frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_frequencies </code><br />
* Check available CPU frequency governor:<br />
: <code>cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_governors </code><br />
* Change to other governor:<br />
: <code>echo performance > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor (performance/userspace/schedutil/...) </code><br />
* Check current frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq</code><br />
<br />
= PMIC Access from Linux =<br />
The easiest way to access the PMIC registers from command line would would be to use i2ctools. Add the following line to your local.conf.<br />
: <code>IMAGE_INSTALL_append = " i2c-tools"</code><br />
<br />
However the PMICs are connected to a I2C (IIC for PMIC or I2C_DVFS) that is not enabled in the default kernel device tree.<br />
For the HiHope boards, you can edit the file <code>arch/arm64/boot/dts/renesas/hihope-common.dtsi</code> and add the following lines at the very bottom of the file.<br />
<pre><br />
&i2c_dvfs {<br />
status = "okay";<br />
};<br />
</pre><br />
<br />
Once booted in Linux, the corresponding device should be /dev/i2c-7 <br />
<br />
You can query the connected slaves by giving the following command: <br />
: <code> i2cdetect -y -r 7 </code><br />
that on the RZ/G2E board produces the output: <br />
<pre>0 1 2 3 4 5 6 7 8 9 a b c d e f <br />
00: -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1e 1f <br />
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
70: -- -- -- -- -- -- -- -- </pre><br />
So two slaves, at address 0x1e and 0x1f. <br />
Finally you can read registers by simply using the i2cget command, for example: <br />
<pre><br />
i2cget -y 7 0x1e 0x1 <br />
0x02 <br />
i2cget -y 7 0x1e 0x16 <br />
0x00 <br />
i2cget -y 7 0x1e 0x17 <br />
0xc4 <br />
</pre><br />
<br />
If you don't want (or can't) update the device tree blob, you could use u-boot to do it temporarily.<br />
The procedure below is valid for RZ/G2M but it works also with RZ/G2E-N-H by simply modifying the device tree blob and/or kernel image names. <br />
<br />
1) Interrupt the normal kernel boot<br />
<br />
2) Once in u-boot, enter the follow commands (after each RESET)<br />
<pre>=> fatload mmc 0:1 0x48080000 Image; fatload mmc 0:1 0x48000000 Image-r8a774a1-hihope-rzg2m-ex.dtb; <br />
=> fdt addr 0x48000000 <br />
=> fdt set /soc/i2c@e60b0000 status "okay"</pre><br />
and finally boot the kernel: <br />
<pre>=> booti 0x48080000 - 0x48000000 </pre><br />
<br />
= Create a uImage =<br />
In the kernel, there is no make target to make a uImage for the 64-bit ARM architecture like there is for 32-bit ARM.<br />
However, you can manually make one from the file Image.gz that is created by the kernel build system by using the following command on your host machine.<br />
<pre><br />
$ cd arch/arm64/boot<br />
$ mkimage -A arm64 -O linux -T kernel -C gzip -a 0x48080000 -e 0x48080000 -n "Linux Kernel Image" -d Image.gz uImage<br />
</pre><br />
<br />
Below is an example of booting this image on a RZ/G2 HiHiope board from u-boot.<br />
<pre><br />
=> fatload mmc 0:1 0x88000000 uImage<br />
=> fatload mmc 0:1 0x48000000 Image-r8a774e1-hihope-rzg2h-ex.dtb<br />
=> bootm 0x88000000 - 0x48000000<br />
</pre><br />
<br />
= Building mainline / LTS Linux kernel for RZ/G2E-N-M-H =<br />
The Verified Linux Package (VLP) includes the CIP kernel (v4.19.x) and this is the only official way to build a kernel that has all the features in. However it is possible to build a working kernel directly from mainline. The kernel built in this way does not provide most of the multimedia functionalities (e.g. GPU, codec, etc). <br />
<br />
A recent [https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads Linaro toolchain] is needed to build the kernel. The instructions below are for v5.10.x, newer kernel versions can be built as well in a similar way.<br />
git clone <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/</nowiki><br />
<br />
git checkout tags/v5.10.42<br />
or anyway the latest minor revision including bug fixes.<br />
<br />
Copy Renesas default kernel build into .out/.config:<br />
cp arch/arm64/configs/renesas_defconfig .out/.config<br />
or, if not present, get from the repository:<br />
wget -O .out/.config <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/plain/arch/arm64/configs/renesas_defconfig</nowiki><br />
If you want to be able to build modules:<br />
echo CONFIG_MODULES=y >> .out/.config<br />
<br />
echo CONFIG_MODULE_UNLOAD=y >> .out/.config<br />
Run kernel configuration:<br />
make O=.out menuconfig<br />
Exit and save. Then launch the build:<br />
make O=.out all -j$(nproc)<br />
<br />
= Renesas RZ/G2 PCIe Endpoint Driver =<br />
* [[RZ-G/RZG2_pcie_ep | Click Here]]<br />
<br />
= GPIO Pin Usage =<br />
Since linux-4.8 the GPIO sysfs interface is [https://www.kernel.org/doc/Documentation/gpio/sysfs.txt deprecated]. User space should use the character device instead. The libgpiod library encapsulates the ioctl calls and data structures behind a straightforward API.<br />
<br />
Also, the kernel source code contains a GPIO utility for user space. Please see directory tools/gpio/ in the kernel source code.<br />
<br />
== GPIO Programming ==<br />
=== Character device – user API (linux/gpio.h) : ===<br />
The linux kernel is distributed with three basic user-mode tools written for testing the GPIO interface. The source can be found in linux/tools/gpio/.<br />
The three tools are: <br><br />
a) lsgpio – example on how to list the GPIO lines on a system<br><br />
b) gpio-event-mon – monitor GPIO line events from userspace<br><br />
c) gpio-hammer- example to shake GPIO lines on a system<br><br />
*Note:These are useful for debugging GPIO lines, but none of these tools will allow the user to configure, set and clear GPIO lines.<br><br />
However, you can use user API (chip info, line info, line request for values, reading values, setting values, line request for events, polling for events annd reading events) from linux/gpio.h to program GPIO. <br><br />
GPIO pin number for RZ/G2M/H/N/E is determined by using lsgpio:<br />
<pre><br />
GPIO chip: gpiochip6, "e6055400.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
GPIO chip: gpiochip5, "e6055000.gpio", 20 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 19: unnamed unused [output]<br />
GPIO chip: gpiochip4, "e6054000.gpio", 11 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 10: unnamed unused<br />
GPIO chip: gpiochip3, "e6053000.gpio", 16 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 15: unnamed unused<br />
GPIO chip: gpiochip2, "e6052000.gpio", 26 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 25: unnamed "wlan-en-regulator" [kernel output]<br />
GPIO chip: gpiochip1, "e6051000.gpio", 23 GPIO lines<br />
line 0: unnamed "interrupt" [kernel]<br />
....<br />
....<br />
line 22: unnamed unused<br />
GPIO chip: gpiochip0, "e6050000.gpio", 18 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 17: unnamed unused<br />
</pre><br />
To access LED0, which is defined as GPIO5-19, you will use gpiochip5 chip and line 19.<br><br />
* RZ/G2L: Check board schematic to know the index of a pin (example P0_0, P43_0, ...). Then you will know the index of GPIO under Px_y (x: port number, y: pin number) is (8*x + y). Example P0_0 is 0, P5_1 is 41(8*5+1).<br><br />
<pre><br />
GPIO chip: gpiochip0, "11030000.pin-controller", 392 GPIO lines<br />
line 0: unnamed unused<br />
....<br />
....<br />
line 390: unnamed unused<br />
line 391: unnamed unused<br />
</pre><br />
* Example: To access, P43_1, you need to use, gpiochip0 and line 345 (43*8 + 1)<br><br />
* [[Media:gpio_led_linux.zip| Sample Code]] to blink LED0(GPIO5-19) RZG2E RevC using linux/gpio.h API<br />
Note: To run, download the yocto SDK for RZG2E Rev C<br><br />
<pre><br />
$ source /opt/poky/2.4.3/environment-setup-aarch64-poky-linux<br />
$ make<br />
</pre><br />
=== Using libgpiod : ===<br />
Currently, in RZ/G GPIO driver, pin names are not exported so finding pin ID for a specific port name using gpiofind is not possible.<br><br />
Also currently, the line number outputed from gpioinfo does not work as global pin ID.<br />
=== Using sysfs interface : ===<br />
GPIO pin number for RZ/G2M/H/N/E is determined by:<br />
* GPIO_ID = GPIO Bank Address + Pin Number <br />
<pre><br />
RZ/G2E RZ/G2M/N/H<br />
GPIO Bank Address GPIO Bank Address<br />
GPIO 0 494 GPIO 0 496 <br />
GPIO 1 471 GPIO 1 467<br />
GPIO 2 445 GPIO 2 452 <br />
GPIO 3 429 GPIO 3 436<br />
GPIO 4 418 GPIO 4 418<br />
GPIO 5 398 GPIO 5 392<br />
GPIO 6 380 GPIO 6 360<br />
GPIO 7 356<br />
</pre><br />
Example:<br><br />
*For RZ/G2E, GPIO number of GP5_19 is 398 + 19 = 417<br />
*Example: Turn on/off LED0 GP5_19 => gpio417 on RZ/G2E (Rev C) board<br><br />
NOTE: GP5_19 is defined as a GPIO LED0 in Device Tree. So you<br />
need to either remove that from the Device Tree and reprogram the board, or <br><br />
you can remove it from device tree in uboot using fdt command. Below is the example using fdt<br />
<pre><br />
=> setenv gpioLED_1=fatload mmc 0:1 0x48080000 Image-ek874.bin; fatload mmc 0:1 0x48000000 Image-r8a774c0-ek874-revc-mipi-2.1.dtb<br />
=> setenv gpioLED_2=fdt addr 0x48000000 ; fdt rm /leds<br />
=> setenv gpioLED_3=booti 0x48080000 - 0x48000000<br />
=> setenv gpioLED_boot=run gpioLED_1 gpioLED_2 gpioLED_3<br />
=> setenv<br />
Then run the command to boot<br />
=> run gpioLED_boot<br />
</pre><br />
Now, lets turn on/off switch using sysfs:<br />
<pre><br />
root@ek874:~# echo 417 > /sys/class/gpio/export # request gpio417<br />
root@ek874:~# echo out > /sys/class/gpio/gpio417/direction # set gpio417 (GP5_19) output<br />
root@ek874:~# echo 1 > /sys/class/gpio/gpio417/value # turn ON LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
1<br />
root@ek874:~# echo 0 > /sys/class/gpio/gpio417/value # turn OFF LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
0<br />
</pre><br />
RZ/G2L Pin Decode :<br />
GPIO pin number is determined by formula:<br />
* GPIO_ID = GPIO_port * 8 + GPIO_pin + 120<br />
Example:<br />
P42_4 has its id 460 with above formula (42 * 8 + 4 + 120).<br />
* Example GPIO input function by using PMOD slide switch https://digilent.com/shop/pmod-swt-4-user-slide-switches/<br />
<pre><br />
root@smarc-rzg2l:~# echo 460 > /sys/class/gpio/export<br />
root@smarc-rzg2l:~# echo in > /sys/class/gpio/gpio460/direction <br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value <br />
1<br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value # after switch off<br />
0<br />
</pre></div>Padhikarihttps://renesas.info/w/index.php?title=File:gpio_led_linux.zip&diff=1012File:gpio led linux.zip2022-02-03T19:45:43Z<p>Padhikari: </p>
<hr />
<div></div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_kernel&diff=998RZ-G/RZG kernel2022-01-27T06:40:50Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G kernel Information}}<br />
← [[RZ-G]]<br />
<br />
= CPU Hotplug =<br />
You can enable and disable CPU cores by writing to a sysfs value.<br />
<br><br />
This is helpful for when you want to experiment with the performance of your application if you were to use a processor with less CPU cores.<br />
<br />
For example, this command will disable the 2nd core.<br />
<br />
<code>$ echo 0 > /sys/devices/system/cpu/cpu1/online</code><br />
<br />
More detailed information can be found here: https://www.cyberciti.biz/faq/debian-rhel-centos-redhat-suse-hotplug-cpu<br />
<br />
<br />
= Power Saving =<br />
* In Linux, this is a mechanism that is generally supported by all kernels.(it may depend on the version) <br />
* The Renesas kernel has support them. <br />
<br />
About power consumption in RZ/G2 series, we have some supported features to save power cost in default environment: <br />
* CPUHotplug: Turn on/off CPU in runtime. <br />
* CPUIdle: Support 2 modes to turn off clock or power domain of CPU when CPU is idle (nothing to do). <br />
** Sleep mode: put in sleep state. <br />
** Core standby mode: put in shutdown state. It is described in devicetree of each SoC => It has deeper state than sleep mode so that save more power. <br />
* CPUFreq: there are 6 governors to support "Dynamic Frequency Scaling": <br />
** '''Performance''': The frequency is always set maximum => It is using as default in our current environment. <br />
** '''Powersave''': The frequency is always set minimum. <br />
** '''Ondemand''': If CPU load is bigger than 95%, the frequency is set max. If CPU load is equal to or less than 95%, the frequency is set based on CPU load. <br />
** Conservative: If CPU load is bigger than 80%, the frequency is set one level higher than current frequency. If CPU load is equal to or less than 20%, the frequency is set one level lower than current frequency. <br />
** '''Userspace''': It sets frequency which is defined by user in runtime. <br />
** '''Schedutil''': Schedutil governor is driven by scheduler. It uses scheduler-provided CPU utilization information as input for making its decisions by formula: freq_next= 1.25 * freq_max* util_of_CPU. <br />
* Power Domain: it is supported as default by Linux Power Management Framework. If a module is not use, system will disable its clock and power domain automatically. <br />
<br />
Therefore, select proper method will be based on user's purpose. Here are my examples: <br />
* Want to use with best performance: disable CPUIdle + use performance frequency governor. <br />
* Want to use less power: enable CPUIdle + use powersave frequency governor. <br />
* Want to balance performance and power: we can use schedutil. <br />
* Want to modify frequency as user's purpose: use userspance frequency governor. <br />
* If user is running realtime environment, I suggest using performance governor to ensure the minimum latency. <br />
Here are some commands to check frequency value and frequency governor in linux: <br />
* Check available CPU frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_frequencies </code><br />
* Check available CPU frequency governor:<br />
: <code>cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_governors </code><br />
* Change to other governor:<br />
: <code>echo performance > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor (performance/userspace/schedutil/...) </code><br />
* Check current frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq</code><br />
<br />
= PMIC Access from Linux =<br />
The easiest way to access the PMIC registers from command line would would be to use i2ctools. Add the following line to your local.conf.<br />
: <code>IMAGE_INSTALL_append = " i2c-tools"</code><br />
<br />
However the PMICs are connected to a I2C (IIC for PMIC or I2C_DVFS) that is not enabled in the default kernel device tree.<br />
For the HiHope boards, you can edit the file <code>arch/arm64/boot/dts/renesas/hihope-common.dtsi</code> and add the following lines at the very bottom of the file.<br />
<pre><br />
&i2c_dvfs {<br />
status = "okay";<br />
};<br />
</pre><br />
<br />
Once booted in Linux, the corresponding device should be /dev/i2c-7 <br />
<br />
You can query the connected slaves by giving the following command: <br />
: <code> i2cdetect -y -r 7 </code><br />
that on the RZ/G2E board produces the output: <br />
<pre>0 1 2 3 4 5 6 7 8 9 a b c d e f <br />
00: -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1e 1f <br />
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
70: -- -- -- -- -- -- -- -- </pre><br />
So two slaves, at address 0x1e and 0x1f. <br />
Finally you can read registers by simply using the i2cget command, for example: <br />
<pre><br />
i2cget -y 7 0x1e 0x1 <br />
0x02 <br />
i2cget -y 7 0x1e 0x16 <br />
0x00 <br />
i2cget -y 7 0x1e 0x17 <br />
0xc4 <br />
</pre><br />
<br />
If you don't want (or can't) update the device tree blob, you could use u-boot to do it temporarily.<br />
The procedure below is valid for RZ/G2M but it works also with RZ/G2E-N-H by simply modifying the device tree blob and/or kernel image names. <br />
<br />
1) Interrupt the normal kernel boot<br />
<br />
2) Once in u-boot, enter the follow commands (after each RESET)<br />
<pre>=> fatload mmc 0:1 0x48080000 Image; fatload mmc 0:1 0x48000000 Image-r8a774a1-hihope-rzg2m-ex.dtb; <br />
=> fdt addr 0x48000000 <br />
=> fdt set /soc/i2c@e60b0000 status "okay"</pre><br />
and finally boot the kernel: <br />
<pre>=> booti 0x48080000 - 0x48000000 </pre><br />
<br />
= Create a uImage =<br />
In the kernel, there is no make target to make a uImage for the 64-bit ARM architecture like there is for 32-bit ARM.<br />
However, you can manually make one from the file Image.gz that is created by the kernel build system by using the following command on your host machine.<br />
<pre><br />
$ cd arch/arm64/boot<br />
$ mkimage -A arm64 -O linux -T kernel -C gzip -a 0x48080000 -e 0x48080000 -n "Linux Kernel Image" -d Image.gz uImage<br />
</pre><br />
<br />
Below is an example of booting this image on a RZ/G2 HiHiope board from u-boot.<br />
<pre><br />
=> fatload mmc 0:1 0x88000000 uImage<br />
=> fatload mmc 0:1 0x48000000 Image-r8a774e1-hihope-rzg2h-ex.dtb<br />
=> bootm 0x88000000 - 0x48000000<br />
</pre><br />
<br />
= Building mainline / LTS Linux kernel for RZ/G2E-N-M-H =<br />
The Verified Linux Package (VLP) includes the CIP kernel (v4.19.x) and this is the only official way to build a kernel that has all the features in. However it is possible to build a working kernel directly from mainline. The kernel built in this way does not provide most of the multimedia functionalities (e.g. GPU, codec, etc). <br />
<br />
A recent [https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads Linaro toolchain] is needed to build the kernel. The instructions below are for v5.10.x, newer kernel versions can be built as well in a similar way.<br />
git clone <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/</nowiki><br />
<br />
git checkout tags/v5.10.42<br />
or anyway the latest minor revision including bug fixes.<br />
<br />
Copy Renesas default kernel build into .out/.config:<br />
cp arch/arm64/configs/renesas_defconfig .out/.config<br />
or, if not present, get from the repository:<br />
wget -O .out/.config <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/plain/arch/arm64/configs/renesas_defconfig</nowiki><br />
If you want to be able to build modules:<br />
echo CONFIG_MODULES=y >> .out/.config<br />
<br />
echo CONFIG_MODULE_UNLOAD=y >> .out/.config<br />
Run kernel configuration:<br />
make O=.out menuconfig<br />
Exit and save. Then launch the build:<br />
make O=.out all -j$(nproc)<br />
<br />
= Renesas RZ/G2 PCIe Endpoint Driver =<br />
* [[RZ-G/RZG2_pcie_ep | Click Here]]<br />
<br />
= GPIO Pin Usage =<br />
Since linux-4.8 the GPIO sysfs interface is [https://www.kernel.org/doc/Documentation/gpio/sysfs.txt deprecated]. User space should use the character device instead. The libgpiod library encapsulates the ioctl calls and data structures behind a straightforward API.<br />
<br />
Also, the kernel source code contains a GPIO utility for user space. Please see directory tools/gpio/ in the kernel source code.<br />
<br />
== GPIO Programming ==<br />
=== Using libgpiod : ===<br />
Currently, in RZ/G GPIO driver, pin names are not exported so finding pin ID for a specific port name using gpiofind is not possible.<br><br />
Also currently, the line number outputed from gpioinfo does not work as global pin ID.<br />
=== Using sysfs interface : ===<br />
GPIO pin number for RZ/G2M/H/N/E is determined by:<br />
* GPIO_ID = GPIO Bank Address + Pin Number <br />
<pre><br />
RZ/G2E RZ/G2M/N/H<br />
GPIO Bank Address GPIO Bank Address<br />
GPIO 0 494 GPIO 0 496 <br />
GPIO 1 471 GPIO 1 467<br />
GPIO 2 445 GPIO 2 452 <br />
GPIO 3 429 GPIO 3 436<br />
GPIO 4 418 GPIO 4 418<br />
GPIO 5 398 GPIO 5 392<br />
GPIO 6 380 GPIO 6 360<br />
GPIO 7 356<br />
</pre><br />
Example:<br><br />
*For RZ/G2E, GPIO number of GP5_19 is 398 + 19 = 417<br />
*Example: Turn on/off LED0 GP5_19 => gpio417 on RZ/G2E (Rev C) board<br><br />
NOTE: GP5_19 is defined as a GPIO LED0 in Device Tree. So you<br />
need to either remove that from the Device Tree and reprogram the board, or <br><br />
you can remove it from device tree in uboot using fdt command. Below is the example using fdt<br />
<pre><br />
=> setenv gpioLED_1=fatload mmc 0:1 0x48080000 Image-ek874.bin; fatload mmc 0:1 0x48000000 Image-r8a774c0-ek874-revc-mipi-2.1.dtb<br />
=> setenv gpioLED_2=fdt addr 0x48000000 ; fdt rm /leds<br />
=> setenv gpioLED_3=booti 0x48080000 - 0x48000000<br />
=> setenv gpioLED_boot=run gpioLED_1 gpioLED_2 gpioLED_3<br />
=> setenv<br />
Then run the command to boot<br />
=> run gpioLED_boot<br />
</pre><br />
Now, lets turn on/off switch using sysfs:<br />
<pre><br />
root@ek874:~# echo 417 > /sys/class/gpio/export # request gpio417<br />
root@ek874:~# echo out > /sys/class/gpio/gpio417/direction # set gpio417 (GP5_19) output<br />
root@ek874:~# echo 1 > /sys/class/gpio/gpio417/value # turn ON LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
1<br />
root@ek874:~# echo 0 > /sys/class/gpio/gpio417/value # turn OFF LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
0<br />
</pre><br />
RZ/G2L Pin Decode :<br />
GPIO pin number is determined by formula:<br />
* GPIO_ID = GPIO_port * 8 + GPIO_pin + 120<br />
Example:<br />
P42_4 has its id 460 with above formula (42 * 8 + 4 + 120).<br />
* Example GPIO input function by using PMOD slide switch https://digilent.com/shop/pmod-swt-4-user-slide-switches/<br />
<pre><br />
root@smarc-rzg2l:~# echo 460 > /sys/class/gpio/export<br />
root@smarc-rzg2l:~# echo in > /sys/class/gpio/gpio460/direction <br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value <br />
1<br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value # after switch off<br />
0<br />
</pre></div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_kernel&diff=997RZ-G/RZG kernel2022-01-27T06:38:38Z<p>Padhikari: /* GPIO Pin Usage */</p>
<hr />
<div>{{DISPLAYTITLE:RZ/G kernel Information}}<br />
← [[RZ-G]]<br />
<br />
= CPU Hotplug =<br />
You can enable and disable CPU cores by writing to a sysfs value.<br />
<br><br />
This is helpful for when you want to experiment with the performance of your application if you were to use a processor with less CPU cores.<br />
<br />
For example, this command will disable the 2nd core.<br />
<br />
<code>$ echo 0 > /sys/devices/system/cpu/cpu1/online</code><br />
<br />
More detailed information can be found here: https://www.cyberciti.biz/faq/debian-rhel-centos-redhat-suse-hotplug-cpu<br />
<br />
<br />
= Power Saving =<br />
* In Linux, this is a mechanism that is generally supported by all kernels.(it may depend on the version) <br />
* The Renesas kernel has support them. <br />
<br />
About power consumption in RZ/G2 series, we have some supported features to save power cost in default environment: <br />
* CPUHotplug: Turn on/off CPU in runtime. <br />
* CPUIdle: Support 2 modes to turn off clock or power domain of CPU when CPU is idle (nothing to do). <br />
** Sleep mode: put in sleep state. <br />
** Core standby mode: put in shutdown state. It is described in devicetree of each SoC => It has deeper state than sleep mode so that save more power. <br />
* CPUFreq: there are 6 governors to support "Dynamic Frequency Scaling": <br />
** '''Performance''': The frequency is always set maximum => It is using as default in our current environment. <br />
** '''Powersave''': The frequency is always set minimum. <br />
** '''Ondemand''': If CPU load is bigger than 95%, the frequency is set max. If CPU load is equal to or less than 95%, the frequency is set based on CPU load. <br />
** Conservative: If CPU load is bigger than 80%, the frequency is set one level higher than current frequency. If CPU load is equal to or less than 20%, the frequency is set one level lower than current frequency. <br />
** '''Userspace''': It sets frequency which is defined by user in runtime. <br />
** '''Schedutil''': Schedutil governor is driven by scheduler. It uses scheduler-provided CPU utilization information as input for making its decisions by formula: freq_next= 1.25 * freq_max* util_of_CPU. <br />
* Power Domain: it is supported as default by Linux Power Management Framework. If a module is not use, system will disable its clock and power domain automatically. <br />
<br />
Therefore, select proper method will be based on user's purpose. Here are my examples: <br />
* Want to use with best performance: disable CPUIdle + use performance frequency governor. <br />
* Want to use less power: enable CPUIdle + use powersave frequency governor. <br />
* Want to balance performance and power: we can use schedutil. <br />
* Want to modify frequency as user's purpose: use userspance frequency governor. <br />
* If user is running realtime environment, I suggest using performance governor to ensure the minimum latency. <br />
Here are some commands to check frequency value and frequency governor in linux: <br />
* Check available CPU frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_frequencies </code><br />
* Check available CPU frequency governor:<br />
: <code>cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_available_governors </code><br />
* Change to other governor:<br />
: <code>echo performance > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor (performance/userspace/schedutil/...) </code><br />
* Check current frequency:<br />
: <code> cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq</code><br />
<br />
= PMIC Access from Linux =<br />
The easiest way to access the PMIC registers from command line would would be to use i2ctools. Add the following line to your local.conf.<br />
: <code>IMAGE_INSTALL_append = " i2c-tools"</code><br />
<br />
However the PMICs are connected to a I2C (IIC for PMIC or I2C_DVFS) that is not enabled in the default kernel device tree.<br />
For the HiHope boards, you can edit the file <code>arch/arm64/boot/dts/renesas/hihope-common.dtsi</code> and add the following lines at the very bottom of the file.<br />
<pre><br />
&i2c_dvfs {<br />
status = "okay";<br />
};<br />
</pre><br />
<br />
Once booted in Linux, the corresponding device should be /dev/i2c-7 <br />
<br />
You can query the connected slaves by giving the following command: <br />
: <code> i2cdetect -y -r 7 </code><br />
that on the RZ/G2E board produces the output: <br />
<pre>0 1 2 3 4 5 6 7 8 9 a b c d e f <br />
00: -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1e 1f <br />
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <br />
70: -- -- -- -- -- -- -- -- </pre><br />
So two slaves, at address 0x1e and 0x1f. <br />
Finally you can read registers by simply using the i2cget command, for example: <br />
<pre><br />
i2cget -y 7 0x1e 0x1 <br />
0x02 <br />
i2cget -y 7 0x1e 0x16 <br />
0x00 <br />
i2cget -y 7 0x1e 0x17 <br />
0xc4 <br />
</pre><br />
<br />
If you don't want (or can't) update the device tree blob, you could use u-boot to do it temporarily.<br />
The procedure below is valid for RZ/G2M but it works also with RZ/G2E-N-H by simply modifying the device tree blob and/or kernel image names. <br />
<br />
1) Interrupt the normal kernel boot<br />
<br />
2) Once in u-boot, enter the follow commands (after each RESET)<br />
<pre>=> fatload mmc 0:1 0x48080000 Image; fatload mmc 0:1 0x48000000 Image-r8a774a1-hihope-rzg2m-ex.dtb; <br />
=> fdt addr 0x48000000 <br />
=> fdt set /soc/i2c@e60b0000 status "okay"</pre><br />
and finally boot the kernel: <br />
<pre>=> booti 0x48080000 - 0x48000000 </pre><br />
<br />
= Create a uImage =<br />
In the kernel, there is no make target to make a uImage for the 64-bit ARM architecture like there is for 32-bit ARM.<br />
However, you can manually make one from the file Image.gz that is created by the kernel build system by using the following command on your host machine.<br />
<pre><br />
$ cd arch/arm64/boot<br />
$ mkimage -A arm64 -O linux -T kernel -C gzip -a 0x48080000 -e 0x48080000 -n "Linux Kernel Image" -d Image.gz uImage<br />
</pre><br />
<br />
Below is an example of booting this image on a RZ/G2 HiHiope board from u-boot.<br />
<pre><br />
=> fatload mmc 0:1 0x88000000 uImage<br />
=> fatload mmc 0:1 0x48000000 Image-r8a774e1-hihope-rzg2h-ex.dtb<br />
=> bootm 0x88000000 - 0x48000000<br />
</pre><br />
<br />
= Building mainline / LTS Linux kernel for RZ/G2E-N-M-H =<br />
The Verified Linux Package (VLP) includes the CIP kernel (v4.19.x) and this is the only official way to build a kernel that has all the features in. However it is possible to build a working kernel directly from mainline. The kernel built in this way does not provide most of the multimedia functionalities (e.g. GPU, codec, etc). <br />
<br />
A recent [https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads Linaro toolchain] is needed to build the kernel. The instructions below are for v5.10.x, newer kernel versions can be built as well in a similar way.<br />
git clone <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/</nowiki><br />
<br />
git checkout tags/v5.10.42<br />
or anyway the latest minor revision including bug fixes.<br />
<br />
Copy Renesas default kernel build into .out/.config:<br />
cp arch/arm64/configs/renesas_defconfig .out/.config<br />
or, if not present, get from the repository:<br />
wget -O .out/.config <nowiki>https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/plain/arch/arm64/configs/renesas_defconfig</nowiki><br />
If you want to be able to build modules:<br />
echo CONFIG_MODULES=y >> .out/.config<br />
<br />
echo CONFIG_MODULE_UNLOAD=y >> .out/.config<br />
Run kernel configuration:<br />
make O=.out menuconfig<br />
Exit and save. Then launch the build:<br />
make O=.out all -j$(nproc)<br />
<br />
= Renesas RZ/G2 PCIe Endpoint Driver =<br />
* [[RZ-G/RZG2_pcie_ep | Click Here]]<br />
<br />
= GPIO Pin Usage =<br />
Since linux-4.8 the GPIO sysfs interface is [https://www.kernel.org/doc/Documentation/gpio/sysfs.txt deprecated]. User space should use the character device instead. The libgpiod library encapsulates the ioctl calls and data structures behind a straightforward API.<br />
<br />
Also, the kernel source code contains a GPIO utility for user space. Please see directory tools/gpio/ in the kernel source code.<br />
<br />
== GPIO Programming ==<br />
=== Using libgpiod : ===<br />
Currently, in RZ/G GPIO driver, pin names are not exported so finding pin ID for a specific port name using gpiofind is not possible. Also currently, the line number outputed from gpioinfo does not work as global pin ID <br />
=== Using sysfs interface : ===<br />
GPIO pin number for RZ/G2M/H/N/E is determined by:<br />
* GPIO_ID = GPIO Bank Address + Pin Number <br />
<pre><br />
RZ/G2E RZ/G2M/N/H<br />
GPIO Bank Address GPIO Bank Address<br />
GPIO 0 494 GPIO 0 496 <br />
GPIO 1 471 GPIO 1 467<br />
GPIO 2 445 GPIO 2 452 <br />
GPIO 3 429 GPIO 3 436<br />
GPIO 4 418 GPIO 4 418<br />
GPIO 5 398 GPIO 5 392<br />
GPIO 6 380 GPIO 6 360<br />
GPIO 7 356<br />
</pre><br />
Example:<br><br />
*For RZ/G2E, GPIO number of GP5_19 is 398 + 19 = 417<br />
*Example: Turn on/off LED0 GP5_19 => gpio417 on RZ/G2E (Rev C) board<br><br />
NOTE: GP5_19 is defined as a GPIO LED0 in Device Tree. So you<br />
need to either remove that from the Device Tree and reprogram the board, or <br><br />
you can remove it from device tree in uboot using fdt command. Below is the example using fdt<br />
<pre><br />
=> setenv gpioLED_1=fatload mmc 0:1 0x48080000 Image-ek874.bin; fatload mmc 0:1 0x48000000 Image-r8a774c0-ek874-revc-mipi-2.1.dtb<br />
=> setenv gpioLED_2=fdt addr 0x48000000 ; fdt rm /leds<br />
=> setenv gpioLED_3=booti 0x48080000 - 0x48000000<br />
=> setenv gpioLED_boot=run gpioLED_1 gpioLED_2 gpioLED_3<br />
=> setenv<br />
Then run the command to boot<br />
=> run gpioLED_boot<br />
</pre><br />
Now, lets turn on/off switch using sysfs:<br />
<pre><br />
root@ek874:~# echo 417 > /sys/class/gpio/export # request gpio417<br />
root@ek874:~# echo out > /sys/class/gpio/gpio417/direction # set gpio417 (GP5_19) output<br />
root@ek874:~# echo 1 > /sys/class/gpio/gpio417/value # turn ON LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
1<br />
root@ek874:~# echo 0 > /sys/class/gpio/gpio417/value # turn OFF LED0<br />
root@ek874:~# cat /sys/class/gpio/gpio417/value <br />
0<br />
</pre><br />
RZ/G2L Pin Decode :<br />
GPIO pin number is determined by formula:<br />
* GPIO_ID = GPIO_port * 8 + GPIO_pin + 120<br />
Example:<br />
P42_4 has its id 460 with above formula (42 * 8 + 4 + 120).<br />
* Example GPIO input function by using PMOD slide switch https://digilent.com/shop/pmod-swt-4-user-slide-switches/<br />
<pre><br />
root@smarc-rzg2l:~# echo 460 > /sys/class/gpio/export<br />
root@smarc-rzg2l:~# echo in > /sys/class/gpio/gpio460/direction <br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value <br />
1<br />
root@smarc-rzg2l:~# cat /sys/class/gpio/gpio460/value # after switch off<br />
0<br />
</pre></div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZ-G2_Engicam&diff=702RZ-G/RZ-G2 Engicam2021-10-28T21:14:47Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G2E i.Core EDIMM SOM by Engicam}}<br />
← [[RZ-G]]<br />
<br />
= BSP and User Manual =<br />
Engicam will provide the BSP and User Manual to get started with the board. They provide the technology support through their ticket system https://www.engicam.com/support/support-info.<br />
<br />
1. Create an user account in Engicam website https://www.engicam.com/register<br />
<br />
2. Once completing the registration, you can login to the system and will have your own user profile<br />
<br />
3. Click on Support Requests on your User Area and then insert the ticket for your requirement.<br />
<br />
= Prepare SD card for boot =<br />
<br />
1. Partition SD card with fdisk command<br />
<pre><br />
$ fdisk /dev/sda<br />
<presskey><br />
n<br />
p<br />
1<br />
<return><br />
<return><br />
W<br />
</pre><br />
2. Format SD in ext4 <br />
<pre> mkfs.ext4 /dev/sda1 </pre><br />
3. Mount the SD card and copy kernel, device tree and roofs made by yocto build to SD card<br />
<pre><br />
$ mount /dev/sda1 /mnt<br />
$ sudo tar -xvf core-image-qt-icorerzg2e.tar.gz -C /mnt<br />
$ cp /Image /mnt/<br />
$ cp /icore-rzg2e.dtb /mnt/<br />
$ umount /mnt/<br />
</pre><br />
<br />
4. To boot from SD card, enter on u-boot command line and type<br />
<pre><br />
=> setenv bootargs "console=ttySC0,115200n8 root=/dev/mmcblk2p1"<br />
=> setenv bootcmd "ext4load mmc 0 0x48080000 Image; ext4load mmc 0 0x48000000 icore-rzg2e.dtb; booti 0x48080000 - 0x48000000"<br />
=> saveenv<br />
</pre><br />
for eMMC boot:<br />
<pre><br />
=> setenv bootargs "console=ttySC0,115200n8 root=/dev/mmcblk1p1"<br />
=> setenv bootcmd "ext4load mmc 1 0x48080000 Image; ext4load mmc 1 0x48000000 icore-rzg2e.dtb; booti 0x48080000 - 0x48000000" <br />
=> saveenv <br />
</pre></div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG_camera&diff=689RZ-G/RZG camera2021-10-26T20:32:01Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G Camera Page}}<br />
← [[RZ-G]]<br />
<br />
= Displaying Camera Images using GStreamer =<br />
<br />
== Using MIPI Camera ==<br />
These instructions are for using a OV5645 MIPI Camera and [https://www.96boards.org/product/mipiadapter/ MIPI Adapter Mezzanine] board.<br />
<br />
Before GStreamer can be used, the VIN/CSI settings must best configured manually on the command line using the media-ctl utility. <br />
<br />
In the BSP, this is done by running the script /home/root/vin-init.sh in the rootfs. <br />
<br />
This file located in the BSP at rzg2_bsp_eva_v104/meta-rzg2/recipes-multimedia/vin-init/files/vin-init.sh <br />
<br />
The BSP also installs the file systemd service file "vin.service" into /etc/systemd/system/multi-user.target.wants/vin.service so that the vin-init.sh script runs automatically on system boot. <br />
<br />
For example, for RZ/G2E,the follow command will be executed: <br />
<pre><br />
media-ctl -d /dev/media0 -r <br />
media-ctl -d /dev/media0 -l "'rcar_csi2 feaa0000.csi2':1 -> 'VIN4 output':0 [1]" <br />
media-ctl -d /dev/media0 -V "'rcar_csi2 feaa0000.csi2':1 [fmt:UYVY8_2X8/1280x960 field:none]" <br />
media-ctl -d /dev/media0 -V "'ov5645 3-003c':0 [fmt:UYVY8_2X8/1280x960 field:none]" <br />
</pre><br />
This connects VIN4 (/dev/video0) to OV5645. <br />
<br />
The only thing you can change in G2E is 'VIN4 output' => 'VIN5 output' if you want to use /dev/video1<br />
<br />
For more information, please refer to the document '''R01US0400EJ0107_GStreamer_UME_v1.0x.pdf''' that comes the '''RZG2 Group BSP Manual Set''' that can be downloaded from renesas.com<br />
<br />
== Using USB Camera ==<br />
These instructions are useful to check if USB camera is working or not with RZ/G2 board.<br />
<br />
1. Check whether UVC driver is enabled or not. If there is no output, UVC driver is not enabled.<br />
<pre><br />
root@hihope-rzg2m:~# zcat /proc/config.gz | grep USB_VIDEO<br />
CONFIG_USB_VIDEO_CLASS=y<br />
CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y<br />
</pre><br />
<pre><br />
root@hihope-rzg2m:~# dmesg | grep uvcvideo<br />
[ 1.977174] usbcore: registered new interface driver uvcvideo<br />
[ 3.070300] uvcvideo: Found UVC 1.00 device HD Pro Webcam C920 (046d:0892)<br />
</pre><br />
2. Check camera device number<br />
<pre><br />
root@hihope-rzg2m:~# v4l2-ctl --list-devices<br />
fe960000.vsp rpf.0 input (platform:fe960000.vsp):<br />
/dev/video2<br />
/dev/video3<br />
/dev/video4<br />
/dev/video5<br />
/dev/video6<br />
/dev/video7<br />
<br />
fe9a0000.vsp rpf.0 input (platform:fe9a0000.vsp):<br />
/dev/video8<br />
/dev/video9<br />
<br />
HD Pro Webcam C920 (usb-ee000000.usb-1):<br />
/dev/video0<br />
</pre><br />
3. Run<br />
<pre><br />
root@hihope-rzg2m:~# modprobe uvcvideo # to enable USB camera driver<br />
root@hihope-rzg2m:~# gst-launch-1.0 v4l2src device=/dev/video0 ! videoconvert ! waylandsink<br />
</pre><br />
<br />
= AISTARVISION 96BOARDS MIPI Adapter v2.4 =<br />
{| class="toccolours" width="100%" style="border-style: none ; text-align: center; background-color:white;"<br />
|-<br />
| [[File:mipi adpater.jpg|frameless]]<br>'''Top view of AISTARVISION 96Boards MIPI Adapter version 2.4'''<br />
| [[File:OV5645.JPG |frameless|]] <br>'''OV5645 MIPI'''<br />
| [[File:mipi_adpater_OV5645.jpg|frameless]]<br>'''Connection OV5645 camera to adapter board'''<br />
|}<br />
<br />
== Connection guide for Silicon Linux RZ/G2E evaluation kit (EK874) ==<br />
To connect and use CSI40 with OV5645:<br><br />
1. Connect 20th pin to 19th pin on J13 header for I2C SCL line.<br><br />
2. Connect 22nd pin to 21st pin on J13 header for I2C SDA line.<br><br />
3. Connect 23rd pin to 6th pin on J15 header for supplying power to OV5645 camera sensor.<br><br />
4. Connect 6th pin to 5th pin and 4th pin to 3rd pin on J14 header for supplying clock to OV5645 camera sensor.<br><br />
5. Connect OV5645 camera sensor to J3 header for CSI40 Interface<br><br />
{| class="toccolours" width="100%" style="border-style: none ; text-align: center; background-color:white;"<br />
|-<br />
| style="text-align:left;" | [[File:rzg2e_pin_connection.png|frameless|]]<br>'''Instruction of connecting OV5645 camera module in EK874'''<br><br />
| style="text-align:left;" | [[File:rzg2e_mipi_adpter.jpg|frameless|]]<br>'''Connection of adpater board and G2E '''<br><br />
<br />
|}<br />
<br><br />
== Connection guide for HiHope RZ/G2M platform (hihope-rzg2m) ==<br />
To connect and use CSI20 with OV5645: <br><br />
1. Connect 15th pin to 16th pin on J13 header for I2C SCL line.<br><br />
2. Connect 17th pin to 18th pin on J13 header for I2C SDA line.<br><br />
3. Connect 24th pin to 14th pin on J15 header for supplying power to OV5645 camera sensor.<br><br />
4. Connect 6th pin to 5th pin and 4th pin to 3rd pin on J14 header for supplying clock to OV5645 camera sensor.<br><br />
5. Connect OV5645 camera sensor to J4 header. It uses for linking OV5645 with CSI20 Interface.<br><br />
{| class="toccolours" width="100%" style="border-style: none ; text-align: center; background-color:white;"<br />
|-<br />
| style="text-align:left;" | [[File:rzg2m_connect_pin.png|frameless|]]<br>'''Instruction of connecting OV5645 camera module in RZG2M'''<br><br />
| style="text-align:left;" | [[File:zg2m_mipi_adapter.jpg |frameless|]]<br>'''Connection of adpater board and RZG2M'''<br><br />
<br />
|}</div>Padhikarihttps://renesas.info/w/index.php?title=File:zg2m_mipi_adapter.jpg&diff=688File:zg2m mipi adapter.jpg2021-10-26T20:31:00Z<p>Padhikari: </p>
<hr />
<div></div>Padhikarihttps://renesas.info/w/index.php?title=File:rzg2e_mipi_adpter.jpg&diff=687File:rzg2e mipi adpter.jpg2021-10-26T19:37:11Z<p>Padhikari: </p>
<hr />
<div></div>Padhikarihttps://renesas.info/w/index.php?title=File:rzg2m_mipi_adapter.jpg&diff=686File:rzg2m mipi adapter.jpg2021-10-26T19:31:42Z<p>Padhikari: </p>
<hr />
<div></div>Padhikarihttps://renesas.info/w/index.php?title=File:rzg2m_connect_pin.png&diff=685File:rzg2m connect pin.png2021-10-26T19:29:55Z<p>Padhikari: </p>
<hr />
<div></div>Padhikarihttps://renesas.info/w/index.php?title=File:rzg2e_pin_connection.png&diff=684File:rzg2e pin connection.png2021-10-26T19:29:19Z<p>Padhikari: </p>
<hr />
<div></div>Padhikarihttps://renesas.info/w/index.php?title=File:mipi_adpater_OV5645.jpg&diff=683File:mipi adpater OV5645.jpg2021-10-26T19:27:28Z<p>Padhikari: </p>
<hr />
<div></div>Padhikarihttps://renesas.info/w/index.php?title=File:OV5645.JPG&diff=682File:OV5645.JPG2021-10-26T19:26:32Z<p>Padhikari: </p>
<hr />
<div></div>Padhikarihttps://renesas.info/w/index.php?title=File:mipi_adpater.jpg&diff=681File:mipi adpater.jpg2021-10-26T19:25:36Z<p>Padhikari: </p>
<hr />
<div></div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G&diff=609RZ-G2021-09-11T01:16:20Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G Series 32/64-bit MPU}}<br />
<br />
<img src="https://renesas.info/images/RZ.jpg" style="float:right" height="120"><br />
= Introduction = <br />
<br />
This page is for the Renesas RZ/G family of embedded SoCs. The main goal is to make the information about RZ/G SoCs friendly, easy to access for embedded developers.<br />
<br />
The links below can be used to get familiar with Renesas RZ/G SoC<br />
* '''[https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz/rz-introductory-guide.html Introductory Guide to the RZ MPU Family]'''<br />
<br />
Detailed information regarding RZ/G SoCs (including roadmap, technical and marketing documents, BSPs and middleware) can be obtained directly from a Renesas representative.<br />
<br />
= Boards =<br />
Here is the list of available '''[https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-cortex-a-mpus/rzg-linux-platform/rzg-marketplace/board-solutions Renesas Evaluation Boards (link)]''' and '''[https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rzg-partner-solutions Commercial SOM Boards and Partner Solutions (link)].<br />
<br />
'''RZ/G2 Series Evaluation Boards'''<br />
{| class="toccolours" width="100%" style="text-align: center"<br />
|-<br />
| colspan="3" style="text-align:left" | '''Support Pages'''<br />
|-<br />
| <font size=+1> <font color=#282A9D>◼</font> [[RZ-G/RZ-G2L_SMARC|RZ/G2L SMARC]] </font><br><img height=100px src=http://linuxgizmos.com/files/renesas_rzg2l_carrier.jpg><br>by Renesas<br />
| <font size=+1> <font color=#282A9D>◼</font> [[RZ-G/RZ-G2E_EK874|RZ/G2E EK874]] </font><br><img height=100px src=https://www.renesas.com/sites/default/files/media/images/rzg2n-reference-board-grid_0.jpg><br>by Silicon Linux<br />
| <font size=+1> <font color=#282A9D>◼</font> [[RZ-G/RZ-G2_HiHope|RZ/G2N,/G2M,/G2H HiHope]] </font><br><img height=100px src=https://www.renesas.com/sites/default/files/media/images/rzg2n-reference-board-grid_0.jpg><br>by HopeRun<br />
|-<br />
|}<br />
<br />
'''RZ/G2 Commercial Boards'''<br />
* RZ/G2E i.Core EDIMM SOM by Engicam<br />
** Engicam Product page: [https://www.engicam.com/vis-prod/101513/EDIMM-SOM-based-on-Renesas-RZG2E (link)]<br />
** Helpful Hints working with this board [[RZ-G/RZ-G2_Engicam|(link)]]<br />
* [https://www.tq-group.com/en/products/tq-embedded/arm-architecture/stkarzg2x RZ/G2N,/G2M,/G2H STKaRZG2x] by TQ Systems<br />
* [https://beaconembedded.com/project/rz-g2-som RZ/G2N,/G2M,/G2H SOM Series] by Beacon Embedded<br />
* [https://www.relysystech.com/product-specifications/rzg2-smarc-som-module RZ/G2N,/G2M,/G2H SMARC 2.0 SOM] by RelySys Technologies<br />
<br />
'''RZ/G1 Series Evaluation Boards'''<br />
{| class="toccolours" width="100%" style="text-align: center"<br />
|-<br />
| style="width: 33%;" | <font size=+1> <font color=#282A9D>◼</font> RZ/G1E SODIMM </font><br>by iWave<br />
| style="width: 33%;" | <font size=+1> <font color=#282A9D>◼</font> RZ/G1E Starter Kit </font><br>by Renesas<br />
| <br />
|-<br />
| style="width: 33%;" | <font size=+1> <font color=#282A9D>◼</font> RZ/G1M SODIMM </font><br>by iWave<br />
| style="width: 33%;" | <font size=+1> <font color=#282A9D>◼</font> RZ/G1N SODIMM </font><br>by iWave<br />
| style="width: 33%;" | <font size=+1> <font color=#282A9D>◼</font> RZ/G1H SODIMM </font><br>by iWave<br />
|-<br />
|}<br />
<br />
= Software and Documentation =<br />
* 📜 '''[https://www.renesas.com/us/en/products/rzg-linux-platform/rzg-marcketplace/document.html Official Renesas Online Documentation (link)]'''<br />
:: '''Highlights'''<br />
:: 📄 '''Platform | RZ/G2 Group Linux BSP Porting Guide (PDF)''' - How to modify the Renesas BSP to match your board<br />
:: 📄 '''Verified Linux packages | Linux Interface Specification Yocto recipe Start-Up Guide (PDF)''' - Building with Yocto, programming boot loaders and BSP Memory Map<br />
:: 📄 '''Verified Linux packages | RZ/G2 Group BSP Manual Set (PDF)''' - Information about BSP device drivers and Device Tree configurations. It also contains information regarding GStreamer and Wayland.<br />
:: 📄 '''Application Notes/Other | RZ/G2 Trusted Execution Environment Start-Up Guide (PDF)''' - Using ARM TrustZone and OP-TEE (Open Portable Trusted Execution Environment)<br />
* 📦 '''[[RZ-G/RZ-G2_BSP|RZ/G2 Linux BSP (link)]]''' support page<br />
<br />
= Topics =<br />
{| class="toccolours" width="100%" style="text-align: left"<br />
|-<br />
| <font size=+3>📦</font> '''[[RZ-G/RZ-G2_BSP|RZ/G2 Linux BSP]]'''<br />
| <font size=+3>📇</font> '''[[RZ-G/RZG_yocto | Yocto]]''' <br> (Common issues, suggestions, examples)<br />
|<br />
|-<br />
| <font size=+3>📷</font> '''[[RZ-G/RZG_camera | Camera]]'''<br />
| <font size=+3>🎨</font> '''[[RZ-G/RZG_graphics | Graphics]]''' <br>(Qt, video encode/decode)<br />
| <font size=+3>🖼️</font> '''[[RZ-G/RZG_weston | Wayland/Weston]]''' <br> (Helpful hints about running Weston with RZ/G)<br />
|<br />
|<br />
|-<br />
| <font size=+3>🐧</font> '''[[RZ-G/RZG_kernel | Kernel]]''' <br>(Dynamic Power, drivers, peripherals, etc..)<br />
| <font size=+3>🔑</font> '''[[RZ-G/RZG_arm_trusted_firmware | ARM Trusted Firmware]]'''<br />
| <font size=+3>🥾</font> '''[[RZ-G/RZG_uboot | u-boot]]'''<br />
|<br />
|-<br />
| <font size=+3>🐛</font> '''[[RZ-G/RZG_debug | Debugging ]]'''<br />
| <font size=+3>🚧</font> '''[[RZ-G/RZ-G2_BSP_Porting|RZ/G2 Linux BSP Porting]]''' <br>(Hints on porting to a new board)<br />
| <font size=+3>♻️</font> '''[[RZ-G/RZG_BSP_upgrade | BSP Kernel Update]]''' <br>(Instructions to update your kernel)<br />
|<br />
|-<br />
| <font size=+3>🎥</font> '''[[RZ-G/RZG_videos | Demo Videos]]'''<br />
| <font size=+3>🧠</font> '''[[RZ-G/RZ-G2_ai| AI and ML]]'''<br />
| <font size=+3>🏹</font> '''[[RZ-G/RZG2_pcie_ep | RZ/G2 PCIe EP]]''' <br>(PCIe Endpoint driver)<br />
|<br />
|}</div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZ-G2_Engicam&diff=608RZ-G/RZ-G2 Engicam2021-09-10T17:49:26Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G2E i.Core EDIMM SOM by Engicam}}<br />
← [[RZ-G]]<br />
<br />
= BSP and User Manual =<br />
Engicam will provide the BSP and User Manual to get started with the board. They provide the technology support through their ticket system https://www.engicam.com/support/support-info.<br />
<br />
1. Create an user account in Engigam website https://www.engicam.com/register<br />
<br />
2. Once completing the registration, you can login to the system and will have your own user profile<br />
<br />
3. Click on Support Requests on your User Area and then insert the ticket for your requirement.<br />
<br />
= Prepare SD card for boot =<br />
<br />
1. Partition SD card with fdisk command<br />
<pre><br />
$ fdisk /dev/sda<br />
<presskey><br />
n<br />
p<br />
1<br />
<return><br />
<return><br />
W<br />
</pre><br />
2. Format SD in ext4 <br />
<pre> mkfs.ext4 /dev/sda1 </pre><br />
3. Mount the SD card and copy kernel, device tree and roofs made by yocto build to SD card<br />
<pre><br />
$ mount /dev/sda1 /mnt<br />
$ sudo tar -xvf core-image-qt-icorerzg2e.tar.gz -C /mnt<br />
$ cp /Image /mnt/<br />
$ cp /icore-rzg2e.dtb /mnt/<br />
$ umount /mnt/<br />
</pre></div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZ-G2_Engicam&diff=607RZ-G/RZ-G2 Engicam2021-09-10T16:17:34Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G2E i.Core EDIMM SOM by Engicam}}<br />
← [[RZ-G]]<br />
<br />
= BSP and User Manual =<br />
Engicam will provide the BSP and User Manual to get started with the board. They provide the technology support through their ticket system https://www.engicam.com/support/support-info.<br />
<br />
1. Create an user account in Engigam website https://www.engicam.com/register<br />
<br />
2. Once completing the registration, you can login to the system and will have your own user profile<br />
<br />
3. Click on Support Requests on your User Area and then insert the ticket for your requirement.</div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZ-G2L_SMARC&diff=540RZ-G/RZ-G2L SMARC2021-08-17T16:23:32Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G2L SMARC Board by Renesas}}<br />
<img height="200" style="float:right" src=http://linuxgizmos.com/files/renesas_rzg2l_carrier.jpg><br />
← [[RZ-G]]<br />
<br />
= General Information =<br />
* [https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rzg2l-general-purpose-microprocessors-dual-core-arm-cortex-a55-12-ghz-cpus-3d-graphics-and-video-codec Official RZ/G2L Website ]<br />
** Please review the '''Documentation & Downloads''' section<br />
* Board Documentation<br />
** 📄 [https://www.renesas.com/us/en/document/ovr/rzg2l-evaluation-kit-module-board-specification-overview?language=en Evaluation Kit - SMARC SOM Board Specification Overview]<br />
** 📄 [https://www.renesas.com/us/en/document/ovr/rzg2l-evaluation-kit-carrier-board-specification-overview?language=en Evaluation Kit - SMARC Carrier Board Specification Overview ]<br />
* Linux Board Support Package Download<br />
** [https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rzg2l-board-support-package-419-cip Official BSP Download Page]<br />
** Please refer to the '''[https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rzg2l-board-support-package-419-cip Linux BSP page]''' and read the '''Release Note''' document for the BSP build instructions<br />
* Additional Help<br />
** A script for programming the boot loaders into SPI Flash can be found here: https://github.com/seebe/rzg_stuff/blob/master/boards/rzg2l_smarc/README.md<br />
** Information regarding [[RZ-G/RZ-G2L_Flash_Programming | RZ/G2L Programming]] of onboard Flash devices with bootloaders and root file systems<br />
* Articles<br />
** [http://linuxgizmos.com/renesas-adds-to-rz-g2-line-with-three-cortex-a55-socs Renesas adds to RZ/G2 line with three Cortex-A55 SoCs]<br />
<br />
= Getting Started =<br />
1. '''Download the Linux BSP'''<br />
* Download the RZ/G2L Board Support Package from renesas.com.<br />
* Links to all the downloads can be found on '''[https://renesas.info/wiki/RZ-G/RZ-G2_BSP#Downloads this page here]'''. Please refer to the RZ/G2L table.<br />
* ⚠️ You also need to download the "RZ/G2L Mali Graphic Library" package to enable graphs.<br />
<br />
2. '''Build Environment'''<br />
* To build the BSP, you will need a Linux PC running '''Ubuntu 20.04'''. Only this Host OS version was tested.<br />
* You can use a Linux PC (recommended) or a Virtual Machine.<br />
<br />
3. '''Build the BSP'''<br />
* The instructions for building the BSP are located in the '''Release Note''' document that is included in the ZIP file download from [https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rzg2l-board-support-package-419-cip renesas.com].<br />
* ⚠️ There are currently '''2 versions of boards'''. In the 'Release Note' of the BSP v1.1, therefore please review section 6-4 and 6-5 in detail before following the instructions in section 3.<br />
* ⚠️ If you are building core-image-weston, you need to add '''Mali Graphics library''' mentioned in step 1.<br />
* ⚠️ An '''"update1"''' was released after the BSP v1.1 package. Update1 must be applied to the v1.1 release. Please see instructions below.<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| Simple build instructions for BSP v1.1 &nbsp;<br />
|-<br />
|<br />
These instructions are a summary of what is explained in the BSP Release Note.<br />
<pre><br />
# Extract package that was downloaded from renesas.com<br />
$ mkdir rzg2l_bsp_v1.1<br />
$ tar -xf rzg2l_bsp_v1.1.tar.gz -C rzg2l_bsp_v1.1<br />
$ cd rzg2l_bsp_v1.1<br />
<br />
# Copy/Move the 'Mali Graphics library' Zip file (RTK0EF0045Z13001ZJ-v0.51_EN.zip) under our BSP directory.<br />
# Then, we will un-zip it and install it.<br />
$ unzip RTK0EF0045Z13001ZJ-v0.51_EN.zip<br />
$ cd RTK0EF0045Z13001ZJ-v0.51_EN/proprietary<br />
$ ./copy_gfx_mmp.sh ../../meta-rzg2<br />
$ cd ../..<br />
<br />
# Apply additional patches for BSP v1.1 "update1" (not included in renesas.com download)<br />
$ cd meta-rzg2<br />
$ wget https://github.com/renesas-rz/meta-rzg2/commit/6edc0e741b37.patch<br />
$ patch -p1 < 6edc0e741b37.patch<br />
$ wget https://github.com/renesas-rz/meta-rzg2/commit/61f6dcb61ac8.patch<br />
$ patch -p1 < 61f6dcb61ac8.patch<br />
$ cd ..<br />
<br />
# Apply additional patches for WS1 boards (only for WS1 boards)<br />
$ cd meta-rzg2<br />
$ patch -p1 < ../extra/0001-linux-renesas-add-workaround-patch-for-gicv3.patch<br />
$ patch -p1 < ../extra/0002-tf-a-add-rd-wr-64-bit-reg-workaround.patch<br />
$ cd ..<br />
<br />
# Apply additional patches for WS2 boards (only for WS2 boards)<br />
$ cd meta-rzg2<br />
$ patch -p1 < ../extra/0001-BSPv1.1-Modify-the-initialization-routine-for-DDR-of.patch<br />
$ cd ..<br />
<br />
# Set up Yocto Environment<br />
$ source poky/oe-init-build-env<br />
$ cp ../meta-rzg2/docs/template/conf/smarc-rzg2l/*.conf ./conf/<br />
<br />
# Build<br />
$ bitbake core-image-minimal<br />
$ bitbake core-image-weston<br />
$ bitbake core-image-minimal -c populate_sdk<br />
</pre><br />
|}<br />
<br />
4. '''Prepare an SD Card'''<br />
* The evaluation boards can be booted from SD Cards. The SD card must be formatted and loaded using a Linux PC. A helpful script has been created '''([https://github.com/renesas-rz/rzg2_bsp_scripts/tree/master/usb_sd_partition usb_sd_partition])''' that you can run on your Linux PC.<br />
<br />
* Insert your micro SD card into a '''USB-SD-Card reader''' and then plug into a Linux PC.<br />
<br />
* Use the commands below to download the formatting script and run. Please select your card and choose the default settings.<br />
<br />
<pre><br />
$ wget https://raw.githubusercontent.com/renesas-rz/rzg2_bsp_scripts/master/usb_sd_partition/usb_sd_partition.sh<br />
$ chmod +x usb_sd_partition.sh<br />
$ ./usb_sd_partition.sh<br />
</pre><br />
* Use the commands below to copy the files you build with the BSP to the SD card. '''Start in the base of your Yocto BSP'''.<br />
<pre><br />
# Change to the Yocto output directory that contains the files<br />
$ cd build/tmp/deploy/images/smarc-rzg2l<br />
<br />
# Copy the Linux kernel and Device Tree to partition 1<br />
$ sudo cp -v Image /media/$USER/RZ_FAT<br />
$ sudo cp -v r9a07g044l2-smarc.dtb /media/$USER/RZ_FAT<br />
<br />
# Copy and expand the Root File System to partition 2<br />
$ sudo tar -xvf core-image-minimal-smarc-rzg2l.tar.gz -C /media/$USER/RZ_ext<br />
<br />
# Make sure all files are finished writing before removing the USB card reader from the PC<br />
$ sync<br />
</pre><br />
<br />
* Safely remove your USB card reader by right clicking on the drive icon (either RZ_FAT or RZ_ext) in Ubuntu and selecting "Eject"<br />
<br />
5. '''Power the Board and Connect to the Serial Port '''<br />
* Supply power the board using the '''USB-C connection''' on the carrier board labeled "Power Input"<br />
* On the carrier board, press the '''red button''' in order to turn on power to the board. The green LED labeled "Carrier PWR On" will be lit when power is on.<br />
* Now that the board is powered, plug a USB micro cable into the carrier board to the USB connector labeled '''"SER 3 UART"'''. Use a '''serial terminal program''' to interact as you board. With a Linux PC, we recommend using "putty" (connects to /dev/USB0), and with a Windows PC we recommend "TeraTerm" that connects to COMx. The baud rate of the Serial connection is '''115200 bps'''.<br />
* Press the '''blue reset button''', and then "u-boot" will start. Within 3 seconds, '''press the space bar''' on your keyboard in order to stop the auto-boot sequence.<br />
<br />
6. '''Switch settings for the CPU SOM board.'''<br />
* The SOM board contains a eMMC Flash device and a Micro SD Card socket. On the SOM board, you can only use one or the other because they are both connected to the same peripheral channel on the RZ/G2L.<br />
* Set the switches on the SOM board to what you want to use.<br />
* Note that the SD Card slot on the Carrier board will always work because it uses a separate peripheral channel on the RZ/G2L.<br />
* On the SOM (CPU) board, there is a little switch (SW1) by the SD card socket.<br />
<pre><br />
SOM board uses SD Card socket SOM board uses eMMC Flash<br />
SW1-1 = ON SW1-1 = ON<br />
SW1-2 = ON SW1-2 = OFF<br />
+-----+ +-----+<br />
| ON | | ON |<br />
| = = | | = |<br />
| | | = |<br />
| 1 2 | | 1 2 |<br />
+-----+ +-----+<br />
</pre><br />
<br />
7-1. '''Boot the Board using eMMC Flash on SOM board'''<br />
* Set switch SW1 ON,OFF<br />
* The boot loader (u-boot) by default will try to boot from eMMC after 3 seconds.<br />
* Press the '''blue reset button''' and wait.<br />
<br />
7-2. '''Boot the Board using SD Card on SOM board'''<br />
* Set switch SW1 ON,ON<br />
* Insert the '''SD card''' into the socket on '''SMARC SOM CPU board''' (not the carrier board).<br />
* Press the '''blue reset button''', and then "u-boot" will start. Within 3 seconds, '''press the space bar''' on your keyboard in order to stop the auto-boot sequence.<br />
* At the u-boot prompt ( => ), enter the following commands to boot the board:<br />
<pre><br />
# Create command macros and save them:<br />
=> setenv sd_boot_som1 'mmc dev 0 ; fatload mmc 0:1 0x48080000 Image ; fatload mmc 0:1 0x48000000 /r9a07g044l2-smarc.dtb'<br />
=> setenv sd_boot_som2 'setenv bootargs 'root=/dev/mmcblk0p2 rootwait' ; booti 0x48080000 - 0x48000000'<br />
=> saveenv<br />
<br />
# Execute the saved commands to boot your board:<br />
=> run sd_boot_som1 sd_boot_som2<br />
<br />
# Automatically boot using these commands after every reset:<br />
=> setenv bootcmd 'run sd_boot_som1 sd_boot_som2'<br />
=> saveenv<br />
</pre><br />
<br />
7-3. '''Boot the Board using SD Card on Carrier board'''<br />
* Insert the '''SD card''' into the socket on '''Carrier board'''.<br />
* Press the '''blue reset button''', and then "u-boot" will start. Within 3 seconds, '''press the space bar''' on your keyboard in order to stop the auto-boot sequence.<br />
* At the u-boot prompt ( => ), enter the following commands to boot the board:<br />
<pre><br />
# Create command macros and save them:<br />
=> setenv sd_boot_carrier1 'mmc dev 1 ; fatload mmc 1:1 0x48080000 Image ; fatload mmc 1:1 0x48000000 /r9a07g044l2-smarc.dtb'<br />
=> setenv sd_boot_carrier2 'setenv bootargs 'root=/dev/mmcblk1p2 rootwait' ; booti 0x48080000 - 0x48000000'<br />
=> saveenv<br />
<br />
# Execute the saved commands to boot your board:<br />
=> run sd_boot_carrier1 sd_boot_carrier2<br />
<br />
# Automatically boot using these commands after every reset:<br />
=> setenv bootcmd 'run sd_boot_carrier1 sd_boot_carrier2'<br />
=> saveenv<br />
</pre><br />
<br />
<br />
<br />
8. '''Linux Login'''<br />
* The login will be "root" (no password is needed)<br />
<br />
= Board Setup Information =<br />
{| class="toccolours" width="100%" style="border-style: none ; text-align: center; background-color:white;"<br />
|-<br />
| [[File:board_configuration.png|frameless]]<br>'''RZ/G2L Evaluation Board Kit Configuration'''<br />
| [[File:smarc_module_board_top.png|frameless|]] <br>'''RZ/G2L SMARC Module Board (TOP)'''<br />
| [[File:smarc_module_board_bottom.png|frameless|]]<br>'''RZ/G2L SMARC Module Board (Bottom)'''<br />
| [[File:smarc_series_carrier_board.png|frameless|]]<br>'''RZ SMARC Series Carrier Board'''<br />
|-<br />
| &nbsp;<br />
|-<br />
| colspan="2" style="text-align:left;" | [[File:power_supply.png|frameless|]]<br>'''Power Supply'''<br>The following power supply environment is used in the evaluation of Renesas:<br>● USB Type-C cable CB-CD23BK (manufactured by Aukey) <br> ● USB PD Charger Anker PowerPort III 65W Pod (manufactured by Anker) <br />
| colspan="2" style="text-align:left;" |[[File:JTAG_connection_ice_debug.png|frameless|]]<br>'''JTAG Cable Connection for ICE Debugging'''<br>When connecting JTAG debugger, please set the DIP SW1 settings as shown.<br>The JTAG connector is 10pin.<br />
|-<br />
|-<br />
| &nbsp;<br />
|-<br />
| [[File:boot_mode.png|frameless|]]<br>'''How to set Boot Modes'''<br />
|}<br />
<br />
= Board Operation Information =<br />
{| class="toccolours" width="100%" style="border-style: none ; text-align: center; background-color:white;"<br />
|-<br />
| style="text-align:left;" | [[File:power_on.png|frameless|]]<br>'''Power ON'''<br>● Connect USB-PD Power Charger to USB Type-C Connector. Then LED1(VBUS PWR On) and LED3(Module PWR On) lights up.<br>● Press SW9 to turn on the power. Then LED4(Carrier PWR On) lights up.<br />
| style="text-align:left;" | [[File:debug_serial.png|frameless|]]<br>'''Debug Serial (Console Output)'''<br>● Debug serial uses CN14. The baud rate is 115200bps.<br>● Since the serial-USB conversion IC is not always powered, the Windows PC will recognize it after the power switch is turned on.<br>● If it is not recognized by your Windows PC, please install the driver�https://www.ftdichip.com/Drivers/VCP.htm<br />
<br />
|}<br />
<br />
= LCD Monitors =<br />
The following LCD monitor were tested with this board.<br />
<br />
* Ingcool 7 inch HDMI LCD 1024x600 Resolution Capacitive Touch Screen<br />
** 🛒 Amazon link : https://www.amazon.com/Ingcool-Resolution-Capacitive-Compatible-Raspberry/dp/B08H8HZRLQ<br />
* ELECROW Raspberry Pi Touchscreen Monitor 5 inch HDMI Screen Display 800x480 Compatible<br />
** 🛒 Amazon link : https://www.amazon.com/Elecrow-Capacitive-interface-Supports-Raspberry/dp/B07FDYXPT7<br />
<br />
= Enable the Coral MIPI Camera =<br />
In the RZ/G2L BSP v1.1 release, the Coral Camera module (OV5645) is supported, but not enabled.<br />
Please follow the instructions below to apply a patch that enables the Camera module in the Device Tree.<br />
<br />
These instructions assume that you have already built the BSP at least 1 time.<br />
<br />
1. Download a patch and apply it to your current kernel source code. Start at the base of your Yocto directory.<br />
<pre><br />
$ cd build/tmp/work-shared/smarc-rzg2l/kernel-source<br />
$ wget https://raw.githubusercontent.com/seebe/rzg_stuff/master/boards/rzg2l_smarc/camera_patch/0001-add-MIPI-CSI-OV5645-camera.patch<br />
$ patch -p1 -i 0001-add-MIPI-CSI-OV5645-camera.patch<br />
$ cd ../../../..<br />
</pre><br />
⚠️ In Yocto, if you do a 'bitbake linux-renesas clean' command, it will completely erase the kernel code, and you will have to apply this patch again.<br />
<br />
2. Since this patch only updated the kernel Device Tree, follow these instructions to rebuild just the Device Tree.<br />
* [https://renesas.info/wiki/RZ-G/RZG_yocto#Build_DTB_only_with_Yocto Build DTB only with Yocto]<br />
<br />
3. Copy your new Device Tree file (build/tmp/deploy/images/smarc-rzg2l/r9a07g044l2-smarc.dtb) to the SD Card and boot.<br />
<br />
4. Configure MIPI CSI module to capture image:<br />
<br />
MIPI CSI configuration is done by using media-ctl utility from v4l-utils package.<br />
<pre><br />
# media-ctl -d /dev/media0 -r<br />
# media-ctl -d /dev/media0 -l "'rzg2l_csi2 10830400.csi2':1 -> 'CRU output':0 [1]"<br />
<br />
1280x960:<br />
# media-ctl -d /dev/media0 -V "'rzg2l_csi2 10830400.csi2':1 [fmt:UYVY8_2X8/1280x960 field:none]"<br />
# media-ctl -d /dev/media0 -V "'ov5645 0-003c':0 [fmt:UYVY8_2X8/1280x960 field:none]"<br />
<br />
1920x1080:<br />
# media-ctl -d /dev/media0 -V "''rzg2l_csi2 10830400.csi2':1 [fmt:UYVY8_2X8/1920x1080 field:none]"<br />
# media-ctl -d /dev/media0 -V "'ov5645 0-003c':0 [fmt:UYVY8_2X8/1920x1080 field:none]"<br />
<br />
2592x1944:<br />
# media-ctl -d /dev/media0 -V "''rzg2l_csi2 10830400.csi2':1 [fmt:UYVY8_2X8/2592x1944 field:none]"<br />
# media-ctl -d /dev/media0 -V "'ov5645 0-003c':0 [fmt:UYVY8_2X8/2592x1944 field:none]"<br />
</pre><br />
<br />
5. Capture image using GStreamer<br />
<br />
This is the simple test script to test your MIPI CSI camera using gstreamer.<br />
<pre><br />
$ wget https://raw.githubusercontent.com/seebe/rzg_stuff/master/boards/rzg2l_smarc/camera_patch/test_csi2.sh<br />
$ chmod +x test_csi2.sh<br />
$ ./test_csi2.sh 1280x960 # pass resolution 1280x960 or 1920x1080 or 2592x1944<br />
</pre><br />
<br />
= Build Qt in BSP V1.1 =<br />
BSP V1.1 already support to build core-image-qt. It also comes with Qt demoes. If you want to build demos, enable QT_DEMO = "1" in conf/local.conf. Please follow instructions to add Qt in BSP V1.1.<br />
<pre><br />
$ git clone git@github.com:meta-qt5/meta-qt5.git<br />
$ cd meta-qt5<br />
$ git checkout c1b0c9f546289b1592d7a895640de103723a0305<br />
</pre><br />
Now you can build core-image-qt.</div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZ-G2L_SMARC&diff=503RZ-G/RZ-G2L SMARC2021-08-11T23:17:24Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G2L SMARC Board by Renesas}}<br />
<img height="200" style="float:right" src=http://linuxgizmos.com/files/renesas_rzg2l_carrier.jpg><br />
← [[RZ-G]]<br />
<br />
= General Information =<br />
* [https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rzg2l-general-purpose-microprocessors-dual-core-arm-cortex-a55-12-ghz-cpus-3d-graphics-and-video-codec Official RZ/G2L Website ]<br />
** Please review the '''Documentation & Downloads''' section<br />
* Board Documentation<br />
** 📄 [https://www.renesas.com/us/en/document/ovr/rzg2l-evaluation-kit-module-board-specification-overview?language=en Evaluation Kit - SMARC SOM Board Specification Overview]<br />
** 📄 [https://www.renesas.com/us/en/document/ovr/rzg2l-evaluation-kit-carrier-board-specification-overview?language=en Evaluation Kit - SMARC Carrier Board Specification Overview ]<br />
* Linux Board Support Package Download<br />
** [https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rzg2l-board-support-package-419-cip Official BSP Download Page]<br />
** Please refer to the '''[https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rzg2l-board-support-package-419-cip Linux BSP page]''' and read the '''Release Note''' document for the BSP build instructions<br />
* Additional Help<br />
** A script for programming the boot loaders into SPI Flash can be found here: https://github.com/seebe/rzg_stuff/blob/master/boards/rzg2l_smarc/README.md<br />
** Information regarding [[RZ-G/RZ-G2L_Flash_Programming | RZ/G2L Programming]] of onboard Flash devices with bootloaders and root file systems<br />
* Articles<br />
** [http://linuxgizmos.com/renesas-adds-to-rz-g2-line-with-three-cortex-a55-socs Renesas adds to RZ/G2 line with three Cortex-A55 SoCs]<br />
<br />
= Getting Started =<br />
1. '''Download the Linux BSP'''<br />
* Download the RZ/G2L Board Support Package from renesas.com.<br />
* Links to all the downloads can be found on '''[https://renesas.info/wiki/RZ-G/RZ-G2_BSP#Downloads this page here]'''. Please refer to the RZ/G2L table.<br />
* ⚠️ You also need to download the "RZ/G2L Mali Graphic Library" package to enable graphs.<br />
<br />
2. '''Build Environment'''<br />
* To build the BSP, you will need a Linux PC running '''Ubuntu 20.04'''. Only this Host OS version was tested.<br />
* You can use a Linux PC (recommended) or a Virtual Machine.<br />
<br />
3. '''Build the BSP'''<br />
* The instructions for building the BSP are located in the '''Release Note''' document that is included in the ZIP file download from [https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rzg2l-board-support-package-419-cip renesas.com].<br />
* ⚠️ There are currently '''2 versions of boards'''. In the 'Release Note' of the BSP v1.1, therefore please review section 6-4 and 6-5 in detail before following the instructions in section 3.<br />
* ⚠️ If you are building core-image-weston, you need to add '''Mali Graphics library''' mentioned in step 1.<br />
* ⚠️ An '''"update1"''' was released after the BSP v1.1 package. Update1 must be applied to the v1.1 release. Please see instructions below.<br />
{| class="mw-collapsible mw-collapsed wikitable"<br />
| Simple build instructions for BSP v1.1 &nbsp;<br />
|-<br />
|<br />
These instructions are a summary of what is explained in the BSP Release Note.<br />
<pre><br />
# Extract package that was downloaded from renesas.com<br />
$ mkdir rzg2l_bsp_v1.1<br />
$ tar -xf rzg2l_bsp_v1.1.tar.gz -C rzg2l_bsp_v1.1<br />
$ cd rzg2l_bsp_v1.1<br />
<br />
# Copy/Move the 'Mali Graphics library' Zip file (RTK0EF0045Z13001ZJ-v0.51_EN.zip) under our BSP directory and install it<br />
$ cp x/x/x/x/RTK0EF0045Z13001ZJ-v0.51_EN.zip .<br />
$ unzip RTK0EF0045Z13001ZJ-v0.51_EN.zip<br />
$ cd RTK0EF0045Z13001ZJ-v0.51_EN/proprietary<br />
$ ./copy_gfx_mmp.sh ../../meta-rzg2<br />
$ cd ../..<br />
<br />
# Apply additional patches for BSP v1.1 "update1" (not included in renesas.com download)<br />
$ cd meta-rzg2<br />
$ wget https://github.com/renesas-rz/meta-rzg2/commit/6edc0e741b37.patch<br />
$ patch -p1 < 6edc0e741b37.patch<br />
$ wget https://github.com/renesas-rz/meta-rzg2/commit/61f6dcb61ac8.patch<br />
$ patch -p1 < 61f6dcb61ac8.patch<br />
$ cd ..<br />
<br />
# Apply additional patches for WS1 boards (only for WS1 boards)<br />
$ cd meta-rzg2<br />
$ patch -p1 < ../extra/0001-linux-renesas-add-workaround-patch-for-gicv3.patch<br />
$ patch -p1 < ../extra/0002-tf-a-add-rd-wr-64-bit-reg-workaround.patch<br />
$ cd ..<br />
<br />
# Apply additional patches for WS2 boards (only for WS2 boards)<br />
$ cd meta-rzg2<br />
$ patch -p1 < ../extra/0001-BSPv1.1-Modify-the-initialization-routine-for-DDR-of.patch<br />
$ cd ..<br />
<br />
# Set up Yocto Environment<br />
$ source poky/oe-init-build-env<br />
$ cp ../meta-rzg2/docs/template/conf/minimal/smarc-rzg2l/*.conf ./conf/<br />
<br />
# Build<br />
$ bitbake core-image-minimal<br />
$ bitbake core-image-weston<br />
$ bitbake core-image-minimal -c populate_sdk<br />
</pre><br />
|}<br />
<br />
4. '''Prepare an SD Card'''<br />
* The evaluation boards can be booted from SD Cards. The SD card must be formatted and loaded using a Linux PC. A helpful script has been created '''([https://github.com/renesas-rz/rzg2_bsp_scripts/tree/master/usb_sd_partition usb_sd_partition])''' that you can run on your Linux PC.<br />
<br />
* Insert your micro SD card into a '''USB-SD-Card reader''' and then plug into a Linux PC.<br />
<br />
* Use the commands below to download the formatting script and run. Please select your card and choose the default settings.<br />
<br />
<pre><br />
$ wget https://raw.githubusercontent.com/renesas-rz/rzg2_bsp_scripts/master/usb_sd_partition/usb_sd_partition.sh<br />
$ chmod +x usb_sd_partition.sh<br />
$ ./usb_sd_partition.sh<br />
</pre><br />
* Use the commands below to copy the files you build with the BSP to the SD card. '''Start in the base of your Yocto BSP'''.<br />
<pre><br />
# Change to the Yocto output directory that contains the files<br />
$ cd build/tmp/deploy/images/smarc-rzg2l<br />
<br />
# Copy the Linux kernel and Device Tree to partition 1<br />
$ sudo cp -v Image /media/$USER/RZ_FAT<br />
$ sudo cp -v r9a07g044l2-smarc.dtb /media/$USER/RZ_FAT<br />
<br />
# Copy and expand the Root File System to partition 2<br />
$ sudo tar -xvf core-image-minimal-smarc-rzg2l.tar.gz -C /media/$USER/RZ_ext<br />
<br />
# Make sure all files are finished writing before removing the USB card reader from the PC<br />
$ sync<br />
</pre><br />
<br />
* Safely remove your USB card reader by right clicking on the drive icon (either RZ_FAT or RZ_ext) in Ubuntu and selecting "Eject"<br />
<br />
5. '''Power the Board and Connect to the Serial Port '''<br />
* Supply power the board using the '''USB-C connection''' on the carrier board labeled "Power Input"<br />
* On the carrier board, press the '''red button''' in order to turn on power to the board. The green LED labeled "Carrier PWR On" will be lit when power is on.<br />
* Now that the board is powered, plug a USB micro cable into the carrier board to the USB connector labeled '''"SER 3 UART"'''. Use a '''serial terminal program''' to interact as you board. With a Linux PC, we recommend using "putty" (connects to /dev/USB0), and with a Windows PC we recommend "TeraTerm" that connects to COMx. The baud rate of the Serial connection is '''115200 bps'''.<br />
* Press the '''blue reset button''', and then "u-boot" will start. Within 3 seconds, '''press the space bar''' on your keyboard in order to stop the auto-boot sequence.<br />
<br />
6. '''Switch settings for the CPU SOM board.'''<br />
* The SOM board contains a eMMC Flash device and a Micro SD Card socket. On the SOM board, you can only use one or the other because they are both connected to the same peripheral channel on the RZ/G2L.<br />
* Set the switches on the SOM board to what you want to use.<br />
* Note that the SD Card slot on the Carrier board will always work because it uses a separate peripheral channel on the RZ/G2L.<br />
* On the SOM (CPU) board, there is a little switch (SW1) by the SD card socket.<br />
<pre><br />
SOM board uses SD Card socket SOM board uses eMMC Flash<br />
SW1-1 = ON SW1-1 = ON<br />
SW1-2 = ON SW1-2 = OFF<br />
+-----+ +-----+<br />
| ON | | ON |<br />
| = = | | = |<br />
| | | = |<br />
| 1 2 | | 1 2 |<br />
+-----+ +-----+<br />
</pre><br />
<br />
7-1. '''Boot the Board using eMMC Flash on SOM board'''<br />
* Set switch SW1 ON,OFF<br />
* The boot loader (u-boot) by default will try to boot from eMMC after 3 seconds.<br />
* Press the '''blue reset button''' and wait.<br />
<br />
7-2. '''Boot the Board using SD Card on SOM board'''<br />
* Set switch SW1 ON,ON<br />
* Insert the '''SD card''' into the socket on '''SMARC SOM CPU board''' (not the carrier board).<br />
* Press the '''blue reset button''', and then "u-boot" will start. Within 3 seconds, '''press the space bar''' on your keyboard in order to stop the auto-boot sequence.<br />
* At the u-boot prompt ( => ), enter the following commands to boot the board:<br />
<pre><br />
=> mmc dev 0 ; fatload mmc 0:1 0x48080000 Image ; fatload mmc 0:1 0x48000000 /r9a07g044l2-smarc.dtb<br />
=> setenv bootargs 'root=/dev/mmcblk0p2 rootwait' ; booti 0x48080000 - 0x48000000<br />
</pre><br />
<br />
7-3. '''Boot the Board using SD Card on Carrier board'''<br />
* Insert the '''SD card''' into the socket on '''Carrier board'''.<br />
* Press the '''blue reset button''', and then "u-boot" will start. Within 3 seconds, '''press the space bar''' on your keyboard in order to stop the auto-boot sequence.<br />
* At the u-boot prompt ( => ), enter the following commands to boot the board:<br />
<pre><br />
=> mmc dev 1 ; fatload mmc 1:1 0x48080000 Image ; fatload mmc 1:1 0x48000000 /r9a07g044l2-smarc.dtb<br />
=> setenv bootargs 'root=/dev/mmcblk1p2 rootwait' ; booti 0x48080000 - 0x48000000<br />
</pre><br />
<br />
8. '''Linux Login'''<br />
* The login will be "root" (no password is needed)<br />
<br />
= Board Setup Information =<br />
{| class="toccolours" width="100%" style="border-style: none ; text-align: center; background-color:white;"<br />
|-<br />
| [[File:board_configuration.png|frameless]]<br>'''RZ/G2L Evaluation Board Kit Configuration'''<br />
| [[File:smarc_module_board_top.png|frameless|]] <br>'''RZ/G2L SMARC Module Board (TOP)'''<br />
| [[File:smarc_module_board_bottom.png|frameless|]]<br>'''RZ/G2L SMARC Module Board (Bottom)'''<br />
| [[File:smarc_series_carrier_board.png|frameless|]]<br>'''RZ SMARC Series Carrier Board'''<br />
|-<br />
| &nbsp;<br />
|-<br />
| colspan="2" style="text-align:left;" | [[File:power_supply.png|frameless|]]<br>'''Power Supply'''<br>The following power supply environment is used in the evaluation of Renesas:<br>● USB Type-C cable CB-CD23BK (manufactured by Aukey) <br> ● USB PD Charger Anker PowerPort III 65W Pod (manufactured by Anker) <br />
| colspan="2" style="text-align:left;" |[[File:JTAG_connection_ice_debug.png|frameless|]]<br>'''JTAG Cable Connection for ICE Debugging'''<br>When connecting JTAG debugger, please set the DIP SW1 settings as shown.<br>The JTAG connector is 10pin.<br />
|-<br />
|-<br />
| &nbsp;<br />
|-<br />
| [[File:boot_mode.png|frameless|]]<br>'''How to set Boot Modes'''<br />
|}<br />
<br />
= Board Operation Information =<br />
{| class="toccolours" width="100%" style="border-style: none ; text-align: center; background-color:white;"<br />
|-<br />
| style="text-align:left;" | [[File:power_on.png|frameless|]]<br>'''Power ON'''<br>● Connect USB-PD Power Charger to USB Type-C Connector. Then LED1(VBUS PWR On) and LED3(Module PWR On) lights up.<br>● Press SW9 to turn on the power. Then LED4(Carrier PWR On) lights up.<br />
| style="text-align:left;" | [[File:debug_serial.png|frameless|]]<br>'''Debug Serial (Console Output)'''<br>● Debug serial uses CN14. The baud rate is 115200bps.<br>● Since the serial-USB conversion IC is not always powered, the Windows PC will recognize it after the power switch is turned on.<br>● If it is not recognized by your Windows PC, please install the driver�https://www.ftdichip.com/Drivers/VCP.htm<br />
<br />
|}<br />
<br />
= LCD Monitors =<br />
The following LCD monitor were tested with this board.<br />
<br />
* Ingcool 7 inch HDMI LCD 1024x600 Resolution Capacitive Touch Screen<br />
** Amazon link : https://www.amazon.com/Elecrow-Capacitive-interface-Supports-Raspberry/dp/B07FDYXPT7/ref=sr_1_8<br />
* ELECROW Raspberry Pi Touchscreen Monitor 5 inch HDMI Screen Display 800x480 Compatible<br />
** Amazon link : https://www.amazon.com/Elecrow-Capacitive-interface-Supports-Raspberry/dp/B07FDYXPT7/ref=sr_1_8<br />
<br />
= Camera =<br />
1. Add patch file for MIPI CSI OV5645 camera for yocto build:<br />
<pre><br />
$ cd ~user-work/meta-rzg2/recipes-kernel/linux/linux-renesas/patches/main<br />
$ wget https://github.com/seebe/rzg_stuff/blob/master/boards/rzg2l_smarc/camera_patch/0001-add-MIPI-CSI-OV5645-camera.patch<br />
</pre><br />
2. Edit patches.scc file to add patch file, located in ~user_work/meta-rzg2/recipes-kernel/linux/linux-renesas/patches.scc<br />
<br />
3. Build image core-image-weston<br />
<br />
4. Configure MIPI CSI module to capture image:<br />
<br />
MIPI CSI configuration is done by using media-ctl utility from V41-utils package.<br />
<pre><br />
# media-ctl -d /dev/media0 -r<br />
# media-ctl -d /dev/media0 -l "'rzg2l_csi2 10830400.csi2':1 -> 'CRU output':0 [1]"<br />
<br />
1280x960:<br />
# media-ctl -d /dev/media0 -V "'rzg2l_csi2 10830400.csi2':1 [fmt:UYVY8_2X8/1280x960 field:none]"<br />
# media-ctl -d /dev/media0 -V "'ov5645 0-003c':0 [fmt:UYVY8_2X8/1280x960 field:none]"<br />
<br />
1920x1080:<br />
# media-ctl -d /dev/media0 -V "''rzg2l_csi2 10830400.csi2':1 [fmt:UYVY8_2X8/1920x1080 field:none]"<br />
# media-ctl -d /dev/media0 -V "'ov5645 0-003c':0 [fmt:UYVY8_2X8/1920x1080 field:none]"<br />
<br />
2592x1944:<br />
# media-ctl -d /dev/media0 -V "''rzg2l_csi2 10830400.csi2':1 [fmt:UYVY8_2X8/2592x1944 field:none]"<br />
# media-ctl -d /dev/media0 -V "'ov5645 0-003c':0 [fmt:UYVY8_2X8/2592x1944 field:none]"<br />
</pre><br />
5. Capture image using gstreamer<br />
<br />
This is the simple test script to test your MIPI CSI camera using gstreamer.<br />
<pre><br />
$ wget https://github.com/seebe/rzg_stuff/blob/master/boards/rzg2l_smarc/camera_patch/test_csi2.sh<br />
$ ./test_csi2.sh 1280x960 # pass resolution 1280x960 or 1920x1080 or 2592x1944<br />
</pre></div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZ-G2L_SMARC&diff=481RZ-G/RZ-G2L SMARC2021-08-05T16:46:50Z<p>Padhikari: </p>
<hr />
<div>{{DISPLAYTITLE:RZ/G2L SMARC Board by Renesas}}<br />
<img height="200" style="float:right" src=http://linuxgizmos.com/files/renesas_rzg2l_carrier.jpg><br />
← [[RZ-G]]<br />
<br />
= General Information =<br />
* [https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rzg2l-general-purpose-microprocessors-dual-core-arm-cortex-a55-12-ghz-cpus-3d-graphics-and-video-codec Official RZ/G2L Website ]<br />
** Please review the '''Documentation & Downloads''' section<br />
* Board Documentation<br />
** 📄 [https://www.renesas.com/us/en/document/ovr/rzg2l-evaluation-kit-module-board-specification-overview?language=en Evaluation Kit - SMARC SOM Board Specification Overview]<br />
** 📄 [https://www.renesas.com/us/en/document/ovr/rzg2l-evaluation-kit-carrier-board-specification-overview?language=en Evaluation Kit - SMARC Carrier Board Specification Overview ]<br />
* Linux Board Support Package Download<br />
** [https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rzg2l-board-support-package-419-cip Official BSP Download Page]<br />
** Please refer to the '''[https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rzg2l-board-support-package-419-cip Linux BSP page]''' and read the '''Release Note''' document for the BSP build instructions<br />
* Additional Help<br />
** A script for programming the boot loaders into SPI Flash can be found here: https://github.com/seebe/rzg_stuff/blob/master/boards/rzg2l_smarc/README.md<br />
** Information regarding [[RZ-G/RZ-G2L_Flash_Programming | RZ/G2L Programming]] of onboard Flash devices with bootloaders and root file systems<br />
* Articles<br />
** [http://linuxgizmos.com/renesas-adds-to-rz-g2-line-with-three-cortex-a55-socs Renesas adds to RZ/G2 line with three Cortex-A55 SoCs]<br />
<br />
= Getting Started =<br />
1. '''Download the Linux BSP'''<br />
* Download the RZ/G2L Board Support Package from renesas.com.<br />
* Links to the download can be found on this page [https://renesas.info/wiki/RZ-G/RZ-G2_BSP here]<br />
* ⚠️ You also need to download the "RZ/G2L Mali Graphic Library" package to enable graphs.<br />
<br />
2. '''Build Environment'''<br />
* To build the BSP, you will need a Linux PC running Ubuntu 20.04.<br />
<br />
3. '''Build the BSP'''<br />
* The instructions for building the BSP are located in the "Release Note" document that is included in the ZIP file download from [https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-arm-based-high-end-32-64-bit-mpus/rzg2l-board-support-package-419-cip renesas.com].<br />
* ⚠️ There are currently 2 versions of boards. In the "Release Note" of the BSP v1.1, therefore please review section 6-4 and 6-5 in detail before following the instructions in section 3.<br />
* ⚠️ If you are building core-image-weston, you need to add Mali Graphics library mentioned in step 1.<br />
<br />
4. '''Prepare an SD Card'''<br />
* The evaluation boards can be booted from SD Cards. The SD card must be formatted and loaded using a Linux PC. A helpful script has been created '''([https://github.com/renesas-rz/rzg2_bsp_scripts/tree/master/usb_sd_partition usb_sd_partition])''' that you can run on your Linux PC.<br />
<br />
* Insert your micro SD card into a '''USB-SD-Card reader''' and then plug into a Linux PC.<br />
<br />
* Use the commands below to download the formatting script and run. Please select your card and choose the default settings.<br />
<br />
<pre><br />
$ wget https://raw.githubusercontent.com/renesas-rz/rzg2_bsp_scripts/master/usb_sd_partition/usb_sd_partition.sh<br />
$ chmod +x usb_sd_partition.sh<br />
$ ./usb_sd_partition.sh<br />
</pre><br />
* Use the commands below to copy the files you build with the BSP to the SD card. '''Start in the base of your Yocto BSP'''.<br />
<pre><br />
# Change to the Yocto output directory that contains the files<br />
$ cd build/tmp/deploy/images/smarc-rzg2l<br />
<br />
# Copy the Linux kernel and Device Tree to partition 1<br />
$ sudo cp -v Image /media/$USER/RZ_FAT<br />
$ sudo cp -v r9a07g044l2-smarc.dtb /media/$USER/RZ_FAT<br />
<br />
# Copy and expand the Root File System to partition 2<br />
$ sudo tar -xvf core-image-minimal-smarc-rzg2l.tar.gz -C /media/$USER/RZ_ext<br />
<br />
# Make sure all files are finished writing before removing the USB card reader from the PC<br />
$ sync<br />
</pre><br />
<br />
* Safely remove your USB card reader by right clicking on the drive icon (either RZ_FAT or RZ_ext) in Ubuntu and selecting "Eject"<br />
<br />
5. '''Power the Board and Connect to the Serial Port '''<br />
* Supply power the board using the '''USB-C connection''' on the carrier board labeled "Power Input"<br />
* On the carrier board, press the '''red button''' in order to turn on power to the board. The green LED labeled "Carrier PWR On" will be lit when power is on.<br />
* Now that the board is powered, plug a USB micro cable into the carrier board to the USB connector labeled '''"SER 3 UART"'''. Use a '''serial terminal program''' to interact as you board. With a Linux PC, we recommend using "putty" (connects to /dev/USB0), and with a Windows PC we recommend "TeraTerm" that connects to COMx. The baud rate of the Serial connection is '''115200 bps'''.<br />
* Press the '''blue reset button''', and then "u-boot" will start. Within 3 seconds, '''press the space bar''' on your keyboard in order to stop the auto-boot sequence.<br />
<br />
6. '''Switch settings for the CPU SOM board.'''<br />
* The SOM board contains a eMMC Flash device and a Micro SD Card socket. On the SOM board, you can only use one or the other because they are both connected to the same peripheral channel on the RZ/G2L.<br />
* Set the switches on the SOM board to what you want to use.<br />
* Note that the SD Card slot on the Carrier board will always work because it uses a separate peripheral channel on the RZ/G2L.<br />
* On the SOM (CPU) board, there is a little switch (SW1) by the SD card socket.<br />
<pre><br />
SOM board uses SD Card socket SOM board uses eMMC Flash<br />
SW1-1 = ON SW1-1 = ON<br />
SW1-2 = ON SW1-2 = OFF<br />
+-----+ +-----+<br />
| ON | | ON |<br />
| = = | | = |<br />
| | | = |<br />
| 1 2 | | 1 2 |<br />
+-----+ +-----+<br />
</pre><br />
<br />
7-1. '''Boot the Board using eMMC Flash on SOM board'''<br />
* Set switch SW1 ON,OFF<br />
* The boot loader (u-boot) by default will try to boot from eMMC after 3 seconds.<br />
* Press the '''blue reset button''' and wait.<br />
<br />
7-2. '''Boot the Board using SD Card on SOM board'''<br />
* Set switch SW1 ON,ON<br />
* Insert the '''SD card''' into the socket on '''SMARC SOM CPU board''' (not the carrier board).<br />
* Press the '''blue reset button''', and then "u-boot" will start. Within 3 seconds, '''press the space bar''' on your keyboard in order to stop the auto-boot sequence.<br />
* At the u-boot prompt ( => ), enter the following commands to boot the board:<br />
<pre><br />
=> mmc dev 0 ; fatload mmc 0:1 0x48080000 Image ; fatload mmc 0:1 0x48000000 /r9a07g044l2-smarc.dtb<br />
=> setenv bootargs 'root=/dev/mmcblk0p2 rootwait' ; booti 0x48080000 - 0x48000000<br />
</pre><br />
<br />
7-3. '''Boot the Board using SD Card on Carrier board'''<br />
* Insert the '''SD card''' into the socket on '''Carrier board'''.<br />
* Press the '''blue reset button''', and then "u-boot" will start. Within 3 seconds, '''press the space bar''' on your keyboard in order to stop the auto-boot sequence.<br />
* At the u-boot prompt ( => ), enter the following commands to boot the board:<br />
<pre><br />
=> mmc dev 1 ; fatload mmc 1:1 0x48080000 Image ; fatload mmc 1:1 0x48000000 /r9a07g044l2-smarc.dtb<br />
=> setenv bootargs 'root=/dev/mmcblk1p2 rootwait' ; booti 0x48080000 - 0x48000000<br />
</pre><br />
<br />
8. '''Linux Login'''<br />
* The login will be "root" (no password is needed)<br />
<br />
= Board Setup Information =<br />
{| class="toccolours" width="100%" style="border-style: none ; text-align: center; background-color:white;"<br />
|-<br />
| [[File:board_configuration.png|frameless]]<br>'''RZ/G2L Evaluation Board Kit Configuration'''<br />
| [[File:smarc_module_board_top.png|frameless|]] <br>'''RZ/G2L SMARC Module Board (TOP)'''<br />
| [[File:smarc_module_board_bottom.png|frameless|]]<br>'''RZ/G2L SMARC Module Board (Bottom)'''<br />
| [[File:smarc_series_carrier_board.png|frameless|]]<br>'''RZ SMARC Series Carrier Board'''<br />
|-<br />
| &nbsp;<br />
|-<br />
| colspan="2" style="text-align:left;" | [[File:power_supply.png|frameless|]]<br>'''Power Supply'''<br>The following power supply environment is used in the evaluation of Renesas:<br>● USB Type-C cable CB-CD23BK (manufactured by Aukey) <br> ● USB PD Charger Anker PowerPort III 65W Pod (manufactured by Anker) <br />
| colspan="2" style="text-align:left;" |[[File:JTAG_connection_ice_debug.png|frameless|]]<br>'''JTAG Cable Connection for ICE Debugging'''<br>When connecting JTAG debugger, please set the DIP SW1 settings as shown.<br>The JTAG connector is 10pin.<br />
|-<br />
|-<br />
| &nbsp;<br />
|-<br />
| [[File:boot_mode.png|frameless|]]<br>'''How to set Boot Modes'''<br />
|}<br />
<br />
= Board Operation Information =<br />
{| class="toccolours" width="100%" style="border-style: none ; text-align: center; background-color:white;"<br />
|-<br />
| style="text-align:left;" | [[File:power_on.png|frameless|]]<br>'''Power ON'''<br>● Connect USB-PD Power Charger to USB Type-C Connector. Then LED1(VBUS PWR On) and LED3(Module PWR On) lights up.<br>● Press SW9 to turn on the power. Then LED4(Carrier PWR On) lights up.<br />
| style="text-align:left;" | [[File:debug_serial.png|frameless|]]<br>'''Debug Serial (Console Output)'''<br>● Debug serial uses CN14. The baud rate is 115200bps.<br>● Since the serial-USB conversion IC is not always powered, the Windows PC will recognize it after the power switch is turned on.<br>● If it is not recognized by your Windows PC, please install the driver�https://www.ftdichip.com/Drivers/VCP.htm<br />
<br />
|}<br />
<br />
= LCD Monitors =<br />
The following LCD monitor were tested with this board.<br />
<br />
* Ingcool 7 inch HDMI LCD 1024x600 Resolution Capacitive Touch Screen<br />
** Amazon link : https://www.amazon.com/Elecrow-Capacitive-interface-Supports-Raspberry/dp/B07FDYXPT7/ref=sr_1_8<br />
* ELECROW Raspberry Pi Touchscreen Monitor 5 inch HDMI Screen Display 800x480 Compatible<br />
** Amazon link : https://www.amazon.com/Elecrow-Capacitive-interface-Supports-Raspberry/dp/B07FDYXPT7/ref=sr_1_8?dchild=1&keywords=5+inch+lcd+touch+panel+usb&qid=1623888745&s=electronics&sr=1-8</div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG2_Eclipse_develop_and_debug&diff=352RZ-G/RZG2 Eclipse develop and debug2021-06-23T16:21:00Z<p>Padhikari: </p>
<hr />
<div>== Introduction ==<br />
<br />
In this page you'll find instructions on how to use Eclipse to develop, cross-build and debug for RZ/G2.<br />
[https://www.eclipse.org/ Eclipse] is a very well known IDE (Integrated Development Environment) that can be used to develop for different targets, supporting many programming languages.<br />
<br />
== Installation ==<br />
<br />
There are many guides available online that describe how to install Eclipse on your host Linux machine, normally an x86 PC.<br />
For example, if you are using Ubuntu 20.04, you can follow the instructions included on this [https://linuxconfig.org/eclipse-ide-for-c-c-developers-installation-on-ubuntu-20-04 web page].<br />
Do not launch Eclipse after the installation.<br />
<br />
== Setting up the cross-build environment ==<br />
<br />
Since the goal is to develop for RZ/G2 that are SoCs based on 64-bit Arm Cortex-A cores, you need to install the SDK.<br />
For more information on how to build and install the SDK for RZ/G2 you can normally refer to the Release Note of the BSP, the links can be found [[RZ-G/RZ-G2_BSP|here]].<br />
Once the SDK is installed, you have to setup the environment by launching the related script.<br />
The default installation path is: /opt/poky/[version] so, for example, in order to setup the environment to cross-build for RZ/G2L:<br />
<br />
source /opt/poky/3.1.5/environment-setup-aarch64-poky-linux <br />
<br />
If successful, you should be able to invoke the cross-compiler:<br />
<br />
$ $CC --version<br />
aarch64-poky-linux-gcc (GCC) 8.3.0<br />
Copyright (C) 2018 Free Software Foundation, Inc.<br />
This is free software; see the source for copying conditions. There is NO<br />
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.<br />
<br />
and also other tools like GDB. These system environment variables will be used by Eclipse.<br />
<br />
== Launching Eclipse == <br />
<br />
We are now ready to launch Eclipse, from the same terminal where you sourced the environment variable script just type:<br />
<br />
eclipse &<br />
<br />
When you launch Eclipse for the first time, it asks to set-up a workspace, after that you should see a Welcome screen:<br />
<br />
[[File:Eclipse Welcome.png|800px|frameless|Eclipse Welcome page]]<br />
<br />
=== First Linux cross application: Hello World ===<br />
<br />
In order to create your first Hello World program, click File -> New -> C/C++ Project. Then select "C Managed Build", next, select "Hello World ANSI C Project", give it a name (e.g. Hello World) and select Cross GCC, next, next until the Cross configuration window appears. Then for "Cross compiler prefix" type '''''aarch64-poky-linux-''''' and "Cross compiler path" type '''''/usr/bin'''''.<br />
<br />
[[File:Eclipse cross.png|400px|frameless]]<br />
<br />
If you click finish a new project with the name give will be created. Now in order to get it correctly built, you need to adjust some build settings. Right click on the project, then Properties. When the setting windows pop-up, expand C/C++ Build and select Settings. <br />
Then select Miscellaneous under Cross GCC Compiler and add the flag: '''''--sysroot=${SDKTARGETSYSROOT}'''''.<br />
Similarly, for Cross GCC Linker: '''''--sysroot=${SDKTARGETSYSROOT}'''''<br />
<br />
[[File:Eclipse build settings.png|800px|frameless]]<br />
<br />
If you now click on the hammer icon on the top left, you should be able to build the project. If successful on the console you will get:<br />
<br />
12:04:50 **** Build of configuration Debug for project Hello World ****<br />
make all <br />
Building file: ../src/Hello World.c<br />
Invoking: Cross GCC Compiler<br />
aarch64-poky-linux-gcc -O0 -g3 -Wall -c -fmessage-length=0 --sysroot=/opt/poky/3.1.5/sysroots/aarch64-poky-linux -MMD -MP -MF"src/Hello World.d" -MT"src/Hello\ World.d" -o "src/Hello World.o" <br />
"../src/Hello World.c"<br />
Finished building: ../src/Hello World.c<br />
<br />
Building target: Hello World<br />
Invoking: Cross GCC Linker<br />
aarch64-poky-linux-gcc --sysroot=/opt/poky/3.1.5/sysroots/aarch64-poky-linux -o "Hello World" ./src/Hello\ World.o <br />
Finished building target: Hello World<br />
<br />
12:04:50 Build Finished. 0 errors, 0 warnings. (took 168ms)<br />
<br />
== Cross debugging a Linux application over the network using GDB == <br />
<br />
Now we are ready to debug. Click Run -> Run Configurations, then select (double click) on C/C++ Remote Application, you can leave the default name or choose what you want.<br />
<br />
[[File:Eclipse debug hello world.png|600px|frameless]]<br />
<br />
Then click "New" button (corresponding to Connection), choose "SSH", then "OK":<br />
<br />
[[File:Eclipse debug hello world connection.png|400px|frameless]]<br />
<br />
Give the connection a name and specify the target IP address. User should be ''root''. <br />
There's only one last field to configure in the "Run Configurations": Remove Absolute File Patch for C/C++ Application", click on Browse and leave the default path, then click OK.<br />
Please notice that in order to connect and debug ''openssh, sftp-server'' and ''gdbserver'' must be installed on the target. You can do this by adding following packages in local.conf file in yocto.<br />
<pre><br />
IMAGE_INSTALL_append = " rpm openssh openssh-sftp-server openssh-scp gdbserver"<br />
</pre><br />
If you click "Run", the application will be deployed and run on the target board. In the console you should see:<br />
<br />
/home/root/Hello\ World;exit<br />
<br />
Last login: Tue Jun 1 11:36:17 2021 from 192.168.10.118<br />
<br />
root@smarc-rzg2l:~# /home/root/Hello\ World;exit<br />
!!!Hello World!!!<br />
logout<br />
<br />
To debug, instead, you have to adjust one more parameter. Select "Debug" from the drop down list (instead on "Run").<br />
Then click on the gear corresponding to "Hello World Debug" (or the name you gave):<br />
<br />
[[File:Eclipse debug hello world debug.png|600px|frameless]]<br />
<br />
Switch to the Debugger Tab and select the cross GDB included in the SDK, ''aarch64-poky-linux-gdb'':<br />
<br />
[[File:Eclipse debug hello world debug debugger.png|600px|frameless]]<br />
<br />
Note: If an error pops up when trying to modify the debug configuration, then you need to add a new "Launch Target". Normally it should not be strictly needed but without at least a target it may not work.<br />
At this point you should be able to debug by simply clicking on the "bug" icon, the binary will be downloaded into the target and run under GDB control":<br />
<br />
[[File:Eclipse debug hello world debug ongoing.png|800px|frameless]]<br />
<br />
== Cross debugging bare metal programs using GDB and OpenOCD ==<br />
<br />
Eclipse is useful also to debug bare metal programs in combination with OpenOCD. In this section the [https://github.com/renesas-rz/rzg2_flash_writer RZ/G2 Flash Writer] is taken as an example.<br />
<br />
=== Cloning a repository using Eclipse ===<br />
Eclipse includes a plugin for a seamless integration with Git. You can clone and import at the same time. Click File -> Import -> Git -> Projects from Git (with smart import). Then Clone URI, then paste the RZ/G2 Flash Writer GitHub link:<br />
<br />
https://github.com/renesas-rz/rzg2_flash_writer<br />
<br />
into Location (URI). Then by clicking next, the Branch Selection window appears, select both "master" and "rz_g2l" (default). Then you are prompted to choose a destination folder, choose where the repository will be cloned and click Next. Now we want to import the project using another wizard, so we have to click on "Show other specialized import wizards". <br />
<br />
[[File:Eclipse import git.png|frameless|600x600px]]<br />
<br />
When the other import wizard window appears, select from the C/C++ category, "Existing Code as Makefile Project" and click Next. Browse to the code location where you cloned the repository, select the folder (Open) and finally select "Cross GCC" before clicking Finish:<br />
<br />
[[File:Eclipse import git makefile.png|frameless|600x600px]]<br />
<br />
You should now have the project cloned from the repository, on the master branch and imported as a Makefile project.<br />
<br />
=== Building RZ/G2E-N-M-H Flash Writer ===<br />
The master branch is the branch you want to use to build the Flash Writer for RZ/G2E-N-M-H. Of course you would need to setup the build environment for your target in a similar way as explained above for the RZ/G2L. Assuming you did so, we just have to make sure the correct board is selected during the build. To do so, right click on the project name -> Properties and then select C/C++ Build. Uncheck "Use default build command" and add:<br />
<br />
* BOARD=EK874 for RZ/G2E<br />
* BOARD=HIHOPE for RZ/G2N-M-H<br />
<br />
[[File:Eclipse flashwriter board.png|frameless|600x600px]]<br />
<br />
You can now build, you should see the message:<br />
========== !!! Compile Complete !!! ==========<br />
in the Console output.<br />
<br />
=== Building RZ/G2L Flash Writer ===<br />
To build the RZ/G2L Flash Writer we need to checkout the corresponding branch. Right click on the project -> Team -> Switch To -> Other. Then from the "Remote Tracking" choose the rz_g2l branch, click "Check Out...":<br />
<br />
[[File:Eclipse flashwriter branch.png|frameless|600x600px]]<br />
<br />
<br />
And finally "Check out Commit". A warning about the "Detached HEAD" will appear, you can ignore and click close. Alternatively, and recommended if you want to make changes, you can "Create Branch" window appears, leave it as is and click on "Finish". We need to select the right make command, so right click on the project name -> Properties and then select C/C++ Build. Uncheck "Use default build command" and add/modify BOARD=RZG2L_SMARC. The message<br />
========== !!! Compile Complete !!! ==========<br />
should appear if the build is successful. Do not forget to source the right environment variable setup script according to the board used. Please note that you would need to launch Eclipse from the terminal where the environment variables have been set.<br />
<br />
=== Debugging using OpenOCD - No specific plugin ===<br />
Please follow the instructions given in [[RZ-G/RZG openocd new|this page]] on how to set-up, build and launch OpenOCD for the RZ/G2 targets. You have to make sure that OpenOCD is running in another terminal window and awaiting for a GDB connection. In the rest of the section the RZ/G2L is taken as an example, however the process is very similar also for the other members of the RZ/G2 family.<br />
<br />
You need to create a debug config file specific to the Flash Writer. Right click on the project -> Debug As -> Debug Configurations. Then select GDB Hardware Debugging and create a new launch configuration. The "Main" tab will be automatically populated with the current project and related binary. Switch to the "Debugger" tab and configure it as per below:<br />
<br />
[[File:Eclipse flashwriter debugging.png|frameless|600x600px]]<br />
<br />
Switch to the "Startup " tab and uncheck "Load image" and "Load symbols" and just add "source gdb_smarc_g2l_flash_writer" as the only initialization command:<br />
<br />
[[File:Eclipse flashwriter debugging startup.png|frameless|668x668px]]<br />
<br />
The template for this GDB script can be found [https://github.com/seebe/rzg_stuff/blob/master/openocd/gdb_smarc_g2l_flash_writer here], you will have to adjust the paths to your current ones. This is needed because for whatever reason the settings shown in this pane are not actually effective, so the only possibility is to have a separate file that includes all the preliminary GDB startup commands. Please also make sure that the SW1 of the SMARC board is configured as shown in the GDB script.<br />
<br />
If everything goes fine you should be able to debug the Flash Writer code in the Eclipse debug perspective:<br />
<br />
[[File:Eclipse flashwriter debugging connected.png|frameless|800x800px]]<br />
<br />
=== Debugging using OpenOCD - Dedicated plugin ===<br />
The procedure explained above is working but it may result a bit tedious. There is a specific OpenOCD plugin but it is not installed by default with Eclipse. In order to install it, go to Help -> Install New Software. Then select "All Available Sites" and in the filter type "openocd" and hit enter.<br />
<br />
[[File:Eclipse install openocd plugin.png|frameless|600x600px]]<br />
<br />
Select the plugin and install, at the end of the installation process an Eclipse restart is required.<br />
<br />
Right click on the project -> Debug As -> Debug Configurations, a new option should be available: "GDB OpenOCD Debugging". Create a new configuration, leave the "Main" tab with the default values and switch to the "Debugger" tab. Here is where you have to configure the link to the OpenOCD executable and the config options, as well as the right GDB executable:<br />
<br />
[[File:Eclipse openocd plugin debugger.png|frameless|800x800px]]<br />
<br />
Adapt to your own paths. The OpenOCD config options for RZ/G2L are:<br />
-f /home/micbis/repos/openocd/installdir/bin/../share/openocd/scripts/interface/jlink.cfg -c "set SOC G2L" -f /home/micbis/repos/openocd/installdir/bin/../share/openocd/scripts/target/renesas_rz_g2.cfg<br />
Again, the paths have to be adjusted. Do not forget to modify the GDB executable name with the environment variable ${CROSS_COMPILE}. Then switch to the "Startup" tab and configure as per below:<br />
<br />
[[File:openocd_eclipse_with_plugin_startup.png|frameless|800x800px]]<br />
<br />
If everything is set properly by clicking on the "bug" icon, OpenOCD is started automatically, code and symbols loaded automatically and therefore you should end up in being able to debug, similarly to what was shown in the previous section.<br />
<br />
Note: It is normal to see following output in eclipse console while launching debug configuration. Those messages occur when the MPU gets reset.<br />
Then it goes on and it dumps the registers, so it should be fine.<br />
[[File:MPU_reset_and_dumping_resister_1.png|frameless|800x800px]]<br />
<br />
== Secondary cores cross developing and debugging ==<br />
The RZ/G2 family includes a secondary, real-time core. The RZ/G2L include a Cortex-M33 whereas RZ/G2E-N-M-H include a Cortex-R7. You can use Eclipse to develop and debug also for these cores. Debugging is a little tricky because the secondary core cannot boot independently, rather it relies on the main core to load the firmware and boot. However the idea behind does not change much, you need to setup a development environment for the Cortex-M/R (e.g. arm-none-eabi-gcc ) and use the corresponding GDB to debug (arm-none-eabi-gdb). GDB connects to the OpenOCD port dedicated to the secondary core. You can also develop and debug both main cores and secondary cores at the same time, using two Eclipse instances.<br />
<br />
=== Cortex-M33 developing and debugging ===<br />
First of all it is important to notice that the official RZ/G2L Cortex-M33 development and debugging environment is e2studio. Therefore the instructions provided here most likely are not relevant. However, this section is meant to show that OpenOCD can be used as well, for the sake of completeness.<br />
<br />
In order to develop and debug for the Arm-v8M (and Arm-v8R) you need to install another GCC toolchain. It can be downloaded from the [https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm/downloads Arm developer website]. The Linux x86_64 Tarball is what you want to download and untar in the folder you like, for example:<br />
tar -xvf gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2 -C /opt/arm/<br />
then add the bin directory to the path and export the cross compile environment variable:<br />
PATH=/opt/arm/gcc-arm-none-eabi-10-2020-q4-major/bin:$PATH ; export CROSS_COMPILE=arm-none-eabi-<br />
Download the Cortex-M33 sample code (simple LED blink example) from [https://github.com/seebe/rzg_stuff/raw/master/openocd/cm33_sample_code/rzg2l_baremetal_blinky_smarc.tar.gz here]. <br />
<br />
Now you can start Eclipse:<br />
eclipse &<br />
It may be convenient to create a workspace for Cortex-M and keep it separated from the Cortex-A. This is useful to have the possibility to potentially run two different Eclipse instances.<br />
<br />
Import the blinky project in the newly created workspace: File -> Import -> General -> Projects from Folder or Archive. Select the archive file downloaded previously by clicking on Archive. Deselect the top of the two projects displayed and click Finish:<br />
<br />
[[File:Eclipse import archive.png|frameless|600x600px]]<br />
<br />
You should be able to build the project without errors (33 warnings). You have to create a debug configuration, right click on the project, Debug As -> Debug Configurations. Select GDB OpenOCD Debugging (you need the OpenOCD plugin as per previous section) and create a new debug configuration by clicking on the leftmost icon. Leave the "Main" tab as per default and switch to the "Debugger" tab. You may want to deselect "Start OpenOCD locally", since OpenOCD will be started manually. Then in the "GDB Client Setup" part use the ${CROSS_COMPILE} as prefix, change the port number to 3334 and finally change the command ('''important''') "set mem inaccesible-by-default" to "on" :<br />
<br />
[[File:Eclipse cm33 debug config2.png|frameless|1000x1000px]]<br />
<br />
Move to the Startup tab and modify the fields as per below:<br />
<br />
[[File:Eclipse cm33 debug config 3.png|frameless|1000x1000px]]<br />
<br />
Do not click on Debug, just save and close, it is time to launch OpenOCD "manually" and load the Cortex-M33 binary via Cortex-A55.<br />
<br />
As you have probably noticed reading [[RZ-G/RZG openocd new#Run openocd|this part of the OpenOCD guide]], OpenOCD starts two gdb servers, one for the dual Cortex-A55 (SMP) and another for the Cortex-M33. However as already mentioned the Cortex-M33 is not independent and it has to be started by the Cortex-A55. Let's do it "manually", i.e. starting first OpenOCD and GDB in the terminal and not via Eclipse. From the folder where OpenOCD binary is installed:<br />
./openocd -f ../share/openocd/scripts/interface/jlink.cfg -c "set SOC G2L" -f ../share/openocd/scripts/target/renesas_rz_g2.cfg<br />
Before launching GDB, download [https://github.com/seebe/rzg_stuff/blob/master/openocd/gdb_smarc_g2l_blinky_ca55_load this script] and modify the binary path according to your own, This is the binary generated by Eclipse previously, normally in the workspace / project name / Debug folder. Tip: in Eclipse you can easily copy the executable path by right clink on the executable itself -> "Show in local terminal".<br />
<br />
Then open another terminal:<br />
source /opt/poky/3.1.5/environment-setup-aarch64-poky-linux<br />
$GDB<br />
<br />
GNU gdb (GDB) 9.1<br />
Copyright (C) 2020 Free Software Foundation, Inc.<br />
License GPLv3+: GNU GPL version 3 or later <<nowiki>http://gnu.org/licenses/gpl.html</nowiki>><br />
This is free software: you are free to change and redistribute it.<br />
There is NO WARRANTY, to the extent permitted by law.<br />
Type "show copying" and "show warranty" for details.<br />
This GDB was configured as "--host=x86_64-pokysdk-linux --target=aarch64-poky-linux".<br />
Type "show configuration" for configuration details.<br />
For bug reporting instructions, please see:<br />
<<nowiki>http://www.gnu.org/software/gdb/bugs/</nowiki>>.<br />
Find the GDB manual and other documentation resources online at:<br />
<<nowiki>http://www.gnu.org/software/gdb/documentation/</nowiki>>.<br />
<br />
For help, type "help".<br />
Type "apropos word" to search for commands related to "word".<br />
(gdb)<br />
and launch the script by giving the command: <br />
source ~/rzg_stuff/openocd/gdb_smarc_g2l_blinky_ca55_load<br />
The script executes all the needed steps to load the code and wake the Cortex-M33 up. If successful you should get:<br />
JTAG scan chain interrogation failed: all ones<br />
Check JTAG interface, timings, target power, etc.<br />
Trying to use configured scan chain anyway...<br />
r9a07g044l.cpu: IR capture error; saw 0x0f not 0x01<br />
Bypassing JTAG setup events due to errors<br />
Invalid ACK (7) in DAP response<br />
JTAG-DP STICKY ERROR<br />
Deferring arp_examine of r9a07g044l.a55.1<br />
Use arp_examine command to examine it manually!<br />
Deferring arp_examine of r9a07g044l.m33<br />
Use arp_examine command to examine it manually!<br />
Invalid ACK (7) in DAP response<br />
<br />
Debug regions are unpowered, an unexpected reset might have happened<br />
JTAG-DP STICKY ERROR<br />
Polling target r9a07g044l.a55.0 failed, trying to reexamine<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled during replay (WAIT) - resending<br />
DAP transaction stalled (WAIT) - slowing down<br />
r9a07g044l.a55.0: hardware has 6 breakpoints, 4 watchpoints<br />
r9a07g044l.a55.0 halted in AArch64 state due to debug-request, current mode: EL3H<br />
cpsr: 0x400003cd pc: 0x3aac<br />
MMU: disabled, D-Cache: disabled, I-Cache: enabled<br />
Loading section .text, size 0x18ec lma 0x10000<br />
Loading section .data, size 0x58 lma 0x1e000<br />
Loading section .secure, size 0x268 lma 0x1f400<br />
Start address 0x000000001001f5ed, load size 7084<br />
Transfer rate: 7 KB/sec, 2361 bytes/write.<br />
0x11020504: 00000000 <br />
<br />
0x11020d28: 00001100 <br />
<br />
0x11010984: 00000000 <br />
<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled during replay (WAIT) - resending<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled during replay (WAIT) - resending<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
r9a07g044l.m33: hardware has 8 breakpoints, 4 watchpoints<br />
r9a07g044l.m33: external resume detected<br />
hard_err: catch<br />
int_err: catch<br />
bus_err: catch<br />
state_err: catch<br />
chk_err: catch<br />
nocp_err: catch<br />
mm_err: catch<br />
reset: catch<br />
<br />
target halted due to breakpoint, current mode: Thread <br />
xPSR: 0xf9000000 pc: 0x1001f5ec msp: 0x3001fa00<br />
<br />
Now the Cortex-M33 is stopped at the secure reset vector, you can switch to Eclipse again and click on the debug icon to connect to the Cortex-M33 OpenOCD gdbserver: <br />
<br />
[[File:Eclipse cm33 debug in progress.png|frameless|1000x1000px]]<br />
<br />
Note: If you get error below while launching eclipse, make sure libncurses5 is installed in your system.<br />
<pre><br />
sudo apt-get install libncurses5<br />
</pre><br />
[[File:gdb_version_error.png|frameless|800x800px]]<br />
<br />
Please note that there are no user LEDs on the SMARC board. In order to see a LED blinking you would need to add an external PMOD LED board, for example [https://store.digilentinc.com/pmod-led-four-high-brightness-leds/ this one], to the PMOD0 connector of the carrier board. <br />
<br />
=== Cortex-R7 developing and debugging ===<br />
To do.</div>Padhikarihttps://renesas.info/w/index.php?title=File:MPU_reset_and_dumping_resister_1.png&diff=351File:MPU reset and dumping resister 1.png2021-06-23T16:20:14Z<p>Padhikari: Padhikari uploaded a new version of File:MPU reset and dumping resister 1.png</p>
<hr />
<div></div>Padhikarihttps://renesas.info/w/index.php?title=File:MPU_reset_and_dumping_resister_2.png&diff=350File:MPU reset and dumping resister 2.png2021-06-23T15:57:43Z<p>Padhikari: </p>
<hr />
<div></div>Padhikarihttps://renesas.info/w/index.php?title=File:MPU_reset_and_dumping_resister_1.png&diff=349File:MPU reset and dumping resister 1.png2021-06-23T15:57:25Z<p>Padhikari: </p>
<hr />
<div></div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG2_Eclipse_develop_and_debug&diff=348RZ-G/RZG2 Eclipse develop and debug2021-06-23T15:57:09Z<p>Padhikari: </p>
<hr />
<div>== Introduction ==<br />
<br />
In this page you'll find instructions on how to use Eclipse to develop, cross-build and debug for RZ/G2.<br />
[https://www.eclipse.org/ Eclipse] is a very well known IDE (Integrated Development Environment) that can be used to develop for different targets, supporting many programming languages.<br />
<br />
== Installation ==<br />
<br />
There are many guides available online that describe how to install Eclipse on your host Linux machine, normally an x86 PC.<br />
For example, if you are using Ubuntu 20.04, you can follow the instructions included on this [https://linuxconfig.org/eclipse-ide-for-c-c-developers-installation-on-ubuntu-20-04 web page].<br />
Do not launch Eclipse after the installation.<br />
<br />
== Setting up the cross-build environment ==<br />
<br />
Since the goal is to develop for RZ/G2 that are SoCs based on 64-bit Arm Cortex-A cores, you need to install the SDK.<br />
For more information on how to build and install the SDK for RZ/G2 you can normally refer to the Release Note of the BSP, the links can be found [[RZ-G/RZ-G2_BSP|here]].<br />
Once the SDK is installed, you have to setup the environment by launching the related script.<br />
The default installation path is: /opt/poky/[version] so, for example, in order to setup the environment to cross-build for RZ/G2L:<br />
<br />
source /opt/poky/3.1.5/environment-setup-aarch64-poky-linux <br />
<br />
If successful, you should be able to invoke the cross-compiler:<br />
<br />
$ $CC --version<br />
aarch64-poky-linux-gcc (GCC) 8.3.0<br />
Copyright (C) 2018 Free Software Foundation, Inc.<br />
This is free software; see the source for copying conditions. There is NO<br />
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.<br />
<br />
and also other tools like GDB. These system environment variables will be used by Eclipse.<br />
<br />
== Launching Eclipse == <br />
<br />
We are now ready to launch Eclipse, from the same terminal where you sourced the environment variable script just type:<br />
<br />
eclipse &<br />
<br />
When you launch Eclipse for the first time, it asks to set-up a workspace, after that you should see a Welcome screen:<br />
<br />
[[File:Eclipse Welcome.png|800px|frameless|Eclipse Welcome page]]<br />
<br />
=== First Linux cross application: Hello World ===<br />
<br />
In order to create your first Hello World program, click File -> New -> C/C++ Project. Then select "C Managed Build", next, select "Hello World ANSI C Project", give it a name (e.g. Hello World) and select Cross GCC, next, next until the Cross configuration window appears. Then for "Cross compiler prefix" type '''''aarch64-poky-linux-''''' and "Cross compiler path" type '''''/usr/bin'''''.<br />
<br />
[[File:Eclipse cross.png|400px|frameless]]<br />
<br />
If you click finish a new project with the name give will be created. Now in order to get it correctly built, you need to adjust some build settings. Right click on the project, then Properties. When the setting windows pop-up, expand C/C++ Build and select Settings. <br />
Then select Miscellaneous under Cross GCC Compiler and add the flag: '''''--sysroot=${SDKTARGETSYSROOT}'''''.<br />
Similarly, for Cross GCC Linker: '''''--sysroot=${SDKTARGETSYSROOT}'''''<br />
<br />
[[File:Eclipse build settings.png|800px|frameless]]<br />
<br />
If you now click on the hammer icon on the top left, you should be able to build the project. If successful on the console you will get:<br />
<br />
12:04:50 **** Build of configuration Debug for project Hello World ****<br />
make all <br />
Building file: ../src/Hello World.c<br />
Invoking: Cross GCC Compiler<br />
aarch64-poky-linux-gcc -O0 -g3 -Wall -c -fmessage-length=0 --sysroot=/opt/poky/3.1.5/sysroots/aarch64-poky-linux -MMD -MP -MF"src/Hello World.d" -MT"src/Hello\ World.d" -o "src/Hello World.o" <br />
"../src/Hello World.c"<br />
Finished building: ../src/Hello World.c<br />
<br />
Building target: Hello World<br />
Invoking: Cross GCC Linker<br />
aarch64-poky-linux-gcc --sysroot=/opt/poky/3.1.5/sysroots/aarch64-poky-linux -o "Hello World" ./src/Hello\ World.o <br />
Finished building target: Hello World<br />
<br />
12:04:50 Build Finished. 0 errors, 0 warnings. (took 168ms)<br />
<br />
== Cross debugging a Linux application over the network using GDB == <br />
<br />
Now we are ready to debug. Click Run -> Run Configurations, then select (double click) on C/C++ Remote Application, you can leave the default name or choose what you want.<br />
<br />
[[File:Eclipse debug hello world.png|600px|frameless]]<br />
<br />
Then click "New" button (corresponding to Connection), choose "SSH", then "OK":<br />
<br />
[[File:Eclipse debug hello world connection.png|400px|frameless]]<br />
<br />
Give the connection a name and specify the target IP address. User should be ''root''. <br />
There's only one last field to configure in the "Run Configurations": Remove Absolute File Patch for C/C++ Application", click on Browse and leave the default path, then click OK.<br />
Please notice that in order to connect and debug ''openssh, sftp-server'' and ''gdbserver'' must be installed on the target. You can do this by adding following packages in local.conf file in yocto.<br />
<pre><br />
IMAGE_INSTALL_append = " rpm openssh openssh-sftp-server openssh-scp gdbserver"<br />
</pre><br />
If you click "Run", the application will be deployed and run on the target board. In the console you should see:<br />
<br />
/home/root/Hello\ World;exit<br />
<br />
Last login: Tue Jun 1 11:36:17 2021 from 192.168.10.118<br />
<br />
root@smarc-rzg2l:~# /home/root/Hello\ World;exit<br />
!!!Hello World!!!<br />
logout<br />
<br />
To debug, instead, you have to adjust one more parameter. Select "Debug" from the drop down list (instead on "Run").<br />
Then click on the gear corresponding to "Hello World Debug" (or the name you gave):<br />
<br />
[[File:Eclipse debug hello world debug.png|600px|frameless]]<br />
<br />
Switch to the Debugger Tab and select the cross GDB included in the SDK, ''aarch64-poky-linux-gdb'':<br />
<br />
[[File:Eclipse debug hello world debug debugger.png|600px|frameless]]<br />
<br />
Note: If an error pops up when trying to modify the debug configuration, then you need to add a new "Launch Target". Normally it should not be strictly needed but without at least a target it may not work.<br />
At this point you should be able to debug by simply clicking on the "bug" icon, the binary will be downloaded into the target and run under GDB control":<br />
<br />
[[File:Eclipse debug hello world debug ongoing.png|800px|frameless]]<br />
<br />
== Cross debugging bare metal programs using GDB and OpenOCD ==<br />
<br />
Eclipse is useful also to debug bare metal programs in combination with OpenOCD. In this section the [https://github.com/renesas-rz/rzg2_flash_writer RZ/G2 Flash Writer] is taken as an example.<br />
<br />
=== Cloning a repository using Eclipse ===<br />
Eclipse includes a plugin for a seamless integration with Git. You can clone and import at the same time. Click File -> Import -> Git -> Projects from Git (with smart import). Then Clone URI, then paste the RZ/G2 Flash Writer GitHub link:<br />
<br />
https://github.com/renesas-rz/rzg2_flash_writer<br />
<br />
into Location (URI). Then by clicking next, the Branch Selection window appears, select both "master" and "rz_g2l" (default). Then you are prompted to choose a destination folder, choose where the repository will be cloned and click Next. Now we want to import the project using another wizard, so we have to click on "Show other specialized import wizards". <br />
<br />
[[File:Eclipse import git.png|frameless|600x600px]]<br />
<br />
When the other import wizard window appears, select from the C/C++ category, "Existing Code as Makefile Project" and click Next. Browse to the code location where you cloned the repository, select the folder (Open) and finally select "Cross GCC" before clicking Finish:<br />
<br />
[[File:Eclipse import git makefile.png|frameless|600x600px]]<br />
<br />
You should now have the project cloned from the repository, on the master branch and imported as a Makefile project.<br />
<br />
=== Building RZ/G2E-N-M-H Flash Writer ===<br />
The master branch is the branch you want to use to build the Flash Writer for RZ/G2E-N-M-H. Of course you would need to setup the build environment for your target in a similar way as explained above for the RZ/G2L. Assuming you did so, we just have to make sure the correct board is selected during the build. To do so, right click on the project name -> Properties and then select C/C++ Build. Uncheck "Use default build command" and add:<br />
<br />
* BOARD=EK874 for RZ/G2E<br />
* BOARD=HIHOPE for RZ/G2N-M-H<br />
<br />
[[File:Eclipse flashwriter board.png|frameless|600x600px]]<br />
<br />
You can now build, you should see the message:<br />
========== !!! Compile Complete !!! ==========<br />
in the Console output.<br />
<br />
=== Building RZ/G2L Flash Writer ===<br />
To build the RZ/G2L Flash Writer we need to checkout the corresponding branch. Right click on the project -> Team -> Switch To -> Other. Then from the "Remote Tracking" choose the rz_g2l branch, click "Check Out...":<br />
<br />
[[File:Eclipse flashwriter branch.png|frameless|600x600px]]<br />
<br />
<br />
And finally "Check out Commit". A warning about the "Detached HEAD" will appear, you can ignore and click close. Alternatively, and recommended if you want to make changes, you can "Create Branch" window appears, leave it as is and click on "Finish". We need to select the right make command, so right click on the project name -> Properties and then select C/C++ Build. Uncheck "Use default build command" and add/modify BOARD=RZG2L_SMARC. The message<br />
========== !!! Compile Complete !!! ==========<br />
should appear if the build is successful. Do not forget to source the right environment variable setup script according to the board used. Please note that you would need to launch Eclipse from the terminal where the environment variables have been set.<br />
<br />
=== Debugging using OpenOCD - No specific plugin ===<br />
Please follow the instructions given in [[RZ-G/RZG openocd new|this page]] on how to set-up, build and launch OpenOCD for the RZ/G2 targets. You have to make sure that OpenOCD is running in another terminal window and awaiting for a GDB connection. In the rest of the section the RZ/G2L is taken as an example, however the process is very similar also for the other members of the RZ/G2 family.<br />
<br />
You need to create a debug config file specific to the Flash Writer. Right click on the project -> Debug As -> Debug Configurations. Then select GDB Hardware Debugging and create a new launch configuration. The "Main" tab will be automatically populated with the current project and related binary. Switch to the "Debugger" tab and configure it as per below:<br />
<br />
[[File:Eclipse flashwriter debugging.png|frameless|600x600px]]<br />
<br />
Switch to the "Startup " tab and uncheck "Load image" and "Load symbols" and just add "source gdb_smarc_g2l_flash_writer" as the only initialization command:<br />
<br />
[[File:Eclipse flashwriter debugging startup.png|frameless|668x668px]]<br />
<br />
The template for this GDB script can be found [https://github.com/seebe/rzg_stuff/blob/master/openocd/gdb_smarc_g2l_flash_writer here], you will have to adjust the paths to your current ones. This is needed because for whatever reason the settings shown in this pane are not actually effective, so the only possibility is to have a separate file that includes all the preliminary GDB startup commands. Please also make sure that the SW1 of the SMARC board is configured as shown in the GDB script.<br />
<br />
If everything goes fine you should be able to debug the Flash Writer code in the Eclipse debug perspective:<br />
<br />
[[File:Eclipse flashwriter debugging connected.png|frameless|800x800px]]<br />
<br />
=== Debugging using OpenOCD - Dedicated plugin ===<br />
The procedure explained above is working but it may result a bit tedious. There is a specific OpenOCD plugin but it is not installed by default with Eclipse. In order to install it, go to Help -> Install New Software. Then select "All Available Sites" and in the filter type "openocd" and hit enter.<br />
<br />
[[File:Eclipse install openocd plugin.png|frameless|600x600px]]<br />
<br />
Select the plugin and install, at the end of the installation process an Eclipse restart is required.<br />
<br />
Right click on the project -> Debug As -> Debug Configurations, a new option should be available: "GDB OpenOCD Debugging". Create a new configuration, leave the "Main" tab with the default values and switch to the "Debugger" tab. Here is where you have to configure the link to the OpenOCD executable and the config options, as well as the right GDB executable:<br />
<br />
[[File:Eclipse openocd plugin debugger.png|frameless|800x800px]]<br />
<br />
Adapt to your own paths. The OpenOCD config options for RZ/G2L are:<br />
-f /home/micbis/repos/openocd/installdir/bin/../share/openocd/scripts/interface/jlink.cfg -c "set SOC G2L" -f /home/micbis/repos/openocd/installdir/bin/../share/openocd/scripts/target/renesas_rz_g2.cfg<br />
Again, the paths have to be adjusted. Do not forget to modify the GDB executable name with the environment variable ${CROSS_COMPILE}. Then switch to the "Startup" tab and configure as per below:<br />
<br />
[[File:openocd_eclipse_with_plugin_startup.png|frameless|800x800px]]<br />
<br />
If everything is set properly by clicking on the "bug" icon, OpenOCD is started automatically, code and symbols loaded automatically and therefore you should end up in being able to debug, similarly to what was shown in the previous section.<br />
<br />
== Secondary cores cross developing and debugging ==<br />
The RZ/G2 family includes a secondary, real-time core. The RZ/G2L include a Cortex-M33 whereas RZ/G2E-N-M-H include a Cortex-R7. You can use Eclipse to develop and debug also for these cores. Debugging is a little tricky because the secondary core cannot boot independently, rather it relies on the main core to load the firmware and boot. However the idea behind does not change much, you need to setup a development environment for the Cortex-M/R (e.g. arm-none-eabi-gcc ) and use the corresponding GDB to debug (arm-none-eabi-gdb). GDB connects to the OpenOCD port dedicated to the secondary core. You can also develop and debug both main cores and secondary cores at the same time, using two Eclipse instances.<br />
<br />
=== Cortex-M33 developing and debugging ===<br />
First of all it is important to notice that the official RZ/G2L Cortex-M33 development and debugging environment is e2studio. Therefore the instructions provided here most likely are not relevant. However, this section is meant to show that OpenOCD can be used as well, for the sake of completeness.<br />
<br />
In order to develop and debug for the Arm-v8M (and Arm-v8R) you need to install another GCC toolchain. It can be downloaded from the [https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm/downloads Arm developer website]. The Linux x86_64 Tarball is what you want to download and untar in the folder you like, for example:<br />
tar -xvf gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2 -C /opt/arm/<br />
then add the bin directory to the path and export the cross compile environment variable:<br />
PATH=/opt/arm/gcc-arm-none-eabi-10-2020-q4-major/bin:$PATH ; export CROSS_COMPILE=arm-none-eabi-<br />
Download the Cortex-M33 sample code (simple LED blink example) from [https://github.com/seebe/rzg_stuff/raw/master/openocd/cm33_sample_code/rzg2l_baremetal_blinky_smarc.tar.gz here]. <br />
<br />
Now you can start Eclipse:<br />
eclipse &<br />
It may be convenient to create a workspace for Cortex-M and keep it separated from the Cortex-A. This is useful to have the possibility to potentially run two different Eclipse instances.<br />
<br />
Import the blinky project in the newly created workspace: File -> Import -> General -> Projects from Folder or Archive. Select the archive file downloaded previously by clicking on Archive. Deselect the top of the two projects displayed and click Finish:<br />
<br />
[[File:Eclipse import archive.png|frameless|600x600px]]<br />
<br />
You should be able to build the project without errors (33 warnings). You have to create a debug configuration, right click on the project, Debug As -> Debug Configurations. Select GDB OpenOCD Debugging (you need the OpenOCD plugin as per previous section) and create a new debug configuration by clicking on the leftmost icon. Leave the "Main" tab as per default and switch to the "Debugger" tab. You may want to deselect "Start OpenOCD locally", since OpenOCD will be started manually. Then in the "GDB Client Setup" part use the ${CROSS_COMPILE} as prefix, change the port number to 3334 and finally change the command ('''important''') "set mem inaccesible-by-default" to "on" :<br />
<br />
[[File:Eclipse cm33 debug config2.png|frameless|1000x1000px]]<br />
<br />
Move to the Startup tab and modify the fields as per below:<br />
<br />
[[File:Eclipse cm33 debug config 3.png|frameless|1000x1000px]]<br />
<br />
Do not click on Debug, just save and close, it is time to launch OpenOCD "manually" and load the Cortex-M33 binary via Cortex-A55.<br />
<br />
As you have probably noticed reading [[RZ-G/RZG openocd new#Run openocd|this part of the OpenOCD guide]], OpenOCD starts two gdb servers, one for the dual Cortex-A55 (SMP) and another for the Cortex-M33. However as already mentioned the Cortex-M33 is not independent and it has to be started by the Cortex-A55. Let's do it "manually", i.e. starting first OpenOCD and GDB in the terminal and not via Eclipse. From the folder where OpenOCD binary is installed:<br />
./openocd -f ../share/openocd/scripts/interface/jlink.cfg -c "set SOC G2L" -f ../share/openocd/scripts/target/renesas_rz_g2.cfg<br />
Before launching GDB, download [https://github.com/seebe/rzg_stuff/blob/master/openocd/gdb_smarc_g2l_blinky_ca55_load this script] and modify the binary path according to your own, This is the binary generated by Eclipse previously, normally in the workspace / project name / Debug folder. Tip: in Eclipse you can easily copy the executable path by right clink on the executable itself -> "Show in local terminal".<br />
<br />
Then open another terminal:<br />
source /opt/poky/3.1.5/environment-setup-aarch64-poky-linux<br />
$GDB<br />
<br />
GNU gdb (GDB) 9.1<br />
Copyright (C) 2020 Free Software Foundation, Inc.<br />
License GPLv3+: GNU GPL version 3 or later <<nowiki>http://gnu.org/licenses/gpl.html</nowiki>><br />
This is free software: you are free to change and redistribute it.<br />
There is NO WARRANTY, to the extent permitted by law.<br />
Type "show copying" and "show warranty" for details.<br />
This GDB was configured as "--host=x86_64-pokysdk-linux --target=aarch64-poky-linux".<br />
Type "show configuration" for configuration details.<br />
For bug reporting instructions, please see:<br />
<<nowiki>http://www.gnu.org/software/gdb/bugs/</nowiki>>.<br />
Find the GDB manual and other documentation resources online at:<br />
<<nowiki>http://www.gnu.org/software/gdb/documentation/</nowiki>>.<br />
<br />
For help, type "help".<br />
Type "apropos word" to search for commands related to "word".<br />
(gdb)<br />
and launch the script by giving the command: <br />
source ~/rzg_stuff/openocd/gdb_smarc_g2l_blinky_ca55_load<br />
The script executes all the needed steps to load the code and wake the Cortex-M33 up. If successful you should get:<br />
JTAG scan chain interrogation failed: all ones<br />
Check JTAG interface, timings, target power, etc.<br />
Trying to use configured scan chain anyway...<br />
r9a07g044l.cpu: IR capture error; saw 0x0f not 0x01<br />
Bypassing JTAG setup events due to errors<br />
Invalid ACK (7) in DAP response<br />
JTAG-DP STICKY ERROR<br />
Deferring arp_examine of r9a07g044l.a55.1<br />
Use arp_examine command to examine it manually!<br />
Deferring arp_examine of r9a07g044l.m33<br />
Use arp_examine command to examine it manually!<br />
Invalid ACK (7) in DAP response<br />
<br />
Debug regions are unpowered, an unexpected reset might have happened<br />
JTAG-DP STICKY ERROR<br />
Polling target r9a07g044l.a55.0 failed, trying to reexamine<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled during replay (WAIT) - resending<br />
DAP transaction stalled (WAIT) - slowing down<br />
r9a07g044l.a55.0: hardware has 6 breakpoints, 4 watchpoints<br />
r9a07g044l.a55.0 halted in AArch64 state due to debug-request, current mode: EL3H<br />
cpsr: 0x400003cd pc: 0x3aac<br />
MMU: disabled, D-Cache: disabled, I-Cache: enabled<br />
Loading section .text, size 0x18ec lma 0x10000<br />
Loading section .data, size 0x58 lma 0x1e000<br />
Loading section .secure, size 0x268 lma 0x1f400<br />
Start address 0x000000001001f5ed, load size 7084<br />
Transfer rate: 7 KB/sec, 2361 bytes/write.<br />
0x11020504: 00000000 <br />
<br />
0x11020d28: 00001100 <br />
<br />
0x11010984: 00000000 <br />
<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled during replay (WAIT) - resending<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled during replay (WAIT) - resending<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
r9a07g044l.m33: hardware has 8 breakpoints, 4 watchpoints<br />
r9a07g044l.m33: external resume detected<br />
hard_err: catch<br />
int_err: catch<br />
bus_err: catch<br />
state_err: catch<br />
chk_err: catch<br />
nocp_err: catch<br />
mm_err: catch<br />
reset: catch<br />
<br />
target halted due to breakpoint, current mode: Thread <br />
xPSR: 0xf9000000 pc: 0x1001f5ec msp: 0x3001fa00<br />
<br />
Now the Cortex-M33 is stopped at the secure reset vector, you can switch to Eclipse again and click on the debug icon to connect to the Cortex-M33 OpenOCD gdbserver: <br />
<br />
[[File:Eclipse cm33 debug in progress.png|frameless|1000x1000px]]<br />
<br />
Note: If you get error below while launching eclipse, make sure libncurses5 is installed in your system.<br />
<pre><br />
sudo apt-get install libncurses5<br />
</pre><br />
[[File:gdb_version_error.png|frameless|800x800px]]<br />
<br />
Please note that there are no user LEDs on the SMARC board. In order to see a LED blinking you would need to add an external PMOD LED board, for example [https://store.digilentinc.com/pmod-led-four-high-brightness-leds/ this one], to the PMOD0 connector of the carrier board. <br />
<br />
=== Cortex-R7 developing and debugging ===<br />
To do.</div>Padhikarihttps://renesas.info/w/index.php?title=RZ-G/RZG2_Eclipse_develop_and_debug&diff=347RZ-G/RZG2 Eclipse develop and debug2021-06-23T15:41:57Z<p>Padhikari: </p>
<hr />
<div>== Introduction ==<br />
<br />
In this page you'll find instructions on how to use Eclipse to develop, cross-build and debug for RZ/G2.<br />
[https://www.eclipse.org/ Eclipse] is a very well known IDE (Integrated Development Environment) that can be used to develop for different targets, supporting many programming languages.<br />
<br />
== Installation ==<br />
<br />
There are many guides available online that describe how to install Eclipse on your host Linux machine, normally an x86 PC.<br />
For example, if you are using Ubuntu 20.04, you can follow the instructions included on this [https://linuxconfig.org/eclipse-ide-for-c-c-developers-installation-on-ubuntu-20-04 web page].<br />
Do not launch Eclipse after the installation.<br />
<br />
== Setting up the cross-build environment ==<br />
<br />
Since the goal is to develop for RZ/G2 that are SoCs based on 64-bit Arm Cortex-A cores, you need to install the SDK.<br />
For more information on how to build and install the SDK for RZ/G2 you can normally refer to the Release Note of the BSP, the links can be found [[RZ-G/RZ-G2_BSP|here]].<br />
Once the SDK is installed, you have to setup the environment by launching the related script.<br />
The default installation path is: /opt/poky/[version] so, for example, in order to setup the environment to cross-build for RZ/G2L:<br />
<br />
source /opt/poky/3.1.5/environment-setup-aarch64-poky-linux <br />
<br />
If successful, you should be able to invoke the cross-compiler:<br />
<br />
$ $CC --version<br />
aarch64-poky-linux-gcc (GCC) 8.3.0<br />
Copyright (C) 2018 Free Software Foundation, Inc.<br />
This is free software; see the source for copying conditions. There is NO<br />
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.<br />
<br />
and also other tools like GDB. These system environment variables will be used by Eclipse.<br />
<br />
== Launching Eclipse == <br />
<br />
We are now ready to launch Eclipse, from the same terminal where you sourced the environment variable script just type:<br />
<br />
eclipse &<br />
<br />
When you launch Eclipse for the first time, it asks to set-up a workspace, after that you should see a Welcome screen:<br />
<br />
[[File:Eclipse Welcome.png|800px|frameless|Eclipse Welcome page]]<br />
<br />
=== First Linux cross application: Hello World ===<br />
<br />
In order to create your first Hello World program, click File -> New -> C/C++ Project. Then select "C Managed Build", next, select "Hello World ANSI C Project", give it a name (e.g. Hello World) and select Cross GCC, next, next until the Cross configuration window appears. Then for "Cross compiler prefix" type '''''aarch64-poky-linux-''''' and "Cross compiler path" type '''''/usr/bin'''''.<br />
<br />
[[File:Eclipse cross.png|400px|frameless]]<br />
<br />
If you click finish a new project with the name give will be created. Now in order to get it correctly built, you need to adjust some build settings. Right click on the project, then Properties. When the setting windows pop-up, expand C/C++ Build and select Settings. <br />
Then select Miscellaneous under Cross GCC Compiler and add the flag: '''''--sysroot=${SDKTARGETSYSROOT}'''''.<br />
Similarly, for Cross GCC Linker: '''''--sysroot=${SDKTARGETSYSROOT}'''''<br />
<br />
[[File:Eclipse build settings.png|800px|frameless]]<br />
<br />
If you now click on the hammer icon on the top left, you should be able to build the project. If successful on the console you will get:<br />
<br />
12:04:50 **** Build of configuration Debug for project Hello World ****<br />
make all <br />
Building file: ../src/Hello World.c<br />
Invoking: Cross GCC Compiler<br />
aarch64-poky-linux-gcc -O0 -g3 -Wall -c -fmessage-length=0 --sysroot=/opt/poky/3.1.5/sysroots/aarch64-poky-linux -MMD -MP -MF"src/Hello World.d" -MT"src/Hello\ World.d" -o "src/Hello World.o" <br />
"../src/Hello World.c"<br />
Finished building: ../src/Hello World.c<br />
<br />
Building target: Hello World<br />
Invoking: Cross GCC Linker<br />
aarch64-poky-linux-gcc --sysroot=/opt/poky/3.1.5/sysroots/aarch64-poky-linux -o "Hello World" ./src/Hello\ World.o <br />
Finished building target: Hello World<br />
<br />
12:04:50 Build Finished. 0 errors, 0 warnings. (took 168ms)<br />
<br />
== Cross debugging a Linux application over the network using GDB == <br />
<br />
Now we are ready to debug. Click Run -> Run Configurations, then select (double click) on C/C++ Remote Application, you can leave the default name or choose what you want.<br />
<br />
[[File:Eclipse debug hello world.png|600px|frameless]]<br />
<br />
Then click "New" button (corresponding to Connection), choose "SSH", then "OK":<br />
<br />
[[File:Eclipse debug hello world connection.png|400px|frameless]]<br />
<br />
Give the connection a name and specify the target IP address. User should be ''root''. <br />
There's only one last field to configure in the "Run Configurations": Remove Absolute File Patch for C/C++ Application", click on Browse and leave the default path, then click OK.<br />
Please notice that in order to connect and debug ''openssh, sftp-server'' and ''gdbserver'' must be installed on the target. You can do this by adding following packages in local.conf file in yocto.<br />
<pre><br />
IMAGE_INSTALL_append = " rpm openssh openssh-sftp-server openssh-scp gdbserver"<br />
</pre><br />
If you click "Run", the application will be deployed and run on the target board. In the console you should see:<br />
<br />
/home/root/Hello\ World;exit<br />
<br />
Last login: Tue Jun 1 11:36:17 2021 from 192.168.10.118<br />
<br />
root@smarc-rzg2l:~# /home/root/Hello\ World;exit<br />
!!!Hello World!!!<br />
logout<br />
<br />
To debug, instead, you have to adjust one more parameter. Select "Debug" from the drop down list (instead on "Run").<br />
Then click on the gear corresponding to "Hello World Debug" (or the name you gave):<br />
<br />
[[File:Eclipse debug hello world debug.png|600px|frameless]]<br />
<br />
Switch to the Debugger Tab and select the cross GDB included in the SDK, ''aarch64-poky-linux-gdb'':<br />
<br />
[[File:Eclipse debug hello world debug debugger.png|600px|frameless]]<br />
<br />
Note: If an error pops up when trying to modify the debug configuration, then you need to add a new "Launch Target". Normally it should not be strictly needed but without at least a target it may not work.<br />
At this point you should be able to debug by simply clicking on the "bug" icon, the binary will be downloaded into the target and run under GDB control":<br />
<br />
[[File:Eclipse debug hello world debug ongoing.png|800px|frameless]]<br />
<br />
== Cross debugging bare metal programs using GDB and OpenOCD ==<br />
<br />
Eclipse is useful also to debug bare metal programs in combination with OpenOCD. In this section the [https://github.com/renesas-rz/rzg2_flash_writer RZ/G2 Flash Writer] is taken as an example.<br />
<br />
=== Cloning a repository using Eclipse ===<br />
Eclipse includes a plugin for a seamless integration with Git. You can clone and import at the same time. Click File -> Import -> Git -> Projects from Git (with smart import). Then Clone URI, then paste the RZ/G2 Flash Writer GitHub link:<br />
<br />
https://github.com/renesas-rz/rzg2_flash_writer<br />
<br />
into Location (URI). Then by clicking next, the Branch Selection window appears, select both "master" and "rz_g2l" (default). Then you are prompted to choose a destination folder, choose where the repository will be cloned and click Next. Now we want to import the project using another wizard, so we have to click on "Show other specialized import wizards". <br />
<br />
[[File:Eclipse import git.png|frameless|600x600px]]<br />
<br />
When the other import wizard window appears, select from the C/C++ category, "Existing Code as Makefile Project" and click Next. Browse to the code location where you cloned the repository, select the folder (Open) and finally select "Cross GCC" before clicking Finish:<br />
<br />
[[File:Eclipse import git makefile.png|frameless|600x600px]]<br />
<br />
You should now have the project cloned from the repository, on the master branch and imported as a Makefile project.<br />
<br />
=== Building RZ/G2E-N-M-H Flash Writer ===<br />
The master branch is the branch you want to use to build the Flash Writer for RZ/G2E-N-M-H. Of course you would need to setup the build environment for your target in a similar way as explained above for the RZ/G2L. Assuming you did so, we just have to make sure the correct board is selected during the build. To do so, right click on the project name -> Properties and then select C/C++ Build. Uncheck "Use default build command" and add:<br />
<br />
* BOARD=EK874 for RZ/G2E<br />
* BOARD=HIHOPE for RZ/G2N-M-H<br />
<br />
[[File:Eclipse flashwriter board.png|frameless|600x600px]]<br />
<br />
You can now build, you should see the message:<br />
========== !!! Compile Complete !!! ==========<br />
in the Console output.<br />
<br />
=== Building RZ/G2L Flash Writer ===<br />
To build the RZ/G2L Flash Writer we need to checkout the corresponding branch. Right click on the project -> Team -> Switch To -> Other. Then from the "Remote Tracking" choose the rz_g2l branch, click "Check Out...":<br />
<br />
[[File:Eclipse flashwriter branch.png|frameless|600x600px]]<br />
<br />
<br />
And finally "Check out Commit". A warning about the "Detached HEAD" will appear, you can ignore and click close. Alternatively, and recommended if you want to make changes, you can "Create Branch" window appears, leave it as is and click on "Finish". We need to select the right make command, so right click on the project name -> Properties and then select C/C++ Build. Uncheck "Use default build command" and add/modify BOARD=RZG2L_SMARC. The message<br />
========== !!! Compile Complete !!! ==========<br />
should appear if the build is successful. Do not forget to source the right environment variable setup script according to the board used. Please note that you would need to launch Eclipse from the terminal where the environment variables have been set.<br />
<br />
=== Debugging using OpenOCD - No specific plugin ===<br />
Please follow the instructions given in [[RZ-G/RZG openocd new|this page]] on how to set-up, build and launch OpenOCD for the RZ/G2 targets. You have to make sure that OpenOCD is running in another terminal window and awaiting for a GDB connection. In the rest of the section the RZ/G2L is taken as an example, however the process is very similar also for the other members of the RZ/G2 family.<br />
<br />
You need to create a debug config file specific to the Flash Writer. Right click on the project -> Debug As -> Debug Configurations. Then select GDB Hardware Debugging and create a new launch configuration. The "Main" tab will be automatically populated with the current project and related binary. Switch to the "Debugger" tab and configure it as per below:<br />
<br />
[[File:Eclipse flashwriter debugging.png|frameless|600x600px]]<br />
<br />
Switch to the "Startup " tab and uncheck "Load image" and "Load symbols" and just add "source gdb_smarc_g2l_flash_writer" as the only initialization command:<br />
<br />
[[File:Eclipse flashwriter debugging startup.png|frameless|668x668px]]<br />
<br />
The template for this GDB script can be found [https://github.com/seebe/rzg_stuff/blob/master/openocd/gdb_smarc_g2l_flash_writer here], you will have to adjust the paths to your current ones. This is needed because for whatever reason the settings shown in this pane are not actually effective, so the only possibility is to have a separate file that includes all the preliminary GDB startup commands. Please also make sure that the SW1 of the SMARC board is configured as shown in the GDB script.<br />
<br />
If everything goes fine you should be able to debug the Flash Writer code in the Eclipse debug perspective:<br />
<br />
[[File:Eclipse flashwriter debugging connected.png|frameless|800x800px]]<br />
<br />
=== Debugging using OpenOCD - Dedicated plugin ===<br />
The procedure explained above is working but it may result a bit tedious. There is a specific OpenOCD plugin but it is not installed by default with Eclipse. In order to install it, go to Help -> Install New Software. Then select "All Available Sites" and in the filter type "openocd" and hit enter.<br />
<br />
[[File:Eclipse install openocd plugin.png|frameless|600x600px]]<br />
<br />
Select the plugin and install, at the end of the installation process an Eclipse restart is required.<br />
<br />
Right click on the project -> Debug As -> Debug Configurations, a new option should be available: "GDB OpenOCD Debugging". Create a new configuration, leave the "Main" tab with the default values and switch to the "Debugger" tab. Here is where you have to configure the link to the OpenOCD executable and the config options, as well as the right GDB executable:<br />
<br />
[[File:Eclipse openocd plugin debugger.png|frameless|800x800px]]<br />
<br />
Adapt to your own paths. The OpenOCD config options for RZ/G2L are:<br />
-f /home/micbis/repos/openocd/installdir/bin/../share/openocd/scripts/interface/jlink.cfg -c "set SOC G2L" -f /home/micbis/repos/openocd/installdir/bin/../share/openocd/scripts/target/renesas_rz_g2.cfg<br />
Again, the paths have to be adjusted. Do not forget to modify the GDB executable name with the environment variable ${CROSS_COMPILE}. Then switch to the "Startup" tab and configure as per below:<br />
<br />
[[File:openocd_eclipse_with_plugin_startup.png|frameless|800x800px]]<br />
<br />
If everything is set properly by clicking on the "bug" icon, OpenOCD is started automatically, code and symbols loaded automatically and therefore you should end up in being able to debug, similarly to what was shown in the previous section.<br />
<br />
== Secondary cores cross developing and debugging ==<br />
The RZ/G2 family includes a secondary, real-time core. The RZ/G2L include a Cortex-M33 whereas RZ/G2E-N-M-H include a Cortex-R7. You can use Eclipse to develop and debug also for these cores. Debugging is a little tricky because the secondary core cannot boot independently, rather it relies on the main core to load the firmware and boot. However the idea behind does not change much, you need to setup a development environment for the Cortex-M/R (e.g. arm-none-eabi-gcc ) and use the corresponding GDB to debug (arm-none-eabi-gdb). GDB connects to the OpenOCD port dedicated to the secondary core. You can also develop and debug both main cores and secondary cores at the same time, using two Eclipse instances.<br />
<br />
=== Cortex-M33 developing and debugging ===<br />
First of all it is important to notice that the official RZ/G2L Cortex-M33 development and debugging environment is e2studio. Therefore the instructions provided here most likely are not relevant. However, this section is meant to show that OpenOCD can be used as well, for the sake of completeness.<br />
<br />
In order to develop and debug for the Arm-v8M (and Arm-v8R) you need to install another GCC toolchain. It can be downloaded from the [https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm/downloads Arm developer website]. The Linux x86_64 Tarball is what you want to download and untar in the folder you like, for example:<br />
tar -xvf gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2 -C /opt/arm/<br />
then add the bin directory to the path and export the cross compile environment variable:<br />
PATH=/opt/arm/gcc-arm-none-eabi-10-2020-q4-major/bin:$PATH ; export CROSS_COMPILE=arm-none-eabi-<br />
Download the Cortex-M33 sample code (simple LED blink example) from [https://github.com/seebe/rzg_stuff/raw/master/openocd/cm33_sample_code/rzg2l_baremetal_blinky_smarc.tar.gz here]. <br />
<br />
Now you can start Eclipse:<br />
eclipse &<br />
It may be convenient to create a workspace for Cortex-M and keep it separated from the Cortex-A. This is useful to have the possibility to potentially run two different Eclipse instances.<br />
<br />
Import the blinky project in the newly created workspace: File -> Import -> General -> Projects from Folder or Archive. Select the archive file downloaded previously by clicking on Archive. Deselect the top of the two projects displayed and click Finish:<br />
<br />
[[File:Eclipse import archive.png|frameless|600x600px]]<br />
<br />
You should be able to build the project without errors (33 warnings). You have to create a debug configuration, right click on the project, Debug As -> Debug Configurations. Select GDB OpenOCD Debugging (you need the OpenOCD plugin as per previous section) and create a new debug configuration by clicking on the leftmost icon. Leave the "Main" tab as per default and switch to the "Debugger" tab. You may want to deselect "Start OpenOCD locally", since OpenOCD will be started manually. Then in the "GDB Client Setup" part use the ${CROSS_COMPILE} as prefix, change the port number to 3334 and finally change the command ('''important''') "set mem inaccesible-by-default" to "on" :<br />
<br />
[[File:Eclipse cm33 debug config2.png|frameless|1000x1000px]]<br />
<br />
Move to the Startup tab and modify the fields as per below:<br />
<br />
[[File:Eclipse cm33 debug config 3.png|frameless|1000x1000px]]<br />
<br />
Do not click on Debug, just save and close, it is time to launch OpenOCD "manually" and load the Cortex-M33 binary via Cortex-A55.<br />
<br />
As you have probably noticed reading [[RZ-G/RZG openocd new#Run openocd|this part of the OpenOCD guide]], OpenOCD starts two gdb servers, one for the dual Cortex-A55 (SMP) and another for the Cortex-M33. However as already mentioned the Cortex-M33 is not independent and it has to be started by the Cortex-A55. Let's do it "manually", i.e. starting first OpenOCD and GDB in the terminal and not via Eclipse. From the folder where OpenOCD binary is installed:<br />
./openocd -f ../share/openocd/scripts/interface/jlink.cfg -c "set SOC G2L" -f ../share/openocd/scripts/target/renesas_rz_g2.cfg<br />
Before launching GDB, download [https://github.com/seebe/rzg_stuff/blob/master/openocd/gdb_smarc_g2l_blinky_ca55_load this script] and modify the binary path according to your own, This is the binary generated by Eclipse previously, normally in the workspace / project name / Debug folder. Tip: in Eclipse you can easily copy the executable path by right clink on the executable itself -> "Show in local terminal".<br />
<br />
Then open another terminal:<br />
source /opt/poky/3.1.5/environment-setup-aarch64-poky-linux<br />
$GDB<br />
<br />
GNU gdb (GDB) 9.1<br />
Copyright (C) 2020 Free Software Foundation, Inc.<br />
License GPLv3+: GNU GPL version 3 or later <<nowiki>http://gnu.org/licenses/gpl.html</nowiki>><br />
This is free software: you are free to change and redistribute it.<br />
There is NO WARRANTY, to the extent permitted by law.<br />
Type "show copying" and "show warranty" for details.<br />
This GDB was configured as "--host=x86_64-pokysdk-linux --target=aarch64-poky-linux".<br />
Type "show configuration" for configuration details.<br />
For bug reporting instructions, please see:<br />
<<nowiki>http://www.gnu.org/software/gdb/bugs/</nowiki>>.<br />
Find the GDB manual and other documentation resources online at:<br />
<<nowiki>http://www.gnu.org/software/gdb/documentation/</nowiki>>.<br />
<br />
For help, type "help".<br />
Type "apropos word" to search for commands related to "word".<br />
(gdb)<br />
and launch the script by giving the command: <br />
source ~/rzg_stuff/openocd/gdb_smarc_g2l_blinky_ca55_load<br />
The script executes all the needed steps to load the code and wake the Cortex-M33 up. If successful you should get:<br />
JTAG scan chain interrogation failed: all ones<br />
Check JTAG interface, timings, target power, etc.<br />
Trying to use configured scan chain anyway...<br />
r9a07g044l.cpu: IR capture error; saw 0x0f not 0x01<br />
Bypassing JTAG setup events due to errors<br />
Invalid ACK (7) in DAP response<br />
JTAG-DP STICKY ERROR<br />
Deferring arp_examine of r9a07g044l.a55.1<br />
Use arp_examine command to examine it manually!<br />
Deferring arp_examine of r9a07g044l.m33<br />
Use arp_examine command to examine it manually!<br />
Invalid ACK (7) in DAP response<br />
<br />
Debug regions are unpowered, an unexpected reset might have happened<br />
JTAG-DP STICKY ERROR<br />
Polling target r9a07g044l.a55.0 failed, trying to reexamine<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled during replay (WAIT) - resending<br />
DAP transaction stalled (WAIT) - slowing down<br />
r9a07g044l.a55.0: hardware has 6 breakpoints, 4 watchpoints<br />
r9a07g044l.a55.0 halted in AArch64 state due to debug-request, current mode: EL3H<br />
cpsr: 0x400003cd pc: 0x3aac<br />
MMU: disabled, D-Cache: disabled, I-Cache: enabled<br />
Loading section .text, size 0x18ec lma 0x10000<br />
Loading section .data, size 0x58 lma 0x1e000<br />
Loading section .secure, size 0x268 lma 0x1f400<br />
Start address 0x000000001001f5ed, load size 7084<br />
Transfer rate: 7 KB/sec, 2361 bytes/write.<br />
0x11020504: 00000000 <br />
<br />
0x11020d28: 00001100 <br />
<br />
0x11010984: 00000000 <br />
<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled during replay (WAIT) - resending<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled during replay (WAIT) - resending<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
DAP transaction stalled (WAIT) - slowing down<br />
r9a07g044l.m33: hardware has 8 breakpoints, 4 watchpoints<br />
r9a07g044l.m33: external resume detected<br />
hard_err: catch<br />
int_err: catch<br />
bus_err: catch<br />
state_err: catch<br />
chk_err: catch<br />
nocp_err: catch<br />
mm_err: catch<br />
reset: catch<br />
<br />
target halted due to breakpoint, current mode: Thread <br />
xPSR: 0xf9000000 pc: 0x1001f5ec msp: 0x3001fa00<br />
<br />
Now the Cortex-M33 is stopped at the secure reset vector, you can switch to Eclipse again and click on the debug icon to connect to the Cortex-M33 OpenOCD gdbserver: <br />
<br />
[[File:Eclipse cm33 debug in progress.png|frameless|1000x1000px]]<br />
<br />
Please note that there are no user LEDs on the SMARC board. In order to see a LED blinking you would need to add an external PMOD LED board, for example [https://store.digilentinc.com/pmod-led-four-high-brightness-leds/ this one], to the PMOD0 connector of the carrier board. <br />
<br />
=== Cortex-R7 developing and debugging ===<br />
To do.</div>Padhikarihttps://renesas.info/w/index.php?title=File:gdb_version_error.png&diff=346File:gdb version error.png2021-06-23T15:39:29Z<p>Padhikari: </p>
<hr />
<div></div>Padhikari